apps/plugins/rockboy/cpu.c

   1 #include "rockmacros.h"
   2 #include "defs.h"
   3 #include "regs.h"
   4 #include "hw.h"
   5 #include "cpu-gb.h"
   6 #include "lcdc.h"
   7 #include "mem.h"
   8 #include "fastmem.h"
   9 #include "cpuregs.h"
  10 #include "cpucore.h"
  11
  12 #ifdef USE_ASM
  13 #include "asm.h"
  14 #endif
  15
  16
  17 struct cpu cpu IBSS_ATTR;
  18
  19
  20 #define ZFLAG(n) ( (n) ? 0 : FZ )
  21
  22
  23 #define PUSH(w) ( (SP -= 2), (writew(xSP, (w))) )
  24 #define POP(w) ( ((w) = readw(xSP)), (SP += 2) )
  25
  26 #define FETCH (readb(PC++))
  27
  28
  29 #define INC(r) { ((r)++); \
  30 F = (F & (FL|FC)) | incflag_table[(r)]; }
  31
  32 #define DEC(r) { ((r)--); \
  33 F = (F & (FL|FC)) | decflag_table[(r)]; }
  34
  35 #define INCW(r) ( (r)++ )
  36
  37 #define DECW(r) ( (r)-- )
  38
  39 #define ADD(n) { \
  40 W(acc) = (un16)A + (un16)(n); \
  41 F = (ZFLAG(LB(acc))) \
  42 | (FH & ((A ^ (n) ^ LB(acc)) << 1)) \
  43 | (HB(acc) << 4); \
  44 A = LB(acc); }
  45
  46 #define ADC(n) { \
  47 W(acc) = (un16)A + (un16)(n) + (un16)((F&FC)>>4); \
  48 F = (ZFLAG(LB(acc))) \
  49 | (FH & ((A ^ (n) ^ LB(acc)) << 1)) \
  50 | (HB(acc) << 4); \
  51 A = LB(acc); }
  52
  53 #define ADDW(n) { \
  54 DW(acc) = (un32)HL + (un32)(n); \
  55 F = (F & (FZ)) \
  56 | (FH & ((H ^ ((n)>>8) ^ HB(acc)) << 1)) \
  57 | (acc.b[HI][LO] << 4); \
  58 HL = W(acc); }
  59
  60 #define ADDSP(n) { \
  61 DW(acc) = (un32)SP + (un32)(n8)(n); \
  62 F = (FH & (((SP>>8) ^ ((n)>>8) ^ HB(acc)) << 1)) \
  63 | (acc.b[HI][LO] << 4); \
  64 SP = W(acc); }
  65
  66 #define LDHLSP(n) { \
  67 DW(acc) = (un32)SP + (un32)(n8)(n); \
  68 F = (FH & (((SP>>8) ^ ((n)>>8) ^ HB(acc)) << 1)) \
  69 | (acc.b[HI][LO] << 4); \
  70 HL = W(acc); }
  71
  72 #define CP(n) { \
  73 W(acc) = (un16)A - (un16)(n); \
  74 F = FN \
  75 | (ZFLAG(LB(acc))) \
  76 | (FH & ((A ^ (n) ^ LB(acc)) << 1)) \
  77 | ((un8)(-(n8)HB(acc)) << 4); }
  78
  79 #define SUB(n) { CP((n)); A = LB(acc); }
  80
  81 #define SBC(n) { \
  82 W(acc) = (un16)A - (un16)(n) - (un16)((F&FC)>>4); \
  83 F = FN \
  84 | (ZFLAG((n8)LB(acc))) \
  85 | (FH & ((A ^ (n) ^ LB(acc)) << 1)) \
  86 | ((un8)(-(n8)HB(acc)) << 4); \
  87 A = LB(acc); }
  88
  89 #define AND(n) { A &= (n); \
  90 F = ZFLAG(A) | FH; }
  91
  92 #define XOR(n) { A ^= (n); \
  93 F = ZFLAG(A); }
  94
  95 #define OR(n) { A |= (n); \
  96 F = ZFLAG(A); }
  97
  98 #define RLCA(r) { (r) = ((r)>>7) | ((r)<<1); \
  99 F = (((r)&0x01)<<4); }
 100
 101 #define RRCA(r) { (r) = ((r)<<7) | ((r)>>1); \
 102 F = (((r)&0x80)>>3); }
 103
 104 #define RLA(r) { \
 105 LB(acc) = (((r)&0x80)>>3); \
 106 (r) = ((r)<<1) | ((F&FC)>>4); \
 107 F = LB(acc); }
 108
 109 #define RRA(r) { \
 110 LB(acc) = (((r)&0x01)<<4); \
 111 (r) = ((r)>>1) | ((F&FC)<<3); \
 112 F = LB(acc); }
 113
 114 #define RLC(r) { RLCA(r); F |= ZFLAG(r); }
 115 #define RRC(r) { RRCA(r); F |= ZFLAG(r); }
 116 #define RL(r) { RLA(r); F |= ZFLAG(r); }
 117 #define RR(r) { RRA(r); F |= ZFLAG(r); }
 118
 119 #define SLA(r) { \
 120 LB(acc) = (((r)&0x80)>>3); \
 121 (r) <<= 1; \
 122 F = ZFLAG((r)) | LB(acc); }
 123
 124 #define SRA(r) { \
 125 LB(acc) = (((r)&0x01)<<4); \
 126 (r) = (un8)(((n8)(r))>>1); \
 127 F = ZFLAG((r)) | LB(acc); }
 128
 129 #define SRL(r) { \
 130 LB(acc) = (((r)&0x01)<<4); \
 131 (r) >>= 1; \
 132 F = ZFLAG((r)) | LB(acc); }
 133
 134 #define CPL(r) { \
 135 (r) = ~(r); \
 136 F |= (FH|FN); }
 137
 138 #define SCF { F = (F & (FZ)) | FC; }
 139
 140 #define CCF { F = (F & (FZ|FC)) ^ FC; }
 141
 142 #define DAA { \
 143 A += (LB(acc) = daa_table[((((int)F)&0x70)<<4) | A]); \
 144 F = (F & (FN)) | ZFLAG(A) | daa_carry_table[LB(acc)>>2]; }
 145
 146 #define SWAP(r) { \
 147 (r) = swap_table[(r)]; \
 148 F = ZFLAG((r)); }
 149
 150 #define BIT(n,r) { F = (F & FC) | ZFLAG(((r) & (1 << (n)))) | FH; }
 151 #define RES(n,r) { (r) &= ~(1 << (n)); }
 152 #define SET(n,r) { (r) |= (1 << (n)); }
 153
 154 #define CB_REG_CASES(r, n) \
 155 case 0x00|(n): RLC(r); break; \
 156 case 0x08|(n): RRC(r); break; \
 157 case 0x10|(n): RL(r); break; \
 158 case 0x18|(n): RR(r); break; \
 159 case 0x20|(n): SLA(r); break; \
 160 case 0x28|(n): SRA(r); break; \
 161 case 0x30|(n): SWAP(r); break; \
 162 case 0x38|(n): SRL(r); break; \
 163 case 0x40|(n): BIT(0, r); break; \
 164 case 0x48|(n): BIT(1, r); break; \
 165 case 0x50|(n): BIT(2, r); break; \
 166 case 0x58|(n): BIT(3, r); break; \
 167 case 0x60|(n): BIT(4, r); break; \
 168 case 0x68|(n): BIT(5, r); break; \
 169 case 0x70|(n): BIT(6, r); break; \
 170 case 0x78|(n): BIT(7, r); break; \
 171 case 0x80|(n): RES(0, r); break; \
 172 case 0x88|(n): RES(1, r); break; \
 173 case 0x90|(n): RES(2, r); break; \
 174 case 0x98|(n): RES(3, r); break; \
 175 case 0xA0|(n): RES(4, r); break; \
 176 case 0xA8|(n): RES(5, r); break; \
 177 case 0xB0|(n): RES(6, r); break; \
 178 case 0xB8|(n): RES(7, r); break; \
 179 case 0xC0|(n): SET(0, r); break; \
 180 case 0xC8|(n): SET(1, r); break; \
 181 case 0xD0|(n): SET(2, r); break; \
 182 case 0xD8|(n): SET(3, r); break; \
 183 case 0xE0|(n): SET(4, r); break; \
 184 case 0xE8|(n): SET(5, r); break; \
 185 case 0xF0|(n): SET(6, r); break; \
 186 case 0xF8|(n): SET(7, r); break;
 187
 188
 189 #define ALU_CASES(base, imm, op, label) \
 190 case (imm): b = FETCH; goto label; \
 191 case (base): b = B; goto label; \
 192 case (base)+1: b = C; goto label; \
 193 case (base)+2: b = D; goto label; \
 194 case (base)+3: b = E; goto label; \
 195 case (base)+4: b = H; goto label; \
 196 case (base)+5: b = L; goto label; \
 197 case (base)+6: b = readb(HL); goto label; \
 198 case (base)+7: b = A; \
 199 label: op(b); break;
 200
 201
 202
 203
 204
 205
 206
 207
 208 #define JR ( PC += 1+(n8)readb(PC) )
 209 #define JP ( PC = readw(PC) )
 210
 211 #define CALL ( PUSH(PC+2), JP )
 212
 213 #define NOJR ( clen--, PC++ )
 214 #define NOJP ( clen--, PC+=2 )
 215 #define NOCALL ( clen-=3, PC+=2 )
 216 #define NORET ( clen-=3 )
 217
 218 #define RST(n) { PUSH(PC); PC = (n); }
 219
 220 #define RET ( POP(PC) )
 221
 222 #define EI ( IMA = 1 )
 223 #define DI ( IMA = IME = 0 )
 224
 225
 226
 227 #define PRE_INT ( DI, PUSH(PC) )
 228 #define THROW_INT(n) ( (IF &= ~(1<<(n))), (PC = 0x40+((n)<<3)) )
 229
 230 #ifdef DYNAREC
 231 un32 reg_backup[16];
 232 struct dynarec_block *address_map[1<<HASH_SIGNIFICANT_LOWER_BITS];
 233 extern void *dynapointer;
 234 int blockcount;
 235 #define MAXBLOCK 6
 236 #endif
 237
 238
 239
 240 void cpu_reset(void)
 241 {
 242     union reg acc;
 243 #ifdef DYNAREC
 244     int i;
 245     dynapointer=0;
 246 #endif
 247     cpu.speed = 0;
 248     cpu.halt = 0;
 249     cpu.div = 0;
 250     cpu.tim = 0;
 251     cpu.lcdc = 40;
 252
 253     IME = 0;
 254     IMA = 0;
 255
 256     PC = 0x0100;
 257     SP = 0xFFFE;
 258     W(acc) = 0x01B0;
 259     A=HB(acc);
 260     F=LB(acc);
 261     W(acc) = 0x0013;
 262     B=HB(acc);
 263     C=LB(acc);
 264     W(acc) = 0x00D8;
 265     D=HB(acc);
 266     E=LB(acc);
 267     HL = 0x014D;
 268
 269     if (hw.cgb) A = 0x11;
 270 #ifdef DYNAREC
 271     for(i=0;i<(1<<HASH_SIGNIFICANT_LOWER_BITS);i++)
 272         address_map[i]=0;
 273 #endif
 274 }
 275
 276
 277 void div_advance(int cnt)
 278 {
 279     cpu.div += (cnt<<1);
 280     if (cpu.div >= 256)
 281     {
 282         R_DIV += (cpu.div >> 8);
 283         cpu.div &= 0xff;
 284     }
 285 }
 286
 287 void timer_advance(int cnt)
 288 {
 289     int unit, tima;
 290
 291     if (!(R_TAC & 0x04)) return;
 292
 293     unit = ((-R_TAC) & 3) << 1;
 294     cpu.tim += (cnt<<unit);
 295
 296     if (cpu.tim >= 512)
 297     {
 298         tima = R_TIMA + (cpu.tim >> 9);
 299         cpu.tim &= 0x1ff;
 300         if (tima >= 256)
 301         {
 302             hw_interrupt(IF_TIMER, IF_TIMER);
 303             hw_interrupt(0, IF_TIMER);
 304         }
 305         while (tima >= 256)
 306             tima = tima - 256 + R_TMA;
 307         R_TIMA = tima;
 308     }
 309 }
 310
 311 void lcdc_advance(int cnt)
 312 {
 313     cpu.lcdc -= cnt;
 314     if (cpu.lcdc <= 0) lcdc_trans();
 315 }
 316
 317 void sound_advance(int cnt)
 318 {
 319     cpu.snd += cnt;
 320 }
 321
 322 void cpu_timers(int cnt)
 323 {
 324     div_advance(cnt << cpu.speed);
 325     timer_advance(cnt << cpu.speed);
 326     lcdc_advance(cnt);
 327     if(options.sound)
 328         sound_advance(cnt);
 329 }
 330
 331 int cpu_idle(int max)
 332 {
 333     int cnt, unit;
 334
 335     if (!(cpu.halt && IME)) return 0;
 336
 337     /* Make sure we don't miss lcdc status events! */
 338     if ((R_IE & (IF_VBLANK | IF_STAT)) && (max > cpu.lcdc))
 339         max = cpu.lcdc;
 340
 341     /* If timer interrupt cannot happen, this is very simple! */
 342     if (!((R_IE & IF_TIMER) && (R_TAC & 0x04)))
 343     {
 344         cpu_timers(max);
 345         return max;
 346     }
 347
 348     /* Figure out when the next timer interrupt will happen */
 349     unit = ((-R_TAC) & 3) << 1;
 350     cnt = (511 - cpu.tim + (1<<unit)) >> unit;
 351     cnt += (255 - R_TIMA) << (9 - unit);
 352
 353     if (max < cnt)
 354         cnt = max;
 355
 356     cpu_timers(cnt);
 357     return cnt;
 358 }
 359
 360 #ifndef ASM_CPU_EMULATE
 361
 362 extern int debug_trace;
 363
 364 int cpu_emulate(int cycles)
 365 {
 366     int i;
 367     static byte op IBSS_ATTR;
 368     static byte cbop IBSS_ATTR;
 369     int clen;
 370     static union reg acc IBSS_ATTR;
 371     static byte b IBSS_ATTR;
 372     static word w IBSS_ATTR;
 373
 374     i = cycles;
 375 next:
 376 #ifdef DYNAREC
 377     if(shut)
 378         return cycles-i;
 379 #endif
 380     if ((clen = cpu_idle(i)))
 381     {
 382         i -= clen;
 383         if (i > 0) goto next;
 384         return cycles-i;
 385     }
 386
 387     if (IME && (IF & IE))
 388     {
 389         PRE_INT;
 390         switch ((byte)(IF & IE))
 391         {
 392         case 0x01: case 0x03: case 0x05: case 0x07:
 393         case 0x09: case 0x0B: case 0x0D: case 0x0F:
 394         case 0x11: case 0x13: case 0x15: case 0x17:
 395         case 0x19: case 0x1B: case 0x1D: case 0x1F:
 396             THROW_INT(0); break;
 397         case 0x02: case 0x06: case 0x0A: case 0x0E:
 398         case 0x12: case 0x16: case 0x1A: case 0x1E:
 399             THROW_INT(1); break;
 400         case 0x04: case 0x0C: case 0x14: case 0x1C:
 401             THROW_INT(2); break;
 402         case 0x08: case 0x18:
 403             THROW_INT(3); break;
 404         case 0x10:
 405             THROW_INT(4); break;
 406         }
 407     }
 408     IME = IMA;
 409
 410 /*    if (debug_trace) debug_disassemble(PC, 1); */
 411 #ifdef DYNAREC
 412     if(PC&0x8000) {
 413 #endif
 414     op = FETCH;
 415     clen = cycles_table[op];
 416
 417     switch(op)
 418     {
 419     case 0x00: /* NOP */
 420     case 0x40: /* LD B,B */
 421     case 0x49: /* LD C,C */
 422     case 0x52: /* LD D,D */
 423     case 0x5B: /* LD E,E */
 424     case 0x64: /* LD H,H */
 425     case 0x6D: /* LD L,L */
 426     case 0x7F: /* LD A,A */
 427         break;
 428
 429     case 0x41: /* LD B,C */
 430         B = C; break;
 431     case 0x42: /* LD B,D */
 432         B = D; break;
 433     case 0x43: /* LD B,E */
 434         B = E; break;
 435     case 0x44: /* LD B,H */
 436         B = H; break;
 437     case 0x45: /* LD B,L */
 438         B = L; break;
 439     case 0x46: /* LD B,(HL) */
 440         B = readb(xHL); break;
 441     case 0x47: /* LD B,A */
 442         B = A; break;
 443
 444     case 0x48: /* LD C,B */
 445         C = B; break;
 446     case 0x4A: /* LD C,D */
 447         C = D; break;
 448     case 0x4B: /* LD C,E */
 449         C = E; break;
 450     case 0x4C: /* LD C,H */
 451         C = H; break;
 452     case 0x4D: /* LD C,L */
 453         C = L; break;
 454     case 0x4E: /* LD C,(HL) */
 455         C = readb(xHL); break;
 456     case 0x4F: /* LD C,A */
 457         C = A; break;
 458
 459     case 0x50: /* LD D,B */
 460         D = B; break;
 461     case 0x51: /* LD D,C */
 462         D = C; break;
 463     case 0x53: /* LD D,E */
 464         D = E; break;
 465     case 0x54: /* LD D,H */
 466         D = H; break;
 467     case 0x55: /* LD D,L */
 468         D = L; break;
 469     case 0x56: /* LD D,(HL) */
 470         D = readb(xHL); break;
 471     case 0x57: /* LD D,A */
 472         D = A; break;
 473
 474     case 0x58: /* LD E,B */
 475         E = B; break;
 476     case 0x59: /* LD E,C */
 477         E = C; break;
 478     case 0x5A: /* LD E,D */
 479         E = D; break;
 480     case 0x5C: /* LD E,H */
 481         E = H; break;
 482     case 0x5D: /* LD E,L */
 483         E = L; break;
 484     case 0x5E: /* LD E,(HL) */
 485         E = readb(xHL); break;
 486     case 0x5F: /* LD E,A */
 487         E = A; break;
 488
 489     case 0x60: /* LD H,B */
 490         H = B; break;
 491     case 0x61: /* LD H,C */
 492         H = C; break;
 493     case 0x62: /* LD H,D */
 494         H = D; break;
 495     case 0x63: /* LD H,E */
 496         H = E; break;
 497     case 0x65: /* LD H,L */
 498         H = L; break;
 499     case 0x66: /* LD H,(HL) */
 500         H = readb(xHL); break;
 501     case 0x67: /* LD H,A */
 502         H = A; break;
 503
 504     case 0x68: /* LD L,B */
 505         L = B; break;
 506     case 0x69: /* LD L,C */
 507         L = C; break;
 508     case 0x6A: /* LD L,D */
 509         L = D; break;
 510     case 0x6B: /* LD L,E */
 511         L = E; break;
 512     case 0x6C: /* LD L,H */
 513         L = H; break;
 514     case 0x6E: /* LD L,(HL) */
 515         L = readb(xHL); break;
 516     case 0x6F: /* LD L,A */
 517         L = A; break;
 518
 519     case 0x70: /* LD (HL),B */
 520         b = B; goto __LD_HL;
 521     case 0x71: /* LD (HL),C */
 522         b = C; goto __LD_HL;
 523     case 0x72: /* LD (HL),D */
 524         b = D; goto __LD_HL;
 525     case 0x73: /* LD (HL),E */
 526         b = E; goto __LD_HL;
 527     case 0x74: /* LD (HL),H */
 528         b = H; goto __LD_HL;
 529     case 0x75: /* LD (HL),L */
 530         b = L; goto __LD_HL;
 531     case 0x77: /* LD (HL),A */
 532         b = A;
 533     __LD_HL:
 534         writeb(xHL,b);
 535         break;
 536
 537     case 0x78: /* LD A,B */
 538         A = B; break;
 539     case 0x79: /* LD A,C */
 540         A = C; break;
 541     case 0x7A: /* LD A,D */
 542         A = D; break;
 543     case 0x7B: /* LD A,E */
 544         A = E; break;
 545     case 0x7C: /* LD A,H */
 546         A = H; break;
 547     case 0x7D: /* LD A,L */
 548         A = L; break;
 549     case 0x7E: /* LD A,(HL) */
 550         A = readb(xHL); break;
 551
 552     case 0x01: /* LD BC,imm */
 553 #ifdef DYNAREC
 554         W(acc) = readw(xPC);
 555         B=HB(acc);
 556         C=LB(acc);
 557 #else
 558         BC = readw(xPC);
 559 #endif
 560         PC += 2;
 561         break;
 562     case 0x11: /* LD DE,imm */
 563 #ifdef DYNAREC
 564         W(acc) = readw(xPC);
 565         D=HB(acc);
 566         E=LB(acc);
 567 #else
 568         DE = readw(xPC);
 569 #endif
 570         PC += 2;
 571         break;
 572     case 0x21: /* LD HL,imm */
 573         HL = readw(xPC); PC += 2; break;
 574     case 0x31: /* LD SP,imm */
 575         SP = readw(xPC); PC += 2; break;
 576
 577     case 0x02: /* LD (BC),A */
 578         writeb(xBC, A); break;
 579     case 0x0A: /* LD A,(BC) */
 580         A = readb(xBC); break;
 581     case 0x12: /* LD (DE),A */
 582         writeb(xDE, A); break;
 583     case 0x1A: /* LD A,(DE) */
 584         A = readb(xDE); break;
 585
 586     case 0x22: /* LDI (HL),A */
 587         writeb(xHL, A); HL++; break;
 588     case 0x2A: /* LDI A,(HL) */
 589         A = readb(xHL); HL++; break;
 590     case 0x32: /* LDD (HL),A */
 591         writeb(xHL, A); HL--; break;
 592     case 0x3A: /* LDD A,(HL) */
 593         A = readb(xHL); HL--; break;
 594
 595     case 0x06: /* LD B,imm */
 596         B = FETCH; break;
 597     case 0x0E: /* LD C,imm */
 598         C = FETCH; break;
 599     case 0x16: /* LD D,imm */
 600         D = FETCH; break;
 601     case 0x1E: /* LD E,imm */
 602         E = FETCH; break;
 603     case 0x26: /* LD H,imm */
 604         H = FETCH; break;
 605     case 0x2E: /* LD L,imm */
 606         L = FETCH; break;
 607     case 0x36: /* LD (HL),imm */
 608         b = FETCH; writeb(xHL, b); break;
 609     case 0x3E: /* LD A,imm */
 610         A = FETCH; break;
 611
 612     case 0x08: /* LD (imm),SP */
 613         writew(readw(xPC), SP); PC += 2; break;
 614     case 0xEA: /* LD (imm),A */
 615         writeb(readw(xPC), A); PC += 2; break;
 616
 617     case 0xE0: /* LDH (imm),A */
 618         writehi(FETCH, A); break;
 619     case 0xE2: /* LDH (C),A */
 620         writehi(C, A); break;
 621     case 0xF0: /* LDH A,(imm) */
 622         A = readhi(FETCH); break;
 623     case 0xF2: /* LDH A,(C) (undocumented) */
 624         A = readhi(C); break;
 625
 626
 627     case 0xF8: /* LD HL,SP+imm */
 628         b = FETCH; LDHLSP(b); break;
 629     case 0xF9: /* LD SP,HL */
 630         SP = HL; break;
 631     case 0xFA: /* LD A,(imm) */
 632         A = readb(readw(xPC)); PC += 2; break;
 633
 634         ALU_CASES(0x80, 0xC6, ADD, __ADD)
 635         ALU_CASES(0x88, 0xCE, ADC, __ADC)
 636         ALU_CASES(0x90, 0xD6, SUB, __SUB)
 637         ALU_CASES(0x98, 0xDE, SBC, __SBC)
 638         ALU_CASES(0xA0, 0xE6, AND, __AND)
 639         ALU_CASES(0xA8, 0xEE, XOR, __XOR)
 640         ALU_CASES(0xB0, 0xF6, OR, __OR)
 641         ALU_CASES(0xB8, 0xFE, CP, __CP)
 642
 643     case 0x09: /* ADD HL,BC */
 644         w = BC; goto __ADDW;
 645     case 0x19: /* ADD HL,DE */
 646         w = DE; goto __ADDW;
 647     case 0x39: /* ADD HL,SP */
 648         w = SP; goto __ADDW;
 649     case 0x29: /* ADD HL,HL */
 650         w = HL;
 651     __ADDW:
 652         ADDW(w);
 653         break;
 654
 655     case 0x04: /* INC B */
 656         INC(B); break;
 657     case 0x0C: /* INC C */
 658         INC(C); break;
 659     case 0x14: /* INC D */
 660         INC(D); break;
 661     case 0x1C: /* INC E */
 662         INC(E); break;
 663     case 0x24: /* INC H */
 664         INC(H); break;
 665     case 0x2C: /* INC L */
 666         INC(L); break;
 667     case 0x34: /* INC (HL) */
 668         b = readb(xHL);
 669         INC(b);
 670         writeb(xHL, b);
 671         break;
 672     case 0x3C: /* INC A */
 673         INC(A); break;
 674
 675     case 0x03: /* INC BC */
 676 #ifdef DYNAREC
 677         W(acc)=((B<<8)|C)+1;
 678         B=HB(acc);
 679         C=LB(acc);
 680 #else
 681         INCW(BC);
 682 #endif
 683         break;
 684     case 0x13: /* INC DE */
 685 #ifdef DYNAREC
 686         W(acc)=((D<<8)|E)+1;
 687         D=HB(acc);
 688         E=LB(acc);
 689 #else
 690         INCW(DE);
 691 #endif
 692         break;
 693     case 0x23: /* INC HL */
 694         INCW(HL); break;
 695     case 0x33: /* INC SP */
 696         INCW(SP); break;
 697
 698     case 0x05: /* DEC B */
 699         DEC(B); break;
 700     case 0x0D: /* DEC C */
 701         DEC(C); break;
 702     case 0x15: /* DEC D */
 703         DEC(D); break;
 704     case 0x1D: /* DEC E */
 705         DEC(E); break;
 706     case 0x25: /* DEC H */
 707         DEC(H); break;
 708     case 0x2D: /* DEC L */
 709         DEC(L); break;
 710     case 0x35: /* DEC (HL) */
 711         b = readb(xHL);
 712         DEC(b);
 713         writeb(xHL, b);
 714         break;
 715     case 0x3D: /* DEC A */
 716         DEC(A); break;
 717
 718     case 0x0B: /* DEC BC */
 719 #ifdef DYNAREC
 720         W(acc)=((B<<8)|C)-1;
 721         B=HB(acc);
 722         C=LB(acc);
 723 #else
 724         DECW(BC);
 725 #endif
 726         break;
 727     case 0x1B: /* DEC DE */
 728 #ifdef DYNAREC
 729         W(acc)=((D<<8)|E)-1;
 730         D=HB(acc);
 731         E=LB(acc);
 732 #else
 733         DECW(DE);
 734 #endif
 735         break;
 736     case 0x2B: /* DEC HL */
 737         DECW(HL); break;
 738     case 0x3B: /* DEC SP */
 739         DECW(SP); break;
 740
 741     case 0x07: /* RLCA */
 742         RLCA(A); break;
 743     case 0x0F: /* RRCA */
 744         RRCA(A); break;
 745     case 0x17: /* RLA */
 746         RLA(A); break;
 747     case 0x1F: /* RRA */
 748         RRA(A); break;
 749
 750     case 0x27: /* DAA */
 751         DAA; break;
 752     case 0x2F: /* CPL */
 753         CPL(A); break;
 754
 755     case 0x18: /* JR */
 756     __JR:
 757         JR; break;
 758     case 0x20: /* JR NZ */
 759         if (!(F&FZ)) goto __JR; NOJR; break;
 760     case 0x28: /* JR Z */
 761         if (F&FZ) goto __JR; NOJR; break;
 762     case 0x30: /* JR NC */
 763         if (!(F&FC)) goto __JR; NOJR; break;
 764     case 0x38: /* JR C */
 765         if (F&FC) goto __JR; NOJR; break;
 766
 767     case 0xC3: /* JP */
 768     __JP:
 769         JP; break;
 770     case 0xC2: /* JP NZ */
 771         if (!(F&FZ)) goto __JP; NOJP; break;
 772     case 0xCA: /* JP Z */
 773         if (F&FZ) goto __JP; NOJP; break;
 774     case 0xD2: /* JP NC */
 775         if (!(F&FC)) goto __JP; NOJP; break;
 776     case 0xDA: /* JP C */
 777         if (F&FC) goto __JP; NOJP; break;
 778     case 0xE9: /* JP HL */
 779         PC = HL; break;
 780
 781     case 0xC9: /* RET */
 782     __RET:
 783         RET; break;
 784     case 0xC0: /* RET NZ */
 785         if (!(F&FZ)) goto __RET; NORET; break;
 786     case 0xC8: /* RET Z */
 787         if (F&FZ) goto __RET; NORET; break;
 788     case 0xD0: /* RET NC */
 789         if (!(F&FC)) goto __RET; NORET; break;
 790     case 0xD8: /* RET C */
 791         if (F&FC) goto __RET; NORET; break;
 792     case 0xD9: /* RETI */
 793         IME = IMA = 1; goto __RET;
 794
 795     case 0xCD: /* CALL */
 796     __CALL:
 797         CALL; break;
 798     case 0xC4: /* CALL NZ */
 799         if (!(F&FZ)) goto __CALL; NOCALL; break;
 800     case 0xCC: /* CALL Z */
 801         if (F&FZ) goto __CALL; NOCALL; break;
 802     case 0xD4: /* CALL NC */
 803         if (!(F&FC)) goto __CALL; NOCALL; break;
 804     case 0xDC: /* CALL C */
 805         if (F&FC) goto __CALL; NOCALL; break;
 806
 807     case 0xC7: /* RST 0 */
 808         b = 0x00; goto __RST;
 809     case 0xCF: /* RST 8 */
 810         b = 0x08; goto __RST;
 811     case 0xD7: /* RST 10 */
 812         b = 0x10; goto __RST;
 813     case 0xDF: /* RST 18 */
 814         b = 0x18; goto __RST;
 815     case 0xE7: /* RST 20 */
 816         b = 0x20; goto __RST;
 817     case 0xEF: /* RST 28 */
 818         b = 0x28; goto __RST;
 819     case 0xF7: /* RST 30 */
 820         b = 0x30; goto __RST;
 821     case 0xFF: /* RST 38 */
 822         b = 0x38;
 823     __RST:
 824         RST(b); break;
 825
 826     case 0xC1: /* POP BC */
 827 #ifdef DYNAREC
 828         POP(W(acc));
 829         B=HB(acc);
 830         C=LB(acc);
 831 #else
 832         POP(BC);
 833 #endif
 834         break;
 835     case 0xC5: /* PUSH BC */
 836         PUSH(BC); break;
 837     case 0xD1: /* POP DE */
 838 #ifdef DYNAREC
 839         POP(W(acc));
 840         D=HB(acc);
 841         E=LB(acc);
 842 #else
 843         POP(DE);
 844 #endif
 845         break;
 846     case 0xD5: /* PUSH DE */
 847         PUSH(DE); break;
 848     case 0xE1: /* POP HL */
 849         POP(HL); break;
 850     case 0xE5: /* PUSH HL */
 851         PUSH(HL); break;
 852     case 0xF1: /* POP AF */
 853 #ifdef DYNAREC
 854         POP(W(acc));
 855         A=HB(acc);
 856         F=LB(acc);
 857 #else
 858         POP(AF);
 859         break;
 860 #endif
 861     case 0xF5: /* PUSH AF */
 862         PUSH(AF); break;
 863
 864     case 0xE8: /* ADD SP,imm */
 865         b = FETCH; ADDSP(b); break;
 866
 867     case 0xF3: /* DI */
 868         DI; break;
 869     case 0xFB: /* EI */
 870         EI; break;
 871
 872     case 0x37: /* SCF */
 873         SCF; break;
 874     case 0x3F: /* CCF */
 875         CCF; break;
 876
 877     case 0x10: /* STOP */
 878         PC++;
 879         if (R_KEY1 & 1)
 880         {
 881             cpu.speed = cpu.speed ^ 1;
 882             R_KEY1 = (R_KEY1 & 0x7E) | (cpu.speed << 7);
 883             break;
 884         }
 885         /* NOTE - we do not implement dmg STOP whatsoever */
 886         break;
 887
 888     case 0x76: /* HALT */
 889         cpu.halt = 1;
 890         break;
 891
 892     case 0xCB: /* CB prefix */
 893         cbop = FETCH;
 894         clen = cb_cycles_table[cbop];
 895         switch (cbop)
 896         {
 897             CB_REG_CASES(B, 0);
 898             CB_REG_CASES(C, 1);
 899             CB_REG_CASES(D, 2);
 900             CB_REG_CASES(E, 3);
 901             CB_REG_CASES(H, 4);
 902             CB_REG_CASES(L, 5);
 903             CB_REG_CASES(A, 7);
 904         default:
 905             b = readb(xHL);
 906             switch(cbop)
 907             {
 908                 CB_REG_CASES(b, 6);
 909             }
 910             if ((cbop & 0xC0) != 0x40) /* exclude BIT */
 911                 writeb(xHL, b);
 912             break;
 913         }
 914         break;
 915
 916     default:
 917         die(
 918             "invalid opcode 0x%02X at address 0x%04X, rombank = %d\n",
 919             op, (PC-1) & 0xffff, mbc.rombank);
 920         break;
 921     }
 922 #ifdef DYNAREC
 923     }
 924     else
 925     {   /* ROM, dynarec. */
 926         struct dynarec_block *p=0,*b=address_map[PC&HASH_BITMASK];
 927         char meow[500];
 928         byte *ptr=mbc.rmap[PC>>12];
 929         snprintf(meow,499,"PC: 0x%x 0x%x a: 0x%x\n",
 930                   ptr,PC, b ? b->address.d : 0);
 931         rb->splash(HZ*2,meow);
 932         while(b&&b->address.d!=((unsigned int)(ptr)+PC))
 933         {
 934             p=b;
 935             b=b->next;
 936         }
 937         if(b)
 938         { /* call block */
 939             int fd;
 940             blockcount++;
 941             snprintf(meow,499,"/dyna_0x%x_run.rb",PC);
 942             fd=open(meow,O_WRONLY|O_CREAT|O_TRUNC);
 943             if(fd>=0)
 944             {
 945                 fdprintf(fd,"Block 0x%x Blockcount: %d\n",PC,blockcount);
 946                 fdprintf(fd,"before: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
 947                 cpu.a,cpu.b,cpu.c,cpu.d,cpu.e,cpu.hl,cpu.f,cpu.sp,cpu.pc,
 948                 cpu.ime);
 949                 if(blockcount<MAXBLOCK)
 950                 {
 951                         asm volatile ("movem.l (%0),%%d1-%%d7/%%a0-%%a1\n\t"
 952                         "jsr (%1)\n\t"
 953                         "movem.l %%d1-%%d7/%%a0-%%a1,(%0)\n\t"
 954                         :
 955                         : "a" (&cpu.a), "a" (b->block)
 956                         : "d0", "d1", "d2", "d3", "d4", "d5", "d6",
 957                           "d7", "a0","a1", "a2","a3","a4");
 958                         clen=blockclen;
 959                         fdprintf(fd,"after: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
 960                         cpu.a,cpu.b,cpu.c,cpu.d,cpu.e,cpu.hl,cpu.f,cpu.sp,
 961                         cpu.pc,cpu.ime);
 962                 }
 963                 else
 964                     die("end");
 965             close(fd);
 966             }
 967         }
 968         else
 969         { /* Hash miss -> not found -> recompile block and add it */
 970             struct dynarec_block *newblock;
 971             newblock=malloc(sizeof(struct dynarec_block));
 972             memset(newblock,0,sizeof(struct dynarec_block));
 973             newblock->address.d=(unsigned int)(ptr)+PC;
 974             dynamic_recompile(newblock);
 975             if(p)
 976                p->next=newblock;
 977             else
 978               address_map[PC&HASH_BITMASK]=newblock;
 979         }
 980     }
 981 #endif
 982
 983
 984
 985     clen <<= 1;
 986     div_advance(clen);
 987     timer_advance(clen);
 988     clen >>= cpu.speed;
 989     lcdc_advance(clen);
 990     if(options.sound)
 991         sound_advance(clen);
 992
 993     i -= clen;
 994     if (i > 0) goto next;
 995     return cycles-i;
 996 }
 997
 998 #endif /* ASM_CPU_EMULATE */
 999
1000
1001 #ifndef ASM_CPU_STEP
1002
1003 inline int cpu_step(int max)
1004 {
1005     register int cnt;
1006     if ((cnt = cpu_idle(max))) return cnt;
1007     return cpu_emulate(1);
1008 }
1009
1010 #endif /* ASM_CPU_STEP */
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