1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2008 Rob Purchase
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
18 ****************************************************************************/
20 #include "ata-target.h"
26 /* The NAND driver is currently work-in-progress and as such contains
27 some dead code and debug stuff, such as the next few lines. */
33 /* #define USE_TCC_LPT */
34 /* #define USE_ECC_CORRECTION */
36 /* for compatibility */
37 int ata_spinup_time
= 0;
39 long last_disk_activity
= -1;
41 /** static, private data **/
42 static bool initialized
= false;
44 static struct mutex ata_mtx SHAREDBSS_ATTR
;
46 #define SECTOR_SIZE 512
48 /* TCC780x NAND Flash Controller */
50 #define NFC_CMD (*(volatile unsigned long *)0xF0053000)
51 #define NFC_SADDR (*(volatile unsigned long *)0xF005300C)
52 #define NFC_SDATA (*(volatile unsigned long *)0xF0053040)
53 #define NFC_WDATA (*(volatile unsigned long *)0xF0053010)
54 #define NFC_CTRL (*(volatile unsigned long *)0xF0053050)
55 #define NFC_16BIT (1<<26)
56 #define NFC_CS0 (1<<23)
57 #define NFC_CS1 (1<<22)
58 #define NFC_READY (1<<20)
59 #define NFC_IREQ (*(volatile unsigned long *)0xF0053060)
60 #define NFC_RST (*(volatile unsigned long *)0xF0053064)
62 /* TCC780x ECC Controller */
64 #define ECC_CTRL (*(volatile unsigned long *)0xF005B000)
65 #define ECC_M4EN (1<<6)
66 #define ECC_ENC (1<<27)
67 #define ECC_READY (1<<26)
68 #define ECC_BASE (*(volatile unsigned long *)0xF005B004)
69 #define ECC_CLR (*(volatile unsigned long *)0xF005B00C)
70 #define ECC_MLC0W (*(volatile unsigned long *)0xF005B030)
71 #define ECC_MLC1W (*(volatile unsigned long *)0xF005B034)
72 #define ECC_MLC2W (*(volatile unsigned long *)0xF005B038)
73 #define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050)
74 #define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060)
75 #define ECC_ERR (*(volatile unsigned long *)0xF005B070)
77 /* Chip characteristics, initialised by nand_get_chip_info() */
79 static int page_size
= 0;
80 static int spare_size
= 0;
81 static int pages_per_block
= 0;
82 static int blocks_per_bank
= 0;
83 static int pages_per_bank
= 0;
84 static int row_cycles
= 0;
85 static int col_cycles
= 0;
86 static int total_banks
= 0;
87 static int sectors_per_page
= 0;
88 static int bytes_per_segment
= 0;
89 static int sectors_per_segment
= 0;
90 static int segments_per_bank
= 0;
92 /* Maximum values for static buffers */
94 #define MAX_PAGE_SIZE 4096
95 #define MAX_SPARE_SIZE 128
96 #define MAX_BLOCKS_PER_BANK 8192
97 #define MAX_PAGES_PER_BLOCK 128
98 #define BLOCKS_PER_SEGMENT 4
100 /* In theory we can support 4 banks, but only 2 have been seen on 2/4/8Gb D2s */
107 #define MAX_SEGMENTS (MAX_BLOCKS_PER_BANK * MAX_BANKS / BLOCKS_PER_SEGMENT)
109 /* Logical/Physical translation table */
116 static struct lpt_entry lpt_lookup
[MAX_SEGMENTS
];
120 #define MAX_WRITE_CACHES 8
127 short page_map
[MAX_PAGES_PER_BLOCK
* BLOCKS_PER_SEGMENT
];
129 static struct write_cache write_caches
[MAX_WRITE_CACHES
];
131 static int write_caches_in_use
= 0;
134 /* Read buffer (used for reading LPT blocks only) */
135 static unsigned char page_buf
[MAX_PAGE_SIZE
+ MAX_SPARE_SIZE
]
136 __attribute__ ((aligned (4)));
139 #ifdef USE_ECC_CORRECTION
140 static unsigned int ecc_sectors_corrected
= 0;
141 static unsigned int ecc_bits_corrected
= 0;
142 static unsigned int ecc_fail_count
= 0;
146 /* Conversion functions */
148 static inline int phys_segment_to_page_addr(int phys_segment
, int page_in_seg
)
150 int page_addr
= phys_segment
* pages_per_block
* 2;
154 /* Data is located in block+1 */
155 page_addr
+= pages_per_block
;
160 /* Data is located in second plane */
161 page_addr
+= (blocks_per_bank
/2) * pages_per_block
;
164 page_addr
+= page_in_seg
/4;
170 /* NAND physical access functions */
172 static void nand_chip_select(int bank
)
176 /* Disable both chip selects */
177 GPIOB_CLEAR
= (1<<21);
178 NFC_CTRL
|= NFC_CS0
| NFC_CS1
;
182 /* NFC chip select */
189 NFC_CTRL
&= ~NFC_CS0
;
195 NFC_CTRL
&= ~NFC_CS1
;
198 /* Secondary chip select */
205 GPIOB_CLEAR
= (1<<21);
211 static void nand_read_id(int bank
, unsigned char* id_buf
)
215 /* Enable NFC bus clock */
218 /* Reset NAND controller */
221 /* Set slow cycle timings since the chip is as yet unidentified */
222 NFC_CTRL
= (NFC_CTRL
&~0xFFF) | 0x353;
224 nand_chip_select(bank
);
226 /* Set write protect */
227 GPIOB_CLEAR
= (1<<19);
232 /* Set 8-bit data width */
233 NFC_CTRL
&= ~NFC_16BIT
;
235 /* Read ID command, single address cycle */
239 /* Read the 5 chip ID bytes */
240 for (i
= 0; i
< 5; i
++)
242 id_buf
[i
] = NFC_SDATA
& 0xFF;
245 nand_chip_select(-1);
247 /* Disable NFC bus clock */
248 BCLKCTR
&= ~DEV_NAND
;
252 static void nand_read_uid(int bank
, unsigned int* uid_buf
)
256 /* Enable NFC bus clock */
259 /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
260 NFC_CTRL
= (NFC_CTRL
&~0xFFF) | 0x131;
262 nand_chip_select(bank
);
264 /* Set write protect */
267 /* Set 8-bit data width */
268 NFC_CTRL
&= ~NFC_16BIT
;
270 /* Undocumented (SAMSUNG specific?) commands set the chip into a
271 special mode allowing a normally-hidden UID block to be read. */
278 /* Write row/column address */
279 for (i
= 0; i
< col_cycles
; i
++) NFC_SADDR
= 0;
280 for (i
= 0; i
< row_cycles
; i
++) NFC_SADDR
= 0;
285 /* Wait until complete */
286 while (!(NFC_CTRL
& NFC_READY
)) {};
288 /* Copy data to buffer (data repeats after 8 words) */
289 for (i
= 0; i
< 8; i
++)
291 uid_buf
[i
] = NFC_WDATA
;
294 /* Reset the chip back to normal mode */
297 nand_chip_select(-1);
299 /* Disable NFC bus clock */
300 BCLKCTR
&= ~DEV_NAND
;
304 static void nand_read_raw(int bank
, int row
, int column
, int size
, void* buf
)
308 /* Enable NFC bus clock */
311 /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
312 NFC_CTRL
= (NFC_CTRL
&~0xFFF) | 0x131;
314 nand_chip_select(bank
);
316 /* Set write protect */
317 GPIOB_CLEAR
= (1<<19);
319 /* Set 8-bit data width */
320 NFC_CTRL
&= ~NFC_16BIT
;
325 /* Write column address */
326 for (i
= 0; i
< col_cycles
; i
++)
328 NFC_SADDR
= column
& 0xFF;
329 column
= column
>> 8;
332 /* Write row address */
333 for (i
= 0; i
< row_cycles
; i
++)
335 NFC_SADDR
= row
& 0xFF;
339 /* End of read command */
342 /* Wait until complete */
343 while (!(NFC_CTRL
& NFC_READY
)) {};
345 /* Read data into page buffer */
346 if (((unsigned int)buf
& 3) || (size
& 3))
348 /* Use byte copy since either the buffer or size are not word-aligned */
349 /* TODO: Byte copy only where necessary (use words for mid-section) */
350 for (i
= 0; i
< size
; i
++)
352 ((unsigned char*)buf
)[i
] = NFC_SDATA
;
357 /* Use 4-byte copy as buffer and size are both word-aligned */
358 for (i
= 0; i
< (size
/4); i
++)
360 ((unsigned int*)buf
)[i
] = NFC_WDATA
;
364 nand_chip_select(-1);
366 /* Disable NFC bus clock */
367 BCLKCTR
&= ~DEV_NAND
;
371 static void nand_get_chip_info(void)
374 unsigned char manuf_id
;
375 unsigned char id_buf
[8];
377 /* Read chip id from bank 0 */
378 nand_read_id(0, id_buf
);
380 manuf_id
= id_buf
[0];
384 case 0xEC: /* SAMSUNG */
386 switch(id_buf
[1]) /* Chip Id */
388 case 0xD5: /* K9LAG08UOM */
392 pages_per_block
= 128;
393 blocks_per_bank
= 8192;
400 case 0xD7: /* K9LBG08UOM */
404 pages_per_block
= 128;
405 blocks_per_bank
= 8192;
417 panicf("Unknown NAND: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
418 id_buf
[0],id_buf
[1],id_buf
[2],id_buf
[3],id_buf
[4]);
421 pages_per_bank
= blocks_per_bank
* pages_per_block
;
422 segments_per_bank
= blocks_per_bank
/ BLOCKS_PER_SEGMENT
;
423 bytes_per_segment
= page_size
* pages_per_block
* BLOCKS_PER_SEGMENT
;
424 sectors_per_page
= page_size
/ SECTOR_SIZE
;
425 sectors_per_segment
= bytes_per_segment
/ SECTOR_SIZE
;
427 /* Establish how many banks are present */
428 nand_read_id(1, id_buf
);
430 if (id_buf
[0] == manuf_id
)
432 /* Bank 1 is populated, now check if banks 2/3 are valid */
433 nand_read_id(2, id_buf
);
435 if (id_buf
[0] == manuf_id
)
437 /* Bank 2 returned matching id - check if 2/3 are shadowing 0/1 */
438 unsigned int uid_buf0
[8];
439 unsigned int uid_buf2
[8];
441 nand_read_uid(0, uid_buf0
);
442 nand_read_uid(2, uid_buf2
);
444 if (memcmp(uid_buf0
, uid_buf2
, 32) == 0)
446 /* UIDs match, assume banks 2/3 are shadowing 0/1 */
451 /* UIDs differ, assume banks 2/3 are valid */
457 /* Bank 2 returned differing id - assume 2/3 are junk */
463 /* Bank 1 returned differing id - assume it is junk */
470 1. "BMP" tag at block 0, page 0, offset <page_size> [always present]
471 2. Byte at <page_size>+4 contains number of banks [or 0xff if 1 bank]
473 If this is confirmed for all D2s we can simplify the above code and
474 also remove the icky nand_read_uid() function.
477 nand_read_raw(0, /* bank */
479 page_size
, /* offset */
482 if (strncmp(id_buf
, "BMP", 3)) panicf("BMP tag not present");
486 if (id_buf
[4] != total_banks
) panicf("BMPM total_banks mismatch");
491 static bool nand_read_sector_of_phys_page(int bank
, int page
,
492 int sector
, void* buf
)
494 #ifndef USE_ECC_CORRECTION
495 nand_read_raw(bank
, page
,
496 sector
* (SECTOR_SIZE
+16),
500 /* Not yet implemented */
506 static bool nand_read_sector_of_phys_segment(int bank
, int phys_segment
,
507 int page_in_seg
, int sector
,
510 int page_addr
= phys_segment_to_page_addr(phys_segment
,
513 return nand_read_sector_of_phys_page(bank
, page_addr
, sector
, buf
);
517 static bool nand_read_sector_of_logical_segment(int log_segment
, int sector
,
520 int page_in_segment
= sector
/ sectors_per_page
;
521 int sector_in_page
= sector
% sectors_per_page
;
523 int bank
= lpt_lookup
[log_segment
].bank
;
524 int phys_segment
= lpt_lookup
[log_segment
].phys_segment
;
526 /* Check if any of the write caches refer to this segment/page.
527 If present we need to read the cached page instead. */
532 while (!found
&& cache_num
< write_caches_in_use
)
534 if (write_caches
[cache_num
].log_segment
== log_segment
535 && write_caches
[cache_num
].page_map
[page_in_segment
] != -1)
538 bank
= write_caches
[cache_num
].bank
;
539 phys_segment
= write_caches
[cache_num
].phys_segment
;
540 page_in_segment
= write_caches
[cache_num
].page_map
[page_in_segment
];
548 return nand_read_sector_of_phys_segment(bank
, phys_segment
,
550 sector_in_page
, buf
);
556 /* Reading the LPT from NAND is not yet fully understood. This code is therefore
557 not enabled by default, as it gives much worse results than the bank-scanning
558 approach currently used. */
560 static void read_lpt_block(int bank
, int phys_segment
)
562 int page
= 1; /* table starts at page 1 of segment */
565 struct lpt_entry
* lpt_ptr
= NULL
;
567 while (cont
&& page
< pages_per_block
)
570 unsigned int* int_buf
= (int*)page_buf
;
572 nand_read_sector_of_phys_segment(bank
, phys_segment
,
573 page
, 0, /* only sector 0 is used */
576 /* Find out which chunk of the LPT table this section contains.
577 Do this by reading the logical segment number of entry 0 */
580 int first_bank
= int_buf
[0] / segments_per_bank
;
581 int first_phys_segment
= int_buf
[0] % segments_per_bank
;
583 unsigned char spare_buf
[16];
585 nand_read_raw(first_bank
,
586 phys_segment_to_page_addr(first_phys_segment
, 0),
587 SECTOR_SIZE
, /* offset */
590 int first_log_segment
= (spare_buf
[6] << 8) | spare_buf
[7];
592 lpt_ptr
= &lpt_lookup
[first_log_segment
];
594 #if defined(BOOTLOADER) && 1
595 printf("lpt @ %lx:%lx (ls:%lx)",
596 first_bank
, first_phys_segment
, first_log_segment
);
600 while (cont
&& (i
< SECTOR_SIZE
/4))
602 if (int_buf
[i
] != 0xFFFFFFFF)
604 lpt_ptr
->bank
= int_buf
[i
] / segments_per_bank
;
605 lpt_ptr
->phys_segment
= int_buf
[i
] % segments_per_bank
;
616 #endif /* USE_TCC_LPT */
619 static void read_write_cache_segment(int bank
, int phys_segment
)
622 unsigned char spare_buf
[16];
624 if (write_caches_in_use
== MAX_WRITE_CACHES
)
625 panicf("Max NAND write caches reached");
627 write_caches
[write_caches_in_use
].bank
= bank
;
628 write_caches
[write_caches_in_use
].phys_segment
= phys_segment
;
630 /* Loop over each page in the phys segment (from page 1 onwards).
631 Read spare for 1st sector, store location of page in array. */
632 for (page
= 1; page
< pages_per_block
* BLOCKS_PER_SEGMENT
; page
++)
634 unsigned short cached_page
;
635 unsigned short log_segment
;
637 nand_read_raw(bank
, phys_segment_to_page_addr(phys_segment
, page
),
638 SECTOR_SIZE
, /* offset to first sector's spare */
641 cached_page
= (spare_buf
[3] << 8) | spare_buf
[2]; /* why does endian */
642 log_segment
= (spare_buf
[6] << 8) | spare_buf
[7]; /* -ness differ? */
644 if (cached_page
!= 0xFFFF)
646 write_caches
[write_caches_in_use
].log_segment
= log_segment
;
647 write_caches
[write_caches_in_use
].page_map
[cached_page
] = page
;
650 write_caches_in_use
++;
654 int ata_read_sectors(IF_MV2(int drive
,) unsigned long start
, int incount
,
657 #ifdef HAVE_MULTIVOLUME
658 (void)drive
; /* unused for now */
660 mutex_lock(&ata_mtx
);
665 int segment
= start
/ sectors_per_segment
;
666 int secmod
= start
% sectors_per_segment
;
668 while (incount
> 0 && secmod
< sectors_per_segment
)
670 if (!nand_read_sector_of_logical_segment(segment
, secmod
, inbuf
))
672 mutex_unlock(&ata_mtx
);
676 inbuf
+= SECTOR_SIZE
;
684 mutex_unlock(&ata_mtx
);
690 mutex_unlock(&ata_mtx
);
694 int ata_write_sectors(IF_MV2(int drive
,) unsigned long start
, int count
,
697 #ifdef HAVE_MULTIVOLUME
698 (void)drive
; /* unused for now */
701 /* TODO: Learn more about TNFTL and implement this one day... */
708 void ata_spindown(int seconds
)
714 bool ata_disk_is_active(void)
730 /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
731 int ata_hard_reset(void)
737 int ata_soft_reset(void)
743 void ata_enable(bool on
)
745 /* null - flash controller is enabled/disabled as needed. */
751 int i
, bank
, phys_segment
;
752 unsigned char spare_buf
[16];
754 if (initialized
) return 0;
756 /* Get chip characteristics and number of banks */
757 nand_get_chip_info();
759 for (i
= 0; i
< MAX_SEGMENTS
; i
++)
761 lpt_lookup
[i
].bank
= -1;
762 lpt_lookup
[i
].phys_segment
= -1;
765 write_caches_in_use
= 0;
767 for (i
= 0; i
< MAX_WRITE_CACHES
; i
++)
771 write_caches
[i
].log_segment
= -1;
772 write_caches
[i
].bank
= -1;
773 write_caches
[i
].phys_segment
= -1;
775 for (page
= 0; page
< MAX_PAGES_PER_BLOCK
* 4; page
++)
777 write_caches
[i
].page_map
[page
] = -1;
781 /* Scan banks to build up block translation table */
782 for (bank
= 0; bank
< total_banks
; bank
++)
784 for (phys_segment
= 0; phys_segment
< segments_per_bank
; phys_segment
++)
786 /* Read spare bytes from first sector of each segment */
787 nand_read_raw(bank
, phys_segment_to_page_addr(phys_segment
, 0),
788 SECTOR_SIZE
, /* offset */
791 switch (spare_buf
[4]) /* block type */
796 /* Log->Phys Translation table (for Main data area) */
797 read_lpt_block(bank
, phys_segment
);
803 /* Main data area segment */
804 unsigned short segment
= (spare_buf
[6] << 8) | spare_buf
[7];
806 if (segment
< MAX_SEGMENTS
)
808 lpt_lookup
[segment
].bank
= bank
;
809 lpt_lookup
[segment
].phys_segment
= phys_segment
;
817 /* Recently-written page data (for Main data area) */
818 read_write_cache_segment(bank
, phys_segment
);
826 /* Scan banks a second time as 0x13 segments appear to override 0x17 */
827 for (bank
= 0; bank
< total_banks
; bank
++)
829 for (phys_segment
= 0; phys_segment
< segments_per_bank
; phys_segment
++)
831 /* Read spare bytes from first sector of each segment */
832 nand_read_raw(bank
, phys_segment_to_page_addr(phys_segment
, 0),
833 SECTOR_SIZE
, /* offset */
836 switch (spare_buf
[4]) /* block type */
840 /* Main data area segment */
841 unsigned short segment
= (spare_buf
[6] << 8) | spare_buf
[7];
843 if (segment
< MAX_SEGMENTS
)
845 /* 0x17 seems to override 0x13, so store in our LPT */
846 lpt_lookup
[segment
].bank
= bank
;
847 lpt_lookup
[segment
].phys_segment
= phys_segment
;
862 /* TEMP: This will return junk, it's here for compilation only */
863 unsigned short* ata_get_identify(void)
865 return (unsigned short*)0x21000000; /* Unused DRAM */