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Philips GoGear SA9200 port. Working bootloader and normal builds, including sound...
[Rockbox.git] / firmware / target / arm / ata-sd-pp.c
blob797a9f8e364a7970f7f6848b07e9d5226ddf8c10
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 Daniel Ankers
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19 #include "fat.h"
20 #include "hotswap.h"
21 #include "ata-sd-target.h"
22 #include "ata_idle_notify.h"
23 #include "system.h"
24 #include <string.h>
25 #include "thread.h"
26 #include "led.h"
27 #include "disk.h"
28 #include "cpu.h"
29 #include "panic.h"
30 #include "usb.h"
31
32 #define BLOCK_SIZE 512
33 #define SECTOR_SIZE 512
34 #define BLOCKS_PER_BANK 0x7a7800
35
36 #define STATUS_REG (*(volatile unsigned int *)(0x70008204))
37 #define REG_1 (*(volatile unsigned int *)(0x70008208))
38 #define UNKNOWN (*(volatile unsigned int *)(0x70008210))
39 #define BLOCK_SIZE_REG (*(volatile unsigned int *)(0x7000821c))
40 #define BLOCK_COUNT_REG (*(volatile unsigned int *)(0x70008220))
41 #define REG_5 (*(volatile unsigned int *)(0x70008224))
42 #define CMD_REG0 (*(volatile unsigned int *)(0x70008228))
43 #define CMD_REG1 (*(volatile unsigned int *)(0x7000822c))
44 #define CMD_REG2 (*(volatile unsigned int *)(0x70008230))
45 #define RESPONSE_REG (*(volatile unsigned int *)(0x70008234))
46 #define SD_STATE_REG (*(volatile unsigned int *)(0x70008238))
47 #define REG_11 (*(volatile unsigned int *)(0x70008240))
48 #define REG_12 (*(volatile unsigned int *)(0x70008244))
49 #define DATA_REG (*(volatile unsigned int *)(0x70008280))
50
51 /* STATUS_REG bits */
52 #define DATA_DONE (1 << 12)
53 #define CMD_DONE (1 << 13)
54 #define ERROR_BITS (0x3f)
55 #define READY_FOR_DATA (1 << 8)
56 #define FIFO_FULL (1 << 7)
57 #define FIFO_EMPTY (1 << 6)
58
59 #define CMD_OK 0x0 /* Command was successful */
60 #define CMD_ERROR_2 0x2 /* SD did not respond to command (either it doesn't
61 understand the command or is not inserted) */
62
63 /* SD States */
64 #define IDLE 0
65 #define READY 1
66 #define IDENT 2
67 #define STBY 3
68 #define TRAN 4
69 #define DATA 5
70 #define RCV 6
71 #define PRG 7
72 #define DIS 8
73
74 #define FIFO_LEN 16 /* FIFO is 16 words deep */
75
76 /* SD Commands */
77 #define GO_IDLE_STATE 0
78 #define ALL_SEND_CID 2
79 #define SEND_RELATIVE_ADDR 3
80 #define SET_DSR 4
81 #define SWITCH_FUNC 6
82 #define SELECT_CARD 7
83 #define DESELECT_CARD 7
84 #define SEND_IF_COND 8
85 #define SEND_CSD 9
86 #define SEND_CID 10
87 #define STOP_TRANSMISSION 12
88 #define SEND_STATUS 13
89 #define GO_INACTIVE_STATE 15
90 #define SET_BLOCKLEN 16
91 #define READ_SINGLE_BLOCK 17
92 #define READ_MULTIPLE_BLOCK 18
93 #define SEND_NUM_WR_BLOCKS 22
94 #define WRITE_BLOCK 24
95 #define WRITE_MULTIPLE_BLOCK 25
96 #define ERASE_WR_BLK_START 32
97 #define ERASE_WR_BLK_END 33
98 #define ERASE 38
99 #define APP_CMD 55
100
101 #define EC_OK 0
102 #define EC_FAILED 1
103 #define EC_NOCARD 2
104 #define EC_WAIT_STATE_FAILED 3
105 #define EC_CHECK_TIMEOUT_FAILED 4
106 #define EC_POWER_UP 5
107 #define EC_READ_TIMEOUT 6
108 #define EC_WRITE_TIMEOUT 7
109 #define EC_TRAN_SEL_BANK 8
110 #define EC_TRAN_READ_ENTRY 9
111 #define EC_TRAN_READ_EXIT 10
112 #define EC_TRAN_WRITE_ENTRY 11
113 #define EC_TRAN_WRITE_EXIT 12
114 #define EC_FIFO_SEL_BANK_EMPTY 13
115 #define EC_FIFO_SEL_BANK_DONE 14
116 #define EC_FIFO_ENA_BANK_EMPTY 15
117 #define EC_FIFO_READ_FULL 16
118 #define EC_FIFO_WR_EMPTY 17
119 #define EC_FIFO_WR_DONE 18
120 #define EC_COMMAND 19
121 #define NUM_EC 20
122
123 /* Application Specific commands */
124 #define SET_BUS_WIDTH 6
125 #define SD_APP_OP_COND 41
126
127 /** global, exported variables **/
128 #ifdef HAVE_HOTSWAP
129 #define NUM_VOLUMES 2
130 #else
131 #define NUM_VOLUMES 1
132 #endif
133
134 /* for compatibility */
135 int ata_spinup_time = 0;
136
137 long last_disk_activity = -1;
138
139 /** static, private data **/
140 static bool initialized = false;
141
142 static long next_yield = 0;
143 #define MIN_YIELD_PERIOD 1000
144
145 static tSDCardInfo card_info[2];
146 static tSDCardInfo *currcard = NULL; /* current active card */
147
148 struct sd_card_status
149 {
150 int retry;
151 int retry_max;
152 };
153
154 static struct sd_card_status sd_status[NUM_VOLUMES] =
155 {
156 { 0, 1 },
157 #ifdef HAVE_HOTSWAP
158 { 0, 10 }
159 #endif
160 };
161
162 /* Shoot for around 75% usage */
163 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x1c0)/sizeof(long)];
164 static const char sd_thread_name[] = "ata/sd";
165 static struct mutex sd_mtx SHAREDBSS_ATTR;
166 static struct event_queue sd_queue;
167
168 /* Posted when card plugged status has changed */
169 #define SD_HOTSWAP 1
170 /* Actions taken by sd_thread when card status has changed */
171 enum sd_thread_actions
172 {
173 SDA_NONE = 0x0,
174 SDA_UNMOUNTED = 0x1,
175 SDA_MOUNTED = 0x2
176 };
177
178 /* Private Functions */
179
180 static unsigned int check_time[NUM_EC];
181
182 static inline bool sd_check_timeout(long timeout, int id)
183 {
184 return !TIME_AFTER(USEC_TIMER, check_time[id] + timeout);
185 }
186
187 static bool sd_poll_status(unsigned int trigger, long timeout)
188 {
189 long t = USEC_TIMER;
190
191 while ((STATUS_REG & trigger) == 0)
192 {
193 long time = USEC_TIMER;
194
195 if (TIME_AFTER(time, next_yield))
196 {
197 long ty = USEC_TIMER;
198 yield();
199 timeout += USEC_TIMER - ty;
200 next_yield = ty + MIN_YIELD_PERIOD;
201 }
202
203 if (TIME_AFTER(time, t + timeout))
204 return false;
205 }
206
207 return true;
208 }
209
210 static int sd_command(unsigned int cmd, unsigned long arg1,
211 unsigned int *response, unsigned int type)
212 {
213 int i, words; /* Number of 16 bit words to read from RESPONSE_REG */
214 unsigned int data[9];
215
216 CMD_REG0 = cmd;
217 CMD_REG1 = (unsigned int)((arg1 & 0xffff0000) >> 16);
218 CMD_REG2 = (unsigned int)((arg1 & 0xffff));
219 UNKNOWN = type;
220
221 if (!sd_poll_status(CMD_DONE, 100000))
222 return -EC_COMMAND;
223
224 if ((STATUS_REG & ERROR_BITS) != CMD_OK)
225 /* Error sending command */
226 return -EC_COMMAND - (STATUS_REG & ERROR_BITS)*100;
227
228 if (cmd == GO_IDLE_STATE)
229 return 0; /* no response here */
230
231 words = (type == 2) ? 9 : 3;
232
233 for (i = 0; i < words; i++) /* RESPONSE_REG is read MSB first */
234 data[i] = RESPONSE_REG; /* Read most significant 16-bit word */
235
236 if (response == NULL)
237 {
238 /* response discarded */
239 }
240 else if (type == 2)
241 {
242 /* Response type 2 has the following structure:
243 * [135:135] Start Bit - '0'
244 * [134:134] Transmission bit - '0'
245 * [133:128] Reserved - '111111'
246 * [127:001] CID or CSD register including internal CRC7
247 * [000:000] End Bit - '1'
248 */
249 response[3] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
250 response[2] = (data[2]<<24) + (data[3]<<8) + (data[4]>>8);
251 response[1] = (data[4]<<24) + (data[5]<<8) + (data[6]>>8);
252 response[0] = (data[6]<<24) + (data[7]<<8) + (data[8]>>8);
253 }
254 else
255 {
256 /* Response types 1, 1b, 3, 6, 7 have the following structure:
257 * Types 4 and 5 are not supported.
258 *
259 * [47] Start bit - '0'
260 * [46] Transmission bit - '0'
261 * [45:40] R1, R1b, R6, R7: Command index
262 * R3: Reserved - '111111'
263 * [39:8] R1, R1b: Card Status
264 * R3: OCR Register
265 * R6: [31:16] RCA
266 * [15: 0] Card Status Bits 23, 22, 19, 12:0
267 * [23] COM_CRC_ERROR
268 * [22] ILLEGAL_COMMAND
269 * [19] ERROR
270 * [12:9] CURRENT_STATE
271 * [8] READY_FOR_DATA
272 * [7:6]
273 * [5] APP_CMD
274 * [4]
275 * [3] AKE_SEQ_ERROR
276 * [2] Reserved
277 * [1:0] Reserved for test mode
278 * R7: [19:16] Voltage accepted
279 * [15:8] echo-back of check pattern
280 * [7:1] R1, R1b: CRC7
281 * R3: Reserved - '1111111'
282 * [0] End Bit - '1'
283 */
284 response[0] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
285 }
286
287 return 0;
288 }
289
290 static int sd_wait_for_state(unsigned int state, int id)
291 {
292 unsigned int response = 0;
293 unsigned int timeout = 0x80000;
294
295 check_time[id] = USEC_TIMER;
296
297 while (1)
298 {
299 int ret = sd_command(SEND_STATUS, currcard->rca, &response, 1);
300 long us;
301
302 if (ret < 0)
303 return ret*100 - id;
304
305 if (((response >> 9) & 0xf) == state)
306 {
307 SD_STATE_REG = state;
308 return 0;
309 }
310
311 if (!sd_check_timeout(timeout, id))
312 return -EC_WAIT_STATE_FAILED*100 - id;
313
314 us = USEC_TIMER;
315 if (TIME_AFTER(us, next_yield))
316 {
317 yield();
318 timeout += USEC_TIMER - us;
319 next_yield = us + MIN_YIELD_PERIOD;
320 }
321 }
322 }
323
324 static inline void copy_read_sectors_fast(unsigned char **buf)
325 {
326 /* Copy one chunk of 16 words using best method for start alignment */
327 switch ( (intptr_t)*buf & 3 )
328 {
329 case 0:
330 asm volatile (
331 "ldmia %[data], { r2-r9 } \r\n"
332 "orr r2, r2, r3, lsl #16 \r\n"
333 "orr r4, r4, r5, lsl #16 \r\n"
334 "orr r6, r6, r7, lsl #16 \r\n"
335 "orr r8, r8, r9, lsl #16 \r\n"
336 "stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
337 "ldmia %[data], { r2-r9 } \r\n"
338 "orr r2, r2, r3, lsl #16 \r\n"
339 "orr r4, r4, r5, lsl #16 \r\n"
340 "orr r6, r6, r7, lsl #16 \r\n"
341 "orr r8, r8, r9, lsl #16 \r\n"
342 "stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
343 : [buf]"+&r"(*buf)
344 : [data]"r"(&DATA_REG)
345 : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9"
346 );
347 break;
348 case 1:
349 asm volatile (
350 "ldmia %[data], { r2-r9 } \r\n"
351 "orr r3, r2, r3, lsl #16 \r\n"
352 "strb r3, [%[buf]], #1 \r\n"
353 "mov r3, r3, lsr #8 \r\n"
354 "strh r3, [%[buf]], #2 \r\n"
355 "mov r3, r3, lsr #16 \r\n"
356 "orr r3, r3, r4, lsl #8 \r\n"
357 "orr r3, r3, r5, lsl #24 \r\n"
358 "mov r5, r5, lsr #8 \r\n"
359 "orr r5, r5, r6, lsl #8 \r\n"
360 "orr r5, r5, r7, lsl #24 \r\n"
361 "mov r7, r7, lsr #8 \r\n"
362 "orr r7, r7, r8, lsl #8 \r\n"
363 "orr r7, r7, r9, lsl #24 \r\n"
364 "mov r2, r9, lsr #8 \r\n"
365 "stmia %[buf]!, { r3, r5, r7 } \r\n"
366 "ldmia %[data], { r3-r10 } \r\n"
367 "orr r2, r2, r3, lsl #8 \r\n"
368 "orr r2, r2, r4, lsl #24 \r\n"
369 "mov r4, r4, lsr #8 \r\n"
370 "orr r4, r4, r5, lsl #8 \r\n"
371 "orr r4, r4, r6, lsl #24 \r\n"
372 "mov r6, r6, lsr #8 \r\n"
373 "orr r6, r6, r7, lsl #8 \r\n"
374 "orr r6, r6, r8, lsl #24 \r\n"
375 "mov r8, r8, lsr #8 \r\n"
376 "orr r8, r8, r9, lsl #8 \r\n"
377 "orr r8, r8, r10, lsl #24 \r\n"
378 "mov r10, r10, lsr #8 \r\n"
379 "stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
380 "strb r10, [%[buf]], #1 \r\n"
381 : [buf]"+&r"(*buf)
382 : [data]"r"(&DATA_REG)
383 : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
384 );
385 break;
386 case 2:
387 asm volatile (
388 "ldmia %[data], { r2-r9 } \r\n"
389 "strh r2, [%[buf]], #2 \r\n"
390 "orr r3, r3, r4, lsl #16 \r\n"
391 "orr r5, r5, r6, lsl #16 \r\n"
392 "orr r7, r7, r8, lsl #16 \r\n"
393 "stmia %[buf]!, { r3, r5, r7 } \r\n"
394 "ldmia %[data], { r2-r8, r10 } \r\n"
395 "orr r2, r9, r2, lsl #16 \r\n"
396 "orr r3, r3, r4, lsl #16 \r\n"
397 "orr r5, r5, r6, lsl #16 \r\n"
398 "orr r7, r7, r8, lsl #16 \r\n"
399 "stmia %[buf]!, { r2, r3, r5, r7 } \r\n"
400 "strh r10, [%[buf]], #2 \r\n"
401 : [buf]"+&r"(*buf)
402 : [data]"r"(&DATA_REG)
403 : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
404 );
405 break;
406 case 3:
407 asm volatile (
408 "ldmia %[data], { r2-r9 } \r\n"
409 "orr r3, r2, r3, lsl #16 \r\n"
410 "strb r3, [%[buf]], #1 \r\n"
411 "mov r3, r3, lsr #8 \r\n"
412 "orr r3, r3, r4, lsl #24 \r\n"
413 "mov r4, r4, lsr #8 \r\n"
414 "orr r5, r4, r5, lsl #8 \r\n"
415 "orr r5, r5, r6, lsl #24 \r\n"
416 "mov r6, r6, lsr #8 \r\n"
417 "orr r7, r6, r7, lsl #8 \r\n"
418 "orr r7, r7, r8, lsl #24 \r\n"
419 "mov r8, r8, lsr #8 \r\n"
420 "orr r2, r8, r9, lsl #8 \r\n"
421 "stmia %[buf]!, { r3, r5, r7 } \r\n"
422 "ldmia %[data], { r3-r10 } \r\n"
423 "orr r2, r2, r3, lsl #24 \r\n"
424 "mov r3, r3, lsr #8 \r\n"
425 "orr r4, r3, r4, lsl #8 \r\n"
426 "orr r4, r4, r5, lsl #24 \r\n"
427 "mov r5, r5, lsr #8 \r\n"
428 "orr r6, r5, r6, lsl #8 \r\n"
429 "orr r6, r6, r7, lsl #24 \r\n"
430 "mov r7, r7, lsr #8 \r\n"
431 "orr r8, r7, r8, lsl #8 \r\n"
432 "orr r8, r8, r9, lsl #24 \r\n"
433 "mov r9, r9, lsr #8 \r\n"
434 "orr r10, r9, r10, lsl #8 \r\n"
435 "stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
436 "strh r10, [%[buf]], #2 \r\n"
437 "mov r10, r10, lsr #16 \r\n"
438 "strb r10, [%[buf]], #1 \r\n"
439 : [buf]"+&r"(*buf)
440 : [data]"r"(&DATA_REG)
441 : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
442 );
443 break;
444 }
445 }
446
447 static inline void copy_read_sectors_slow(unsigned char** buf)
448 {
449 int cnt = FIFO_LEN;
450 int t;
451
452 /* Copy one chunk of 16 words */
453 asm volatile (
454 "1: \r\n"
455 "ldrh %[t], [%[data]] \r\n"
456 "strb %[t], [%[buf]], #1 \r\n"
457 "mov %[t], %[t], lsr #8 \r\n"
458 "strb %[t], [%[buf]], #1 \r\n"
459 "subs %[cnt], %[cnt], #1 \r\n"
460 "bgt 1b \r\n"
461 : [cnt]"+&r"(cnt), [buf]"+&r"(*buf),
462 [t]"=&r"(t)
463 : [data]"r"(&DATA_REG)
464 );
465 }
466
467 /* Writes have to be kept slow for now */
468 static inline void copy_write_sectors(const unsigned char** buf)
469 {
470 int cnt = FIFO_LEN;
471 unsigned t;
472
473 do
474 {
475 t = *(*buf)++;
476 t |= *(*buf)++ << 8;
477 DATA_REG = t;
478 } while (--cnt > 0); /* tail loop is faster */
479 }
480
481 static int sd_select_bank(unsigned char bank)
482 {
483 unsigned char card_data[512];
484 const unsigned char* write_buf;
485 int i, ret;
486
487 memset(card_data, 0, 512);
488
489 ret = sd_wait_for_state(TRAN, EC_TRAN_SEL_BANK);
490 if (ret < 0)
491 return ret;
492
493 BLOCK_SIZE_REG = 512;
494 BLOCK_COUNT_REG = 1;
495
496 ret = sd_command(35, 0, NULL, 0x1c0d); /* CMD35 is vendor specific */
497 if (ret < 0)
498 return ret;
499
500 SD_STATE_REG = PRG;
501
502 card_data[0] = bank;
503
504 /* Write the card data */
505 write_buf = card_data;
506 for (i = 0; i < BLOCK_SIZE/2; i += FIFO_LEN)
507 {
508 /* Wait for the FIFO to empty */
509 if (sd_poll_status(FIFO_EMPTY, 10000))
510 {
511 copy_write_sectors(&write_buf); /* Copy one chunk of 16 words */
512 continue;
513 }
514
515 return -EC_FIFO_SEL_BANK_EMPTY;
516 }
517
518 if (!sd_poll_status(DATA_DONE, 10000))
519 return -EC_FIFO_SEL_BANK_DONE;
520
521 currcard->current_bank = bank;
522
523 return 0;
524 }
525
526 static void sd_card_mux(int card_no)
527 {
528 /* Set the current card mux */
529 #if defined(SANSA_E200) || defined(PHILIPS_SA9200)
530 if (card_no == 0)
531 {
532 GPO32_VAL |= 0x4;
533
534 GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
535 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
536 GPIO_SET_BITWISE(GPIOD_ENABLE, 0x1f);
537 GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
538 GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
539
540 outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
541 }
542 else
543 {
544 GPO32_VAL &= ~0x4;
545
546 GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
547 GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
548 GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
549 GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
550 GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
551
552 outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
553 }
554 #else /* SANSA_C200 */
555 if (card_no == 0)
556 {
557 GPO32_VAL |= 0x4;
558
559 GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
560 GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
561 GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
562 GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
563 GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
564
565 outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
566 }
567 else
568 {
569 GPO32_VAL &= ~0x4;
570
571 GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
572 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
573 GPIO_SET_BITWISE(GPIOD_ENABLE, 0x1f);
574 GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
575 GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
576
577 outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
578 }
579 #endif
580 }
581
582 static void sd_init_device(int card_no)
583 {
584 /* SD Protocol registers */
585 #ifdef HAVE_HOTSWAP
586 unsigned int response = 0;
587 #endif
588 unsigned int i;
589 unsigned int c_size;
590 unsigned long c_mult;
591 unsigned char carddata[512];
592 unsigned char *dataptr;
593 int ret;
594
595 /* Enable and initialise controller */
596 REG_1 = 6;
597
598 /* Initialise card data as blank */
599 memset(currcard, 0, sizeof(*currcard));
600
601 /* Switch card mux to card to initialize */
602 sd_card_mux(card_no);
603
604 /* Init NAND */
605 REG_11 |= (1 << 15);
606 REG_12 |= (1 << 15);
607 REG_12 &= ~(3 << 12);
608 REG_12 |= (1 << 13);
609 REG_11 &= ~(3 << 12);
610 REG_11 |= (1 << 13);
611
612 DEV_EN |= DEV_ATA; /* Enable controller */
613 DEV_RS |= DEV_ATA; /* Reset controller */
614 DEV_RS &=~DEV_ATA; /* Clear Reset */
615
616 SD_STATE_REG = TRAN;
617
618 REG_5 = 0xf;
619
620 ret = sd_command(GO_IDLE_STATE, 0, NULL, 256);
621 if (ret < 0)
622 goto card_init_error;
623
624 check_time[EC_POWER_UP] = USEC_TIMER;
625
626 #ifdef HAVE_HOTSWAP
627 /* Check for SDHC:
628 - non-SDHC cards simply ignore SEND_IF_COND (CMD8) and we get error -219,
629 which we can just ignore and assume we're dealing with standard SD.
630 - SDHC cards echo back the argument into the response. This is how we
631 tell if the card is SDHC.
632 */
633 ret = sd_command(SEND_IF_COND,0x1aa, &response,7);
634 if ( (ret < 0) && (ret!=-219) )
635 goto card_init_error;
636 #endif
637
638 while ((currcard->ocr & (1 << 31)) == 0) /* until card is powered up */
639 {
640 ret = sd_command(APP_CMD, currcard->rca, NULL, 1);
641 if (ret < 0)
642 goto card_init_error;
643
644 #ifdef HAVE_HOTSWAP
645 if(response == 0x1aa)
646 {
647 /* SDHC */
648 ret = sd_command(SD_APP_OP_COND, (1<<30)|0x100000,
649 &currcard->ocr, 3);
650 }
651 else
652 #endif /* HAVE_HOTSWAP */
653 {
654 /* SD Standard */
655 ret = sd_command(SD_APP_OP_COND, 0x100000, &currcard->ocr, 3);
656 }
657
658 if (ret < 0)
659 goto card_init_error;
660
661 if (!sd_check_timeout(5000000, EC_POWER_UP))
662 {
663 ret = -EC_POWER_UP;
664 goto card_init_error;
665 }
666 }
667
668 ret = sd_command(ALL_SEND_CID, 0, currcard->cid, 2);
669 if (ret < 0)
670 goto card_init_error;
671
672 ret = sd_command(SEND_RELATIVE_ADDR, 0, &currcard->rca, 1);
673 if (ret < 0)
674 goto card_init_error;
675
676 ret = sd_command(SEND_CSD, currcard->rca, currcard->csd, 2);
677 if (ret < 0)
678 goto card_init_error;
679
680 /* These calculations come from the Sandisk SD card product manual */
681 if( (currcard->csd[3]>>30) == 0)
682 {
683 /* CSD version 1.0 */
684 c_size = ((currcard->csd[2] & 0x3ff) << 2) + (currcard->csd[1]>>30) + 1;
685 c_mult = 4 << ((currcard->csd[1] >> 15) & 7);
686 currcard->max_read_bl_len = 1 << ((currcard->csd[2] >> 16) & 15);
687 currcard->block_size = BLOCK_SIZE; /* Always use 512 byte blocks */
688 currcard->numblocks = c_size * c_mult * (currcard->max_read_bl_len/512);
689 currcard->capacity = currcard->numblocks * currcard->block_size;
690 }
691 #ifdef HAVE_HOTSWAP
692 else if( (currcard->csd[3]>>30) == 1)
693 {
694 /* CSD version 2.0 */
695 c_size = ((currcard->csd[2] & 0x3f) << 16) + (currcard->csd[1]>>16) + 1;
696 currcard->max_read_bl_len = 1 << ((currcard->csd[2] >> 16) & 0xf);
697 currcard->block_size = BLOCK_SIZE; /* Always use 512 byte blocks */
698 currcard->numblocks = c_size << 10;
699 currcard->capacity = currcard->numblocks * currcard->block_size;
700 }
701 #endif /* HAVE_HOTSWAP */
702
703 REG_1 = 0;
704
705 ret = sd_command(SELECT_CARD, currcard->rca, NULL, 129);
706 if (ret < 0)
707 goto card_init_error;
708
709 ret = sd_command(APP_CMD, currcard->rca, NULL, 1);
710 if (ret < 0)
711 goto card_init_error;
712
713 ret = sd_command(SET_BUS_WIDTH, currcard->rca | 2, NULL, 1); /* 4 bit */
714 if (ret < 0)
715 goto card_init_error;
716
717 ret = sd_command(SET_BLOCKLEN, currcard->block_size, NULL, 1);
718 if (ret < 0)
719 goto card_init_error;
720
721 BLOCK_SIZE_REG = currcard->block_size;
722
723 /* If this card is >4GB & not SDHC, then we need to enable bank switching */
724 if( (currcard->numblocks >= BLOCKS_PER_BANK) &&
725 ((currcard->ocr & (1<<30)) == 0) )
726 {
727 SD_STATE_REG = TRAN;
728 BLOCK_COUNT_REG = 1;
729
730 ret = sd_command(SWITCH_FUNC, 0x80ffffef, NULL, 0x1c05);
731 if (ret < 0)
732 goto card_init_error;
733
734 /* Read 512 bytes from the card.
735 The first 512 bits contain the status information
736 TODO: Do something useful with this! */
737 dataptr = carddata;
738 for (i = 0; i < BLOCK_SIZE/2; i += FIFO_LEN)
739 {
740 /* Wait for the FIFO to be full */
741 if (sd_poll_status(FIFO_FULL, 100000))
742 {
743 copy_read_sectors_slow(&dataptr);
744 continue;
745 }
746
747 ret = -EC_FIFO_ENA_BANK_EMPTY;
748 goto card_init_error;
749 }
750 }
751
752 currcard->initialized = 1;
753 return;
754
755 /* Card failed to initialize so disable it */
756 card_init_error:
757 currcard->initialized = ret;
758 }
759
760 /* lock must already be aquired */
761 static void sd_select_device(int card_no)
762 {
763 currcard = &card_info[card_no];
764
765 if (card_no == 0)
766 {
767 /* Main card always gets a chance */
768 sd_status[0].retry = 0;
769 }
770
771 if (currcard->initialized > 0)
772 {
773 /* This card is already initialized - switch to it */
774 sd_card_mux(card_no);
775 return;
776 }
777
778 if (currcard->initialized == 0)
779 {
780 /* Card needs (re)init */
781 sd_init_device(card_no);
782 }
783 }
784
785 /* API Functions */
786
787 static void ata_led(bool onoff)
788 {
789 led(onoff);
790 }
791
792 int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
793 void* inbuf)
794 {
795 #ifndef HAVE_HOTSWAP
796 const int drive = 0;
797 #endif
798 int ret;
799 unsigned char *buf, *buf_end;
800 int bank;
801
802 /* TODO: Add DMA support. */
803
804 mutex_lock(&sd_mtx);
805
806 ata_led(true);
807
808 ata_read_retry:
809 if (drive != 0 && !card_detect_target())
810 {
811 /* no external sd-card inserted */
812 ret = -EC_NOCARD;
813 goto ata_read_error;
814 }
815
816 sd_select_device(drive);
817
818 if (currcard->initialized < 0)
819 {
820 ret = currcard->initialized;
821 goto ata_read_error;
822 }
823
824 last_disk_activity = current_tick;
825
826 /* Only switch banks with non-SDHC cards */
827 if((currcard->ocr & (1<<30))==0)
828 {
829 bank = start / BLOCKS_PER_BANK;
830
831 if (currcard->current_bank != bank)
832 {
833 ret = sd_select_bank(bank);
834 if (ret < 0)
835 goto ata_read_error;
836 }
837
838 start -= bank * BLOCKS_PER_BANK;
839 }
840
841 ret = sd_wait_for_state(TRAN, EC_TRAN_READ_ENTRY);
842 if (ret < 0)
843 goto ata_read_error;
844
845 BLOCK_COUNT_REG = incount;
846
847 #ifdef HAVE_HOTSWAP
848 if(currcard->ocr & (1<<30) )
849 {
850 /* SDHC */
851 ret = sd_command(READ_MULTIPLE_BLOCK, start, NULL, 0x1c25);
852 }
853 else
854 #endif
855 {
856 ret = sd_command(READ_MULTIPLE_BLOCK, start * BLOCK_SIZE, NULL, 0x1c25);
857 }
858 if (ret < 0)
859 goto ata_read_error;
860
861 /* TODO: Don't assume BLOCK_SIZE == SECTOR_SIZE */
862
863 buf_end = (unsigned char *)inbuf + incount * currcard->block_size;
864 for (buf = inbuf; buf < buf_end;)
865 {
866 /* Wait for the FIFO to be full */
867 if (sd_poll_status(FIFO_FULL, 0x80000))
868 {
869 copy_read_sectors_fast(&buf); /* Copy one chunk of 16 words */
870 /* TODO: Switch bank if necessary */
871 continue;
872 }
873
874 ret = -EC_FIFO_READ_FULL;
875 goto ata_read_error;
876 }
877
878 last_disk_activity = current_tick;
879
880 ret = sd_command(STOP_TRANSMISSION, 0, NULL, 1);
881 if (ret < 0)
882 goto ata_read_error;
883
884 ret = sd_wait_for_state(TRAN, EC_TRAN_READ_EXIT);
885 if (ret < 0)
886 goto ata_read_error;
887
888 while (1)
889 {
890 ata_led(false);
891 mutex_unlock(&sd_mtx);
892
893 return ret;
894
895 ata_read_error:
896 if (sd_status[drive].retry < sd_status[drive].retry_max
897 && ret != -EC_NOCARD)
898 {
899 sd_status[drive].retry++;
900 currcard->initialized = 0;
901 goto ata_read_retry;
902 }
903 }
904 }
905
906 int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
907 const void* outbuf)
908 {
909 /* Write support is not finished yet */
910 /* TODO: The standard suggests using ACMD23 prior to writing multiple blocks
911 to improve performance */
912 #ifndef HAVE_HOTSWAP
913 const int drive = 0;
914 #endif
915 int ret;
916 const unsigned char *buf, *buf_end;
917 int bank;
918
919 mutex_lock(&sd_mtx);
920
921 ata_led(true);
922
923 ata_write_retry:
924 if (drive != 0 && !card_detect_target())
925 {
926 /* no external sd-card inserted */
927 ret = -EC_NOCARD;
928 goto ata_write_error;
929 }
930
931 sd_select_device(drive);
932
933 if (currcard->initialized < 0)
934 {
935 ret = currcard->initialized;
936 goto ata_write_error;
937 }
938
939 /* Only switch banks with non-SDHC cards */
940 if((currcard->ocr & (1<<30))==0)
941 {
942 bank = start / BLOCKS_PER_BANK;
943
944 if (currcard->current_bank != bank)
945 {
946 ret = sd_select_bank(bank);
947 if (ret < 0)
948 goto ata_write_error;
949 }
950
951 start -= bank * BLOCKS_PER_BANK;
952 }
953
954 check_time[EC_WRITE_TIMEOUT] = USEC_TIMER;
955
956 ret = sd_wait_for_state(TRAN, EC_TRAN_WRITE_ENTRY);
957 if (ret < 0)
958 goto ata_write_error;
959
960 BLOCK_COUNT_REG = count;
961
962 #ifdef HAVE_HOTSWAP
963 if(currcard->ocr & (1<<30) )
964 {
965 /* SDHC */
966 ret = sd_command(WRITE_MULTIPLE_BLOCK, start, NULL, 0x1c2d);
967 }
968 else
969 #endif
970 {
971 ret = sd_command(WRITE_MULTIPLE_BLOCK, start*BLOCK_SIZE, NULL, 0x1c2d);
972 }
973 if (ret < 0)
974 goto ata_write_error;
975
976 buf_end = outbuf + count * currcard->block_size - 2*FIFO_LEN;
977
978 for (buf = outbuf; buf <= buf_end;)
979 {
980 if (buf == buf_end)
981 {
982 /* Set SD_STATE_REG to PRG for the last buffer fill */
983 SD_STATE_REG = PRG;
984 }
985
986 udelay(2); /* needed here (loop is too fast :-) */
987
988 /* Wait for the FIFO to empty */
989 if (sd_poll_status(FIFO_EMPTY, 0x80000))
990 {
991 copy_write_sectors(&buf); /* Copy one chunk of 16 words */
992 /* TODO: Switch bank if necessary */
993 continue;
994 }
995
996 ret = -EC_FIFO_WR_EMPTY;
997 goto ata_write_error;
998 }
999
1000 last_disk_activity = current_tick;
1001
1002 if (!sd_poll_status(DATA_DONE, 0x80000))
1003 {
1004 ret = -EC_FIFO_WR_DONE;
1005 goto ata_write_error;
1006 }
1007
1008 ret = sd_command(STOP_TRANSMISSION, 0, NULL, 1);
1009 if (ret < 0)
1010 goto ata_write_error;
1011
1012 ret = sd_wait_for_state(TRAN, EC_TRAN_WRITE_EXIT);
1013 if (ret < 0)
1014 goto ata_write_error;
1015
1016 while (1)
1017 {
1018 ata_led(false);
1019 mutex_unlock(&sd_mtx);
1020
1021 return ret;
1022
1023 ata_write_error:
1024 if (sd_status[drive].retry < sd_status[drive].retry_max
1025 && ret != -EC_NOCARD)
1026 {
1027 sd_status[drive].retry++;
1028 currcard->initialized = 0;
1029 goto ata_write_retry;
1030 }
1031 }
1032 }
1033
1034 static void sd_thread(void) __attribute__((noreturn));
1035 static void sd_thread(void)
1036 {
1037 struct queue_event ev;
1038 bool idle_notified = false;
1039
1040 while (1)
1041 {
1042 queue_wait_w_tmo(&sd_queue, &ev, HZ);
1043
1044 switch ( ev.id )
1045 {
1046 #ifdef HAVE_HOTSWAP
1047 case SYS_HOTSWAP_INSERTED:
1048 case SYS_HOTSWAP_EXTRACTED:
1049 fat_lock(); /* lock-out FAT activity first -
1050 prevent deadlocking via disk_mount that
1051 would cause a reverse-order attempt with
1052 another thread */
1053 mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
1054 into driver that bypass the fat cache */
1055
1056 /* We now have exclusive control of fat cache and ata */
1057
1058 disk_unmount(1); /* release "by force", ensure file
1059 descriptors aren't leaked and any busy
1060 ones are invalid if mounting */
1061
1062 /* Force card init for new card, re-init for re-inserted one or
1063 * clear if the last attempt to init failed with an error. */
1064 card_info[1].initialized = 0;
1065 sd_status[1].retry = 0;
1066
1067 if (ev.id == SYS_HOTSWAP_INSERTED)
1068 disk_mount(1);
1069
1070 queue_broadcast(SYS_FS_CHANGED, 0);
1071
1072 /* Access is now safe */
1073 mutex_unlock(&sd_mtx);
1074 fat_unlock();
1075 break;
1076 #endif
1077 case SYS_TIMEOUT:
1078 if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
1079 {
1080 idle_notified = false;
1081 }
1082 else
1083 {
1084 /* never let a timer wrap confuse us */
1085 next_yield = USEC_TIMER;
1086
1087 if (!idle_notified)
1088 {
1089 call_ata_idle_notifys(false);
1090 idle_notified = true;
1091 }
1092 }
1093 break;
1094 case SYS_USB_CONNECTED:
1095 usb_acknowledge(SYS_USB_CONNECTED_ACK);
1096 /* Wait until the USB cable is extracted again */
1097 usb_wait_for_disconnect(&sd_queue);
1098
1099 break;
1100 case SYS_USB_DISCONNECTED:
1101 usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
1102 break;
1103 }
1104 }
1105 }
1106
1107
1108 void ata_spindown(int seconds)
1109 {
1110 (void)seconds;
1111 }
1112
1113 bool ata_disk_is_active(void)
1114 {
1115 return 0;
1116 }
1117
1118 void ata_sleep(void)
1119 {
1120 }
1121
1122 void ata_spin(void)
1123 {
1124 }
1125
1126 /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
1127 int ata_hard_reset(void)
1128 {
1129 return 0;
1130 }
1131
1132 int ata_soft_reset(void)
1133 {
1134 return 0;
1135 }
1136
1137 void ata_enable(bool on)
1138 {
1139 if(on)
1140 {
1141 DEV_EN |= DEV_ATA; /* Enable controller */
1142 }
1143 else
1144 {
1145 DEV_EN &= ~DEV_ATA; /* Disable controller */
1146 }
1147 }
1148
1149 #ifdef HAVE_HOTSWAP
1150 void card_enable_monitoring_target(bool on)
1151 {
1152 if (on)
1153 {
1154 #ifdef SANSA_E200
1155 GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
1156 #elif defined(SANSA_C200)
1157 GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
1158 #endif
1159 }
1160 else
1161 {
1162 #ifdef SANSA_E200
1163 GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1164 #elif defined(SANSA_C200)
1165 GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1166 #endif
1167 }
1168 }
1169 #endif
1170
1171 int ata_init(void)
1172 {
1173 int ret = 0;
1174
1175 if (!initialized)
1176 mutex_init(&sd_mtx);
1177
1178 mutex_lock(&sd_mtx);
1179
1180 ata_led(false);
1181
1182 if (!initialized)
1183 {
1184 initialized = true;
1185
1186 /* init controller */
1187 outl(inl(0x70000088) & ~(0x4), 0x70000088);
1188 outl(inl(0x7000008c) & ~(0x4), 0x7000008c);
1189 GPO32_ENABLE |= 0x4;
1190
1191 GPIO_SET_BITWISE(GPIOG_ENABLE, (0x3 << 5));
1192 GPIO_SET_BITWISE(GPIOG_OUTPUT_EN, (0x3 << 5));
1193 GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, (0x3 << 5));
1194
1195 #ifdef HAVE_HOTSWAP
1196 /* enable card detection port - mask interrupt first */
1197 #ifdef SANSA_E200
1198 GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1199
1200 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x80);
1201 GPIO_SET_BITWISE(GPIOA_ENABLE, 0x80);
1202 #elif defined SANSA_C200
1203 GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1204
1205 GPIO_CLEAR_BITWISE(GPIOL_OUTPUT_EN, 0x08);
1206 GPIO_SET_BITWISE(GPIOL_ENABLE, 0x08);
1207 #endif
1208 #endif
1209 sd_select_device(0);
1210
1211 if (currcard->initialized < 0)
1212 ret = currcard->initialized;
1213
1214 queue_init(&sd_queue, true);
1215 create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
1216 sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE)
1217 IF_COP(, CPU));
1218
1219 /* enable interupt for the mSD card */
1220 sleep(HZ/10);
1221 #ifdef HAVE_HOTSWAP
1222 #ifdef SANSA_E200
1223 CPU_INT_EN = HI_MASK;
1224 CPU_HI_INT_EN = GPIO0_MASK;
1225
1226 GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
1227
1228 GPIOA_INT_CLR = 0x80;
1229 #elif defined SANSA_C200
1230 CPU_INT_EN = HI_MASK;
1231 CPU_HI_INT_EN = GPIO2_MASK;
1232
1233 GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
1234
1235 GPIOL_INT_CLR = 0x08;
1236 #endif
1237 #endif
1238 }
1239
1240 mutex_unlock(&sd_mtx);
1241
1242 return ret;
1243 }
1244
1245 /* move the sd-card info to mmc struct */
1246 tCardInfo *card_get_info_target(int card_no)
1247 {
1248 int i, temp;
1249 static tCardInfo card;
1250 static const char mantissa[] = { /* *10 */
1251 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 };
1252 static const int exponent[] = { /* use varies */
1253 1,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000 };
1254
1255 card.initialized = card_info[card_no].initialized;
1256 card.ocr = card_info[card_no].ocr;
1257 for(i=0; i<4; i++) card.csd[i] = card_info[card_no].csd[3-i];
1258 for(i=0; i<4; i++) card.cid[i] = card_info[card_no].cid[3-i];
1259 card.numblocks = card_info[card_no].numblocks;
1260 card.blocksize = card_info[card_no].block_size;
1261 card.size = card_info[card_no].capacity < 0xffffffff ?
1262 card_info[card_no].capacity : 0xffffffff;
1263 card.block_exp = card_info[card_no].block_exp;
1264 temp = card_extract_bits(card.csd, 29, 3);
1265 card.speed = mantissa[card_extract_bits(card.csd, 25, 4)]
1266 * exponent[temp > 2 ? 7 : temp + 4];
1267 card.nsac = 100 * card_extract_bits(card.csd, 16, 8);
1268 temp = card_extract_bits(card.csd, 13, 3);
1269 card.tsac = mantissa[card_extract_bits(card.csd, 9, 4)]
1270 * exponent[temp] / 10;
1271 card.cid[0] = htobe32(card.cid[0]); /* ascii chars here */
1272 card.cid[1] = htobe32(card.cid[1]); /* ascii chars here */
1273 temp = *((char*)card.cid+13); /* adjust year<=>month, 1997 <=> 2000 */
1274 *((char*)card.cid+13) = (unsigned char)((temp >> 4) | (temp << 4)) + 3;
1275
1276 return &card;
1277 }
1278
1279 bool card_detect_target(void)
1280 {
1281 #ifdef HAVE_HOTSWAP
1282 #ifdef SANSA_E200
1283 return (GPIOA_INPUT_VAL & 0x80) == 0; /* low active */
1284 #elif defined SANSA_C200
1285 return (GPIOL_INPUT_VAL & 0x08) != 0; /* high active */
1286 #endif
1287 #else
1288 return false;
1289 #endif
1290 }
1291
1292 #ifdef HAVE_HOTSWAP
1293 static bool sd1_oneshot_callback(struct timeout *tmo)
1294 {
1295 (void)tmo;
1296
1297 /* This is called only if the state was stable for 300ms - check state
1298 * and post appropriate event. */
1299 if (card_detect_target())
1300 queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
1301 else
1302 queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
1303
1304 return false;
1305 }
1306
1307 /* called on insertion/removal interrupt */
1308 void microsd_int(void)
1309 {
1310 static struct timeout sd1_oneshot;
1311
1312 #ifdef SANSA_E200
1313 GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1314 GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
1315 GPIOA_INT_CLR = 0x80;
1316 GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
1317
1318 #elif defined SANSA_C200
1319 GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1320 GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
1321 GPIOL_INT_CLR = 0x08;
1322 GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
1323 #endif
1324 timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
1325
1326 }
1327 #endif /* HAVE_HOTSWAP */
Open Source Jukebox Firmware