firmware/export/mas.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 by Linus Nielsen Feltzing
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19 #ifndef _MAS_H_
  20 #define _MAS_H_
  21
  22 #define MAS_BANK_D0 0
  23 #define MAS_BANK_D1 1
  24
  25 #define MAX_PEAK 0x8000
  26
  27 /*
  28         MAS I2C defs
  29 */
  30 #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
  31 #define MAS_ADR         0x3c
  32 #define MAS_DEV_WRITE   (MAS_ADR | 0x00)
  33 #define MAS_DEV_READ    (MAS_ADR | 0x01)
  34 #else
  35 #define MAS_ADR         0x3a
  36 #define MAS_DEV_WRITE   (MAS_ADR | 0x00)
  37 #define MAS_DEV_READ    (MAS_ADR | 0x01)
  38 #endif
  39
  40 /* registers..*/
  41 #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
  42 #define MAS_DATA_WRITE   0x68
  43 #define MAS_DATA_READ    0x69
  44 #define MAS_CODEC_WRITE  0x6c
  45 #define MAS_CODEC_READ   0x6d
  46 #define MAS_CONTROL      0x6a
  47 #define MAS_DCCF         0x76
  48 #define MAS_DCFR         0x77
  49 #else
  50 #define MAS_DATA_WRITE   0x68
  51 #define MAS_DATA_READ    0x69
  52 #define MAS_CONTROL      0x6a
  53 #endif
  54
  55 /*
  56  *      MAS register
  57  */
  58 #define MAS_REG_DCCF            0x8e
  59 #define MAS_REG_MUTE            0xaa
  60 #define MAS_REG_PIODATA         0xc8
  61 #define MAS_REG_StartUpConfig   0xe6
  62 #define MAS_REG_KPRESCALE       0xe7
  63 #define MAS_REG_KBASS           0x6b
  64 #define MAS_REG_KTREBLE         0x6f
  65 #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
  66 #define MAS_REG_KMDB_SWITCH     0x21
  67 #define MAS_REG_KMDB_STR        0x22
  68 #define MAS_REG_KMDB_HAR        0x23
  69 #define MAS_REG_KMDB_FC         0x24
  70 #define MAS_REG_KLOUDNESS       0x1e
  71 #define MAS_REG_QPEAK_L         0x0a
  72 #define MAS_REG_QPEAK_R         0x0b
  73 #define MAS_REG_DQPEAK_L        0x0c
  74 #define MAS_REG_DQPEAK_R        0x0d
  75 #define MAS_REG_KAVC            0x12
  76 #endif
  77
  78 /*
  79  * MAS commands
  80  */
  81 #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
  82 #define MAS_CMD_READ_ANCILLARY  0x50
  83 #define MAS_CMD_FAST_PRG_DL     0x60
  84 #define MAS_CMD_READ_IC_VER     0x70
  85 #define MAS_CMD_READ_REG        0xa0
  86 #define MAS_CMD_WRITE_REG       0xb0
  87 #define MAS_CMD_READ_D0_MEM     0xc0
  88 #define MAS_CMD_READ_D1_MEM     0xd0
  89 #define MAS_CMD_WRITE_D0_MEM    0xe0
  90 #define MAS_CMD_WRITE_D1_MEM    0xf0
  91 #else
  92 #define MAS_CMD_READ_ANCILLARY  0x30
  93 #define MAS_CMD_WRITE_REG       0x90
  94 #define MAS_CMD_WRITE_D0_MEM    0xa0
  95 #define MAS_CMD_WRITE_D1_MEM    0xb0
  96 #define MAS_CMD_READ_REG        0xd0
  97 #define MAS_CMD_READ_D0_MEM     0xe0
  98 #define MAS_CMD_READ_D1_MEM     0xf0
  99 #endif
 100
 101 /*
 102  * MAS D0 memory cells (MAS3587F / MAS3539F)
 103  */
 104 #if CONFIG_CODEC == MAS3587F
 105 #define MAS_D0_APP_SELECT        0x7f6
 106 #define MAS_D0_APP_RUNNING       0x7f7
 107 #define MAS_D0_ENCODER_CONTROL   0x7f0
 108 #define MAS_D0_IO_CONTROL_MAIN   0x7f1
 109 #define MAS_D0_INTERFACE_CONTROL 0x7f2
 110 #define MAS_D0_OFREQ_CONTROL     0x7f3
 111 #define MAS_D0_OUT_CLK_CONFIG    0x7f4
 112 #define MAS_D0_SPD_OUT_BITS      0x7f8
 113 #define MAS_D0_SOFT_MUTE         0x7f9
 114 #define MAS_D0_OUT_LL            0x7fc
 115 #define MAS_D0_OUT_LR            0x7fd
 116 #define MAS_D0_OUT_RL            0x7fe
 117 #define MAS_D0_OUT_RR            0x7ff
 118 #define MAS_D0_MPEG_FRAME_COUNT  0xfd0
 119 #define MAS_D0_MPEG_STATUS_1     0xfd1
 120 #define MAS_D0_MPEG_STATUS_2     0xfd2
 121 #define MAS_D0_CRC_ERROR_COUNT   0xfd3
 122
 123 #elif CONFIG_CODEC == MAS3539F
 124 #define MAS_D0_APP_SELECT        0x34b
 125 #define MAS_D0_APP_RUNNING       0x34c
 126 /* no encoder :( */
 127 #define MAS_D0_IO_CONTROL_MAIN   0x346
 128 #define MAS_D0_INTERFACE_CONTROL 0x347
 129 #define MAS_D0_OFREQ_CONTROL     0x348
 130 #define MAS_D0_OUT_CLK_CONFIG    0x349
 131 #define MAS_D0_SPD_OUT_BITS      0x351
 132 #define MAS_D0_SOFT_MUTE         0x350
 133 #define MAS_D0_OUT_LL            0x354
 134 #define MAS_D0_OUT_LR            0x355
 135 #define MAS_D0_OUT_RL            0x356
 136 #define MAS_D0_OUT_RR            0x357
 137 #define MAS_D0_MPEG_FRAME_COUNT  0xfd0
 138 #define MAS_D0_MPEG_STATUS_1     0xfd1
 139 #define MAS_D0_MPEG_STATUS_2     0xfd2
 140 #define MAS_D0_CRC_ERROR_COUNT   0xfd3
 141
 142 #else /* MAS3507D */
 143 #define MAS_D0_MPEG_FRAME_COUNT  0x300
 144 #define MAS_D0_MPEG_STATUS_1     0x301
 145 #define MAS_D0_MPEG_STATUS_2     0x302
 146 #define MAS_D0_CRC_ERROR_COUNT   0x303
 147
 148 #endif
 149
 150 int mas_default_read(unsigned short *buf);
 151 int mas_run(unsigned short address);
 152 int mas_readmem(int bank, int addr, unsigned long* dest, int len);
 153 int mas_writemem(int bank, int addr, const unsigned long* src, int len);
 154 int mas_readreg(int reg);
 155 int mas_writereg(int reg, unsigned int val);
 156 void mas_reset(void);
 157 int mas_direct_config_read(unsigned char reg);
 158 int mas_direct_config_write(unsigned char reg, unsigned int val);
 159 int mas_codec_writereg(int reg, unsigned int val);
 160 int mas_codec_readreg(int reg);
 161 unsigned long mas_readver(void);
 162
 163 #endif