firmware/target/arm/pcm-pp.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2006 by Michael Sevakis
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19 #include <stdlib.h>
  20 #include "system.h"
  21 #include "kernel.h"
  22 #include "logf.h"
  23 #include "audio.h"
  24 #include "sound.h"
  25
  26 /* peaks */
  27 #ifdef HAVE_RECORDING
  28 static unsigned long *rec_peak_addr;
  29 static int rec_peak_left, rec_peak_right;
  30 #endif
  31
  32 /** DMA **/
  33 #ifdef CPU_PP502x
  34 #define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x3f000000) >> 24)
  35 #elif CONFIG_CPU == PP5002
  36 #define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x7800000) >> 23)
  37 #endif
  38
  39 /****************************************************************************
  40  ** Playback DMA transfer
  41  **/
  42 static int pcm_freq = HW_SAMPR_DEFAULT; /* 44.1 is default */
  43
  44 /* NOTE: The order of these two variables is important if you use the iPod
  45    assembler optimised fiq handler, so don't change it. */
  46 unsigned short* p IBSS_ATTR;
  47 size_t p_size IBSS_ATTR;
  48
  49 /* ASM optimised FIQ handler. GCC fails to make use of the fact that FIQ mode
  50    has registers r8-r14 banked, and so does not need to be saved. This routine
  51    uses only these registers, and so will never touch the stack unless it
  52    actually needs to do so when calling pcm_callback_for_more. C version is
  53    still included below for reference.
  54  */
  55 #if 1
  56 void fiq(void) ICODE_ATTR __attribute__((naked));
  57 void fiq(void)
  58 {
  59     /* r12 contains IISCONFIG address (set in crt0.S to minimise code in actual
  60      * FIQ handler. r11 contains address of p (also set in crt0.S). Most other
  61      * addresses we need are generated by using offsets with these two.
  62      * r12 + 0x40 is IISFIFO_WR, and r12 + 0x0c is IISFIFO_CFG.
  63      * r8 and r9 contains local copies of p_size and p respectively.
  64      * r10 is a working register.
  65      */
  66     asm volatile (
  67 #if CONFIG_CPU == PP5002
  68         "ldr r10, =0xcf001040 \n\t" /* Some magic from iPodLinux */
  69         "ldr r10, [r10]       \n\t"
  70         "ldr r10, [r12, #0x1c]\n\t"
  71         "bic r10, r10, #0x200 \n\t" /* clear interrupt */
  72         "str r10, [r12, #0x1c]\n\t"
  73 #else
  74         "ldr r10, [r12]       \n\t"
  75         "bic r10, r10, #0x2   \n\t" /* clear interrupt */
  76         "str r10, [r12]       \n\t"
  77 #endif
  78         "ldr r8, [r11, #4]    \n\t" /* r8 = p_size */
  79         "ldr r9, [r11]        \n\t" /* r9 = p */
  80     ".loop:                   \n\t"
  81         "cmp r8, #0           \n\t" /* is p_size 0? */
  82         "beq .more_data       \n\t" /* if so, ask pcmbuf for more data */
  83     ".fifo_loop:              \n\t"
  84 #if CONFIG_CPU == PP5002
  85         "ldr r10, [r12, #0x1c]\n\t" /* read IISFIFO_CFG to check FIFO status */
  86         "and r10, r10, #0x7800000\n\t"
  87         "cmp r10, #0x800000    \n\t"
  88 #else
  89         "ldr r10, [r12, #0x0c]\n\t" /* read IISFIFO_CFG to check FIFO status */
  90         "and r10, r10, #0x3f0000\n\t"
  91         "cmp r10, #0x10000    \n\t"
  92 #endif
  93         "bls .fifo_full       \n\t" /* FIFO full, exit */
  94         "ldr r10, [r9], #4    \n\t" /* load two samples */
  95 #ifdef HAVE_AS3514
  96         "str r10, [r12, #0x40]\n\t" /* write them */
  97 #else
  98         "mov r10, r10, ror #16\n\t" /* put left sample at the top bits */
  99         "str r10, [r12, #0x40]\n\t" /* write top sample, lower sample ignored */
 100         "mov r10, r10, lsl #16\n\t" /* shift lower sample up */
 101         "str r10, [r12, #0x40]\n\t" /* then write it */
 102 #endif
 103         "subs r8, r8, #4      \n\t" /* check if we have more samples */
 104         "bne .fifo_loop       \n\t" /* yes, continue */
 105     ".more_data:              \n\t"
 106         "stmdb sp!, { r0-r3, r12, lr}\n\t" /* stack scratch regs and lr */
 107         "mov r0, r11          \n\t" /* r0 = &p */
 108         "add r1, r11, #4      \n\t" /* r1 = &p_size */
 109         "str r9, [r0]         \n\t" /* save internal copies of variables back */
 110         "str r8, [r1]         \n\t"
 111         "ldr r2, =pcm_callback_for_more\n\t"
 112         "ldr r2, [r2]         \n\t" /* get callback address */
 113         "cmp r2, #0           \n\t" /* check for null pointer */
 114         "movne lr, pc         \n\t" /* call pcm_callback_for_more */
 115         "bxne r2              \n\t"
 116         "ldmia sp!, { r0-r3, r12, lr}\n\t"
 117         "ldr r8, [r11, #4]    \n\t" /* reload p_size and p */
 118         "ldr r9, [r11]        \n\t"
 119         "cmp r8, #0           \n\t" /* did we actually get more data? */
 120         "bne .loop            \n\t" /* yes, continue to try feeding FIFO */
 121     ".dma_stop:               \n\t" /* no more data, do dma_stop() and exit */
 122         "ldr r10, =pcm_playing\n\t"
 123         "strb r8, [r10]       \n\t" /* pcm_playing = false (r8=0, look above) */
 124         "ldr r10, =pcm_paused \n\t"
 125         "strb r8, [r10]       \n\t" /* pcm_paused = false (r8=0, look above) */
 126         "ldr r10, [r12]       \n\t"
 127 #if CONFIG_CPU == PP5002
 128         "bic r10, r10, #0x4\n\t" /* disable playback FIFO */
 129         "str r10, [r12]       \n\t"
 130         "ldr r10, [r12, #0x1c]  \n\t"
 131         "bic r10, r10, #0x200   \n\t" /* clear interrupt */
 132         "str r10, [r12, #0x1c]  \n\t"
 133 #else
 134         "bic r10, r10, #0x20000002\n\t" /* disable playback FIFO and IRQ */
 135         "str r10, [r12]       \n\t"
 136 #endif
 137         "mrs r10, cpsr        \n\t"
 138         "orr r10, r10, #0x40  \n\t" /* disable FIQ */
 139         "msr cpsr_c, r10      \n\t"
 140     ".exit:                   \n\t"
 141         "str r8, [r11, #4]    \n\t"
 142         "str r9, [r11]        \n\t"
 143         "subs pc, lr, #4      \n\t" /* FIQ specific return sequence */
 144     ".fifo_full:              \n\t" /* enable IRQ and exit */
 145 #if CONFIG_CPU == PP5002
 146         "ldr r10, [r12, #0x1c]\n\t"
 147         "orr r10, r10, #0x200 \n\t" /* set interrupt */
 148         "str r10, [r12, #0x1c]\n\t"
 149 #else
 150         "ldr r10, [r12]       \n\t"
 151         "orr r10, r10, #0x2   \n\t" /* set interrupt */
 152         "str r10, [r12]       \n\t"
 153 #endif
 154         "b .exit              \n\t"
 155     );
 156 }
 157 #else /* C version for reference */
 158 void fiq(void) ICODE_ATTR __attribute__ ((interrupt ("FIQ")));
 159 void fiq(void)
 160 {
 161     /* Clear interrupt */
 162 #ifdef CPU_PP502x
 163     IISCONFIG &= ~(1 << 1);
 164 #elif CONFIG_CPU == PP5002
 165     inl(0xcf001040);
 166     IISFIFO_CFG &= ~(1<<9);
 167 #endif
 168
 169     do {
 170         while (p_size) {
 171             if (FIFO_FREE_COUNT < 2) {
 172                 /* Enable interrupt */
 173 #ifdef CPU_PP502x
 174                 IISCONFIG |= (1 << 1);
 175 #elif CONFIG_CPU == PP5002
 176                 IISFIFO_CFG |= (1<<9);
 177 #endif
 178                 return;
 179             }
 180
 181 #ifdef HAVE_AS3514
 182             IISFIFO_WR = *(int32_t *)p;
 183             p += 2;
 184 #else
 185             IISFIFO_WR = (*(p++))<<16;
 186             IISFIFO_WR = (*(p++))<<16;
 187 #endif
 188             p_size-=4;
 189         }
 190
 191         /* p is empty, get some more data */
 192         if (pcm_callback_for_more) {
 193             pcm_callback_for_more((unsigned char**)&p,&p_size);
 194         }
 195     } while (p_size);
 196
 197     /* No more data, so disable the FIFO/FIQ */
 198     pcm_play_dma_stop();
 199 }
 200 #endif /* ASM / C selection */
 201
 202 void pcm_play_dma_start(const void *addr, size_t size)
 203 {
 204     p=(unsigned short*)addr;
 205     p_size=size;
 206
 207     pcm_playing = true;
 208
 209 #ifdef CPU_PP502x
 210     CPU_INT_PRIORITY |= I2S_MASK;   /* FIQ priority for I2S */
 211     CPU_INT_EN = I2S_MASK;          /* Enable I2S interrupt */
 212 #else
 213     /* setup I2S interrupt for FIQ */
 214     outl(inl(0xcf00102c) | DMA_OUT_MASK, 0xcf00102c);
 215     outl(DMA_OUT_MASK, 0xcf001024);
 216 #endif
 217
 218     /* Clear the FIQ disable bit in cpsr_c */
 219     set_fiq_handler(fiq);
 220     enable_fiq();
 221
 222     /* Enable playback FIFO */
 223 #ifdef CPU_PP502x
 224     IISCONFIG |= (1 << 29);
 225 #elif CONFIG_CPU == PP5002
 226     IISCONFIG |= 0x4;
 227 #endif
 228
 229     /* Fill the FIFO - we assume there are enough bytes in the pcm buffer to
 230        fill the 32-byte FIFO. */
 231     while (p_size > 0) {
 232         if (FIFO_FREE_COUNT < 2) {
 233             /* Enable interrupt */
 234 #ifdef CPU_PP502x
 235             IISCONFIG |= (1 << 1);
 236 #elif CONFIG_CPU == PP5002
 237             IISFIFO_CFG |= (1<<9);
 238 #endif
 239             return;
 240         }
 241
 242 #ifdef HAVE_AS3514
 243         IISFIFO_WR = *(int32_t *)p;
 244         p += 2;
 245 #else
 246         IISFIFO_WR = (*(p++))<<16;
 247         IISFIFO_WR = (*(p++))<<16;
 248 #endif
 249         p_size-=4;
 250     }
 251 }
 252
 253 /* Stops the DMA transfer and interrupt */
 254 void pcm_play_dma_stop(void)
 255 {
 256     pcm_playing = false;
 257     if (!audio_status())
 258         pcm_paused = false;
 259
 260 #ifdef CPU_PP502x
 261     /* Disable playback FIFO and interrupt */
 262     IISCONFIG &= ~((1 << 29) | (1 << 1));
 263 #elif CONFIG_CPU == PP5002
 264
 265     /* Disable playback FIFO */
 266     IISCONFIG &= ~0x4;
 267
 268     /* Disable the interrupt */
 269     IISFIFO_CFG &= ~(1<<9);
 270 #endif
 271
 272     disable_fiq();
 273 }
 274
 275 void pcm_play_pause_pause(void)
 276 {
 277 #ifdef CPU_PP502x
 278     /* Disable playback FIFO and interrupt */
 279     IISCONFIG &= ~((1 << 29) | (1 << 1));
 280 #elif CONFIG_CPU == PP5002
 281     /* Disable the interrupt */
 282     IISFIFO_CFG &= ~(1<<9);
 283     /* Disable playback FIFO */
 284     IISCONFIG &= ~0x4;
 285 #endif
 286     disable_fiq();
 287 }
 288
 289 void pcm_play_pause_unpause(void)
 290 {
 291     /* Enable the FIFO and fill it */
 292
 293     set_fiq_handler(fiq);
 294     enable_fiq();
 295
 296     /* Enable playback FIFO */
 297 #ifdef CPU_PP502x
 298     IISCONFIG |= (1 << 29);
 299 #elif CONFIG_CPU == PP5002
 300     IISCONFIG |= 0x4;
 301 #endif
 302
 303     /* Fill the FIFO - we assume there are enough bytes in the
 304        pcm buffer to fill the 32-byte FIFO. */
 305     while (p_size > 0) {
 306         if (FIFO_FREE_COUNT < 2) {
 307             /* Enable interrupt */
 308 #ifdef CPU_PP502x
 309             IISCONFIG |= (1 << 1);
 310 #elif CONFIG_CPU == PP5002
 311             IISFIFO_CFG |= (1<<9);
 312 #endif
 313             return;
 314         }
 315
 316 #ifdef HAVE_AS3514
 317         IISFIFO_WR = *(int32_t *)p;
 318         p += 2;
 319 #else
 320         IISFIFO_WR = (*(p++))<<16;
 321         IISFIFO_WR = (*(p++))<<16;
 322 #endif
 323         p_size-=4;
 324     }
 325 }
 326
 327 void pcm_set_frequency(unsigned int frequency)
 328 {
 329     (void)frequency;
 330     pcm_freq = HW_SAMPR_DEFAULT;
 331 }
 332
 333 size_t pcm_get_bytes_waiting(void)
 334 {
 335     return p_size;
 336 }
 337
 338 void pcm_init(void)
 339 {
 340     pcm_playing = false;
 341     pcm_paused = false;
 342     pcm_callback_for_more = NULL;
 343
 344     /* Initialize default register values. */
 345     audiohw_init();
 346
 347     /* Power on */
 348     audiohw_enable_output(true);
 349
 350     /* Unmute the master channel (DAC should be at zero point now). */
 351     audiohw_mute(false);
 352
 353     /* Call pcm_play_dma_stop to initialize everything. */
 354     pcm_play_dma_stop();
 355 }
 356
 357 void pcm_postinit(void)
 358 {
 359     audiohw_postinit();
 360 }
 361
 362 /****************************************************************************
 363  ** Recording DMA transfer
 364  **/
 365 #ifdef HAVE_RECORDING
 366
 367 #ifdef HAVE_AS3514
 368 void fiq_record(void) ICODE_ATTR __attribute__((naked));
 369 void fiq_record(void)
 370 {
 371     register pcm_more_callback_type2 more_ready;
 372     register int32_t value1, value2;
 373
 374     asm volatile ("stmfd sp!, {r0-r7, ip, lr} \n");   /* Store context */
 375
 376     IISCONFIG &= ~(1 << 0);
 377
 378     if (audio_channels == 2) {
 379         /* RX is stereo */
 380         while (p_size > 0) {
 381             if (FIFO_FREE_COUNT < 2) {
 382                 /* enable interrupt */
 383                 IISCONFIG |= (1 << 0);
 384                 goto fiq_record_exit;
 385             }
 386
 387             /* Discard every other sample since ADC clock is 1/2 LRCK */
 388             value1 = IISFIFO_RD;
 389             value2 = IISFIFO_RD;
 390
 391             *(int32_t *)p = value1;
 392             p += 2;
 393             p_size -= 4;
 394
 395             /* TODO: Figure out how to do IIS loopback */
 396             if (audio_output_source != AUDIO_SRC_PLAYBACK) {
 397                 IISFIFO_WR = value1;
 398                 IISFIFO_WR = value1;
 399             }
 400         }
 401     }
 402     else {
 403         /* RX is left channel mono */
 404         while (p_size > 0) {
 405             if (FIFO_FREE_COUNT < 2) {
 406                 /* enable interrupt */
 407                 IISCONFIG |= (1 << 0);
 408                 goto fiq_record_exit;
 409             }
 410
 411             /* Discard every other sample since ADC clock is 1/2 LRCK */
 412             value1 = IISFIFO_RD;
 413             value2 = IISFIFO_RD;
 414             *p++ = value1;
 415             *p++ = value1;
 416             p_size -= 4;
 417
 418             if (audio_output_source != AUDIO_SRC_PLAYBACK) {
 419                 value1 = *((int32_t *)p - 1);
 420                 IISFIFO_WR = value1;
 421                 IISFIFO_WR = value1;
 422             }
 423         }
 424     }
 425
 426     more_ready = pcm_callback_more_ready;
 427
 428     if (more_ready == NULL || more_ready(0) < 0) {
 429         /* Finished recording */
 430         pcm_rec_dma_stop();
 431     }
 432
 433 fiq_record_exit:
 434     asm volatile("ldmfd sp!, {r0-r7, ip, lr} \n"   /* Restore context */
 435                  "subs  pc, lr, #4           \n"); /* Return from FIQ */
 436 }
 437
 438 #else
 439 static short peak_l, peak_r IBSS_ATTR;
 440
 441 void fiq_record(void) ICODE_ATTR __attribute__ ((interrupt ("FIQ")));
 442 void fiq_record(void)
 443 {
 444     short value;
 445     pcm_more_callback_type2 more_ready;
 446     int status = 0;
 447
 448     /* Clear interrupt */
 449 #ifdef CPU_PP502x
 450     IISCONFIG &= ~(1 << 0);
 451 #elif CONFIG_CPU == PP5002
 452     /* TODO */
 453 #endif
 454
 455     while (p_size > 0) {
 456         if (FIFO_FREE_COUNT < 2) {
 457             /* enable interrupt */
 458 #ifdef CPU_PP502x
 459             IISCONFIG |= (1 << 0);
 460 #elif CONFIG_CPU == PP5002
 461             /* TODO */
 462 #endif
 463             return;
 464         }
 465
 466         value = (unsigned short)(IISFIFO_RD >> 16);
 467         if (value > peak_l) peak_l = value;
 468         else if (-value > peak_l) peak_l = -value;
 469         *(p++) = value;
 470
 471         value = (unsigned short)(IISFIFO_RD >> 16);
 472         if (value > peak_r) peak_r = value;
 473         else if (-value > peak_r) peak_r = -value;
 474         *(p++) = value;
 475
 476         p_size -= 4;
 477
 478         /* If we have filled the current chunk, start a new one */
 479         if (p_size == 0) {
 480             rec_peak_left = peak_l;
 481             rec_peak_right = peak_r;
 482             peak_l = peak_r = 0;
 483         }
 484     }
 485
 486     more_ready = pcm_callback_more_ready;
 487
 488     if (more_ready != NULL && more_ready(status) >= 0)
 489         return;
 490
 491     /* Finished recording */
 492     pcm_rec_dma_stop();
 493 }
 494
 495 #endif /* HAVE_AS3514 */
 496
 497 /* Continue transferring data in */
 498 void pcm_record_more(void *start, size_t size)
 499 {
 500     rec_peak_addr = start; /* Start peaking at dest */
 501     p             = start; /* Start of RX buffer    */
 502     p_size        = size;  /* Bytes to transfer     */
 503 #ifdef CPU_PP502x
 504     IISCONFIG |= (1 << 0);
 505 #elif CONFIG_CPU == PP5002
 506     /* TODO */
 507 #endif
 508 }
 509
 510 void pcm_rec_dma_stop(void)
 511 {
 512     logf("pcm_rec_dma_stop");
 513
 514     disable_fiq();
 515
 516     /* clear interrupt, disable fifo */
 517     IISCONFIG &= ~((1 << 28) | (1 << 0));
 518
 519     /* clear rx fifo */
 520     IISFIFO_CFG |= (1 << 12);
 521
 522     pcm_recording = false;
 523 }
 524
 525 void pcm_rec_dma_start(void *addr, size_t size)
 526 {
 527     logf("pcm_rec_dma_start");
 528
 529     pcm_recording = true;
 530
 531 #ifndef HAVE_AS3514
 532     peak_l = peak_r = 0;
 533 #endif
 534
 535     p_size = size;
 536     p = addr;
 537
 538     /* setup FIQ */
 539     CPU_INT_PRIORITY |= I2S_MASK;
 540     CPU_INT_EN = I2S_MASK;
 541
 542     /* interrupt on full fifo, enable record fifo */
 543     IISCONFIG |= (1 << 28) | (1 << 0);
 544
 545     set_fiq_handler(fiq_record);
 546     enable_fiq();
 547 }
 548
 549 void pcm_close_recording(void)
 550 {
 551     logf("pcm_close_recording");
 552     pcm_rec_dma_stop();
 553 } /* pcm_close_recording */
 554
 555 void pcm_init_recording(void)
 556 {
 557     logf("pcm_init_recording");
 558
 559     pcm_recording           = false;
 560     pcm_callback_more_ready = NULL;
 561
 562 #ifdef CPU_PP502x
 563 #if defined(IPOD_COLOR) || defined (IPOD_4G)
 564     /* The usual magic from IPL - I'm guessing this configures the headphone
 565        socket to be input or output - in this case, input. */
 566     GPIOI_OUTPUT_VAL &= ~0x40;
 567     GPIOA_OUTPUT_VAL &= ~0x4;
 568 #endif
 569     /* Setup the recording FIQ handler */
 570     set_fiq_handler(fiq_record);
 571 #endif
 572
 573     pcm_rec_dma_stop();
 574 } /* pcm_init */
 575
 576 void pcm_calculate_rec_peaks(int *left, int *right)
 577 {
 578 #ifdef HAVE_AS3514
 579     if (pcm_recording)
 580     {
 581         unsigned long *start = rec_peak_addr;
 582         unsigned long *end = (unsigned long *)p;
 583
 584         if (start < end)
 585         {
 586             unsigned long *addr = start;
 587             long peak_l   = 0, peak_r   = 0;
 588             long peaksq_l = 0, peaksq_r = 0;
 589
 590             do
 591             {
 592                 long value = *addr;
 593                 long ch, chsq;
 594
 595                 ch = (int16_t)value;
 596                 chsq = ch*ch;
 597                 if (chsq > peaksq_l)
 598                     peak_l = ch, peaksq_l = chsq;
 599
 600                 ch = value >> 16;
 601                 chsq = ch*ch;
 602                 if (chsq > peaksq_r)
 603                     peak_r = ch, peaksq_r = chsq;
 604
 605                 addr += 4;
 606             }
 607             while (addr < end);
 608
 609             if (start == rec_peak_addr)
 610                 rec_peak_addr = end;
 611
 612             rec_peak_left  = abs(peak_l);
 613             rec_peak_right = abs(peak_r);
 614         }
 615     }
 616     else
 617     {
 618         rec_peak_left = rec_peak_right = 0;
 619     }
 620 #endif /* HAVE_AS3514 */
 621
 622     if (left)
 623         *left = rec_peak_left;
 624
 625     if (right)
 626         *right = rec_peak_right;
 627 }
 628 #endif /* HAVE_RECORDING */
 629
 630 /*
 631  * This function goes directly into the DMA buffer to calculate the left and
 632  * right peak values. To avoid missing peaks it tries to look forward two full
 633  * peek periods (2/HZ sec, 100% overlap), although it's always possible that
 634  * the entire period will not be visible. To reduce CPU load it only looks at
 635  * every third sample, and this can be reduced even further if needed (even
 636  * every tenth sample would still be pretty accurate).
 637  */
 638
 639 /* Check for a peak every PEAK_STRIDE samples */
 640 #define PEAK_STRIDE   3
 641 /* Up to 1/50th of a second of audio for peak calculation */
 642 /* This should use NATIVE_FREQUENCY, or eventually an adjustable freq. value */
 643 #define PEAK_SAMPLES  (44100/50)
 644 void pcm_calculate_peaks(int *left, int *right)
 645 {
 646     short *addr;
 647     short *end;
 648     {
 649         size_t samples = p_size / 4;
 650         addr = p;
 651
 652         if (samples > PEAK_SAMPLES)
 653             samples = PEAK_SAMPLES - (PEAK_STRIDE - 1);
 654         else
 655             samples -= MIN(PEAK_STRIDE - 1, samples);
 656
 657         end = &addr[samples * 2];
 658     }
 659
 660     if (left && right) {
 661         int left_peak = 0, right_peak = 0;
 662
 663         while (addr < end) {
 664             int value;
 665             if ((value = addr [0]) > left_peak)
 666                 left_peak = value;
 667             else if (-value > left_peak)
 668                 left_peak = -value;
 669
 670             if ((value = addr [PEAK_STRIDE | 1]) > right_peak)
 671                 right_peak = value;
 672             else if (-value > right_peak)
 673                 right_peak = -value;
 674
 675             addr = &addr[PEAK_STRIDE * 2];
 676         }
 677
 678         *left = left_peak;
 679         *right = right_peak;
 680     }
 681     else if (left || right) {
 682         int peak_value = 0, value;
 683
 684         if (right)
 685             addr += (PEAK_STRIDE | 1);
 686
 687         while (addr < end) {
 688             if ((value = addr [0]) > peak_value)
 689                 peak_value = value;
 690             else if (-value > peak_value)
 691                 peak_value = -value;
 692
 693             addr += PEAK_STRIDE * 2;
 694         }
 695
 696         if (left)
 697             *left = peak_value;
 698         else
 699             *right = peak_value;
 700     }
 701 }