workbench/hidds/hidd.radeon/radeon.h

   1 #ifndef RADEON_H_
   2 #define RADEON_H_
   3
   4 #include <exec/types.h>
   5
   6 typedef struct {
   7     ULONG freq;
   8     ULONG value;
   9 } RADEONTMDSPll;
  10
  11 typedef struct {
  12     UWORD   reference_freq;
  13     UWORD   reference_div;
  14     ULONG   min_pll_freq;
  15     ULONG   max_pll_freq;
  16     UWORD   xclk;
  17 } RADEONPLLRec;
  18
  19 typedef enum
  20 {
  21     DDC_NONE_DETECTED, DDC_NONE = DDC_NONE_DETECTED,
  22     DDC_MONID,
  23     DDC_DVI,
  24     DDC_VGA,
  25     DDC_CRT2
  26 } RADEONDDCType;
  27
  28 typedef enum {
  29     MT_UNKNOWN = -1,
  30     MT_NONE    = 0,
  31     MT_CRT     = 1,
  32     MT_LCD     = 2,
  33     MT_DFP     = 3,
  34     MT_CTV     = 4,
  35     MT_STV     = 5
  36 } RADEONMonitorType;
  37
  38 typedef enum
  39 {
  40     CONNECTOR_NONE,
  41     CONNECTOR_PROPRIETARY,
  42     CONNECTOR_CRT,
  43     CONNECTOR_DVI_I,
  44     CONNECTOR_DVI_D,
  45     CONNECTOR_CTV,
  46     CONNECTOR_STV,
  47     CONNECTOR_UNSUPPORTED
  48 } RADEONConnectorType;
  49
  50 typedef enum
  51 {
  52     CONNECTOR_NONE_ATOM,
  53     CONNECTOR_VGA_ATOM,
  54     CONNECTOR_DVI_I_ATOM,
  55     CONNECTOR_DVI_D_ATOM,
  56     CONNECTOR_DVI_A_ATOM,
  57     CONNECTOR_STV_ATOM,
  58     CONNECTOR_CTV_ATOM,
  59     CONNECTOR_LVDS_ATOM,
  60     CONNECTOR_DIGITAL_ATOM,
  61     CONNECTOR_UNSUPPORTED_ATOM
  62 } RADEONConnectorTypeATOM;
  63
  64 typedef enum
  65 {
  66     DAC_UNKNOWN = -1,
  67     DAC_PRIMARY = 0,
  68     DAC_TVDAC   = 1
  69 } RADEONDacType;
  70
  71 typedef enum
  72 {
  73     TMDS_UNKNOWN = -1,
  74     TMDS_INT     = 0,
  75     TMDS_EXT     = 1
  76 } RADEONTmdsType;
  77
  78 typedef struct
  79 {
  80     RADEONDDCType DDCType;
  81     RADEONDacType DACType;
  82     RADEONTmdsType TMDSType;
  83     RADEONConnectorType ConnectorType;
  84     RADEONMonitorType MonType;
  85 } RADEONConnector;
  86
  87 typedef struct {
  88     ULONG width;
  89     ULONG height;
  90     UBYTE bpp;
  91     ULONG pixelc;
  92     IPTR base;
  93     ULONG HDisplay;
  94     ULONG VDisplay;
  95     ULONG HSyncStart;
  96     ULONG HSyncEnd;
  97     ULONG HTotal;
  98     ULONG VSyncStart;
  99     ULONG VSyncEnd;
 100     ULONG VTotal;
 101     ULONG Flags;
 102 } RADEONModeInfo;
 103
 104 typedef enum {
 105     Unknown = 0,
 106     RAGE,
 107     RADEON,
 108     RV100,
 109     RS100,
 110     RV200,
 111     RS200, RS250=RS200,
 112     R200,
 113     RV250,
 114     RS300, RS350=RS300,
 115     RV280,
 116     R300,
 117     R350,  R360=R350,
 118     RV350, RV360=RV350,
 119     RV380, RV370=RV380,
 120     R420,  R423=R420,
 121
 122     CHIP_FAMILY_LAST
 123 } CardType;
 124
 125 typedef enum {
 126     CHIP_ERRATA_R300_CG         = 0x00000001,
 127     CHIP_ERRATA_PLL_DUMMYREADS  = 0x00000002,
 128     CHIP_ERRATA_PLL_DELAY       = 0x00000004
 129 } RADEONErrata;
 130
 131 #define IS_RV100_VARIANT ((sd->Card.Type == RV100) ||    \
 132     (sd->Card.Type == RV200)    || \
 133     (sd->Card.Type == RS100)    || \
 134     (sd->Card.Type == RS200)    || \
 135     (sd->Card.Type == RV250)    || \
 136     (sd->Card.Type == RV280)    || \
 137     (sd->Card.Type == RS300))
 138
 139 #define IS_R300_VARIANT ((sd->Card.Type == R300) ||    \
 140     (sd->Card.Type == RV350)    || \
 141     (sd->Card.Type == R350)    || \
 142     (sd->Card.Type == RV380)    || \
 143     (sd->Card.Type == R420))
 144
 145 struct CardState {
 146     ULONG             pixelc, HDisplay, bpp;
 147
 148     /* Common registers */
 149     ULONG             ovr_clr;
 150     ULONG             ovr_wid_left_right;
 151     ULONG             ovr_wid_top_bottom;
 152     ULONG             ov0_scale_cntl;
 153     ULONG             mpp_tb_config;
 154     ULONG             mpp_gp_config;
 155     ULONG             subpic_cntl;
 156     ULONG             viph_control;
 157     ULONG             i2c_cntl_1;
 158     ULONG             gen_int_cntl;
 159     ULONG             cap0_trig_cntl;
 160     ULONG             cap1_trig_cntl;
 161     ULONG             bus_cntl;
 162     ULONG             surface_cntl;
 163     ULONG             bios_4_scratch;
 164     ULONG             bios_5_scratch;
 165     ULONG             bios_6_scratch;
 166
 167     /* Other registers to save for VT switches */
 168     ULONG             dp_datatype;
 169     ULONG             rbbm_soft_reset;
 170     ULONG             clock_cntl_index;
 171     ULONG             amcgpio_en_reg;
 172     ULONG             amcgpio_mask;
 173
 174     /* CRTC registers */
 175     ULONG             crtc_gen_cntl;
 176     ULONG             crtc_ext_cntl;
 177     ULONG             dac_cntl;
 178     ULONG             crtc_h_total_disp;
 179     ULONG             crtc_h_sync_strt_wid;
 180     ULONG             crtc_v_total_disp;
 181     ULONG             crtc_v_sync_strt_wid;
 182     ULONG             crtc_offset;
 183     ULONG             crtc_offset_cntl;
 184     ULONG             crtc_pitch;
 185     ULONG             disp_merge_cntl;
 186     ULONG             grph_buffer_cntl;
 187     ULONG             crtc_more_cntl;
 188
 189     /* CRTC2 registers */
 190     ULONG             crtc2_gen_cntl;
 191
 192     ULONG             dac2_cntl;
 193     ULONG             disp_output_cntl;
 194     ULONG             disp_hw_debug;
 195     ULONG             disp2_merge_cntl;
 196     ULONG             grph2_buffer_cntl;
 197     ULONG             crtc2_h_total_disp;
 198     ULONG             crtc2_h_sync_strt_wid;
 199     ULONG             crtc2_v_total_disp;
 200     ULONG             crtc2_v_sync_strt_wid;
 201     ULONG             crtc2_offset;
 202     ULONG             crtc2_offset_cntl;
 203     ULONG             crtc2_pitch;
 204     /* Flat panel registers */
 205     ULONG             fp_crtc_h_total_disp;
 206     ULONG             fp_crtc_v_total_disp;
 207     ULONG             fp_gen_cntl;
 208     ULONG             fp2_gen_cntl;
 209     ULONG             fp_h_sync_strt_wid;
 210     ULONG             fp2_h_sync_strt_wid;
 211     ULONG             fp_horz_stretch;
 212     ULONG             fp_panel_cntl;
 213     ULONG             fp_v_sync_strt_wid;
 214     ULONG             fp2_v_sync_strt_wid;
 215     ULONG             fp_vert_stretch;
 216     ULONG             lvds_gen_cntl;
 217     ULONG             lvds_pll_cntl;
 218     ULONG             tmds_pll_cntl;
 219     ULONG             tmds_transmitter_cntl;
 220
 221                 /* Computed values for PLL */
 222     ULONG             dot_clock_freq;
 223     ULONG             pll_output_freq;
 224     int               feedback_div;
 225     int               post_div;
 226
 227                 /* PLL registers */
 228     unsigned          ppll_ref_div;
 229     unsigned          ppll_div_3;
 230     ULONG             htotal_cntl;
 231
 232                 /* Computed values for PLL2 */
 233     ULONG             dot_clock_freq_2;
 234     ULONG             pll_output_freq_2;
 235     int               feedback_div_2;
 236     int               post_div_2;
 237
 238                 /* PLL2 registers */
 239     ULONG             p2pll_ref_div;
 240     ULONG             p2pll_div_0;
 241     ULONG             htotal_cntl2;
 242
 243                 /* Pallet */
 244     BOOL              palette_valid;
 245     ULONG             palette[256];
 246     ULONG             palette2[256];
 247
 248     ULONG             tv_dac_cntl;
 249 };
 250
 251 struct Card {
 252     UWORD           ProductID;
 253     UWORD           VendorID;
 254     CardType        Type;
 255
 256     ULONG           *MMIO;
 257     UBYTE           *VBIOS, *vbios_org;
 258     IPTR            FbAddress;
 259     ULONG           FbUsableSize;
 260     IPTR            FrameBuffer;
 261     UWORD           ROMHeaderStart;
 262     UWORD           MasterDataStart;
 263
 264     IPTR            CursorStart;
 265
 266     BOOL            IsIGP;
 267     BOOL            cursorVisible;
 268     BOOL            IsAtomBios;
 269     BOOL            IsMobility;
 270 /* TODO: Remove IsSecondary! Clone screens instead */
 271     BOOL            IsSecondary;
 272     BOOL            HasSecondary;
 273     BOOL            R300CGWorkaround;
 274     BOOL            IsDellServer;
 275     BOOL            HasCRTC2;
 276     BOOL            HasSingleDAC;
 277     BOOL            IsDDR;
 278     BOOL            DDC1;
 279     BOOL            DDC2;
 280     BOOL            DDCBios;
 281     BOOL            OverlayOnCRTC2;
 282     BOOL            Busy;
 283
 284     BOOL ReversedDAC;     /* TVDAC used as primary dac */
 285     BOOL ReversedTMDS;    /* DDC_DVI is used for external TMDS */
 286     RADEONMonitorType   MonType2;
 287     RADEONMonitorType   MonType1;
 288
 289     RADEONErrata        ChipErrata;
 290
 291     RADEONConnector PortInfo[2];
 292     RADEONTMDSPll   tmds_pll[4];
 293     RADEONPLLRec    pll;
 294
 295     float           sclk,mclk;
 296
 297     ULONG           PanelXRes, PanelYRes;
 298     ULONG           HBlank, HOverPlus, HSyncWidth;
 299     ULONG           VBlank, VOverPlus, VSyncWidth;
 300     ULONG           DotClock;
 301     ULONG           Flags;
 302
 303     ULONG           DDCReg;
 304     ULONG           PanelPwrDly;
 305     ULONG           RamWidth;
 306     ULONG           BusCntl;
 307     ULONG           MemCntl;
 308
 309     ULONG           FIFOSlots;
 310 };
 311
 312 #define V_DBLSCAN       0x00000001
 313 #define V_CSYNC         0x00000002
 314 #define V_NHSYNC        0x00000004
 315 #define V_NVSYNC        0x00000008
 316 #define V_INTERLACE     0x10000000
 317 #define RADEON_USE_RMX  0x80000000
 318
 319 #define RADEON_IDLE_ENTRY   16
 320 #define RADEON_TIMEOUT      2000000
 321 #define RADEON_MMIOSIZE     0x80000
 322
 323 #define RADEONWaitForFifo(sd, entries)                                  \
 324 do {                                                                    \
 325     if (sd->Card.FIFOSlots < entries)                                   \
 326         RADEONWaitForFifoFunction(sd, entries);                         \
 327     sd->Card.FIFOSlots -= entries;                                      \
 328 } while (0)
 329
 330
 331 struct ati_staticdata;
 332 void SaveState(struct ati_staticdata *sd, struct CardState *save);
 333 void LoadState(struct ati_staticdata *sd, struct CardState *restore);
 334 void DPMS(struct ati_staticdata *sd, HIDDT_DPMSLevel level);
 335 void ShowHideCursor(struct ati_staticdata *sd, BOOL visible);
 336 void InitMode(struct ati_staticdata *sd, struct CardState *save,
 337                 ULONG width, ULONG height, UBYTE bpp, ULONG pixelc, IPTR base,
 338                 ULONG HDisplay, ULONG VDisplay,
 339                 ULONG HSyncStart, ULONG HSyncEnd, ULONG HTotal,
 340                 ULONG VSyncStart, ULONG VSyncEnd, ULONG VTotal);
 341 BOOL RADEONInit(struct ati_staticdata *sd);
 342
 343 IPTR AllocBitmapArea(struct ati_staticdata *sd, ULONG width, ULONG height,
 344     ULONG bpp, BOOL must_have);
 345 VOID FreeBitmapArea(struct ati_staticdata *sd, IPTR bmp, ULONG width, ULONG height, ULONG bpp);
 346 void R300CGWorkaround(struct ati_staticdata *sd);
 347 unsigned RADEONINPLL(struct ati_staticdata *sd, int addr);
 348 VOID SetGamma(struct ati_staticdata *sd, float r, float g, float b);
 349
 350 #endif /*RADEON_H_*/