arch/arm-raspi/processor/processor_init.c

   1 /*
   2     Copyright © 2013, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #define DEBUG 0
   7 #include <aros/debug.h>
   8
   9 #include <proto/exec.h>
  10 #include <proto/kernel.h>
  11 #include <aros/symbolsets.h>
  12
  13 #include <resources/processor.h>
  14
  15 #include "processor_intern.h"
  16 #include "processor_arch_intern.h"
  17
  18 #define DUMPINFO(a) a
  19
  20 LONG Processor_Init(struct ProcessorBase * ProcessorBase)
  21 {
  22     struct ARMProcessorInformation **sysprocs;
  23     unsigned int i;
  24
  25     D(bug("[processor.ARM] :%s()\n", __PRETTY_FUNCTION__));
  26
  27     sysprocs = AllocVec(ProcessorBase->cpucount * sizeof(APTR), MEMF_ANY | MEMF_CLEAR);
  28     if (sysprocs == NULL)
  29         return FALSE;
  30
  31     for (i = 0; i < ProcessorBase->cpucount; i++)
  32     {
  33         sysprocs[i] = AllocMem(sizeof(struct ARMProcessorInformation), MEMF_CLEAR);
  34         if (!sysprocs[i])
  35             return FALSE;
  36     }
  37
  38     ProcessorBase->Private1 = sysprocs;
  39
  40     /* Boot CPU is number 0. Fill in its data. */
  41     ReadProcessorInformation(sysprocs[0]);
  42
  43     DUMPINFO(
  44         if (sysprocs[0]->FamilyString)
  45         {
  46             bug("[processor.ARM] %s ARM%s Processor Core\n", sysprocs[0]->Vendor, sysprocs[0]->FamilyString);
  47         }
  48         else
  49         {
  50             bug("[processor.ARM] %s ARM Processor Core (unknown family)\n", sysprocs[0]->Vendor);
  51         }
  52
  53         if (sysprocs[0]->Features1 & FEATF_FPU_VFP4)
  54         {
  55             bug("[processor.ARM] VFPv4 Co-Processor\n");
  56         }
  57         else if (sysprocs[0]->Features1 & FEATF_FPU_VFP3_16)
  58         {
  59             bug("[processor.ARM] VFPv3 [16Double] Co-Processor\n");
  60         }
  61         else if (sysprocs[0]->Features1 & FEATF_FPU_VFP3)
  62         {
  63             bug("[processor.ARM] VFPv3 Co-Processor\n");
  64         }
  65         else if (sysprocs[0]->Features1 & FEATF_FPU_VFP2)
  66         {
  67             bug("[processor.ARM] VFPv2 Co-Processor\n");
  68         }
  69         else
  70         {
  71             bug("[processor.ARM] VFPv1 Co-Processor\n");
  72         }
  73
  74         if (sysprocs[0]->Features1 & FEATF_NEON)
  75         {
  76             bug("[processor.ARM]   NEON SIMD Extensions\n");
  77         }
  78
  79         bug("[processor.ARM] Cache Info:\n");
  80         bug("[processor.ARM]   L1 Data   : %dKb\n", sysprocs[0]->L1DataCacheSize);
  81         bug("[processor.ARM]   L1 Instr. : %dKb\n", sysprocs[0]->L1InstructionCacheSize);
  82     )
  83
  84     return TRUE;
  85 }
  86
  87 ADD2INITLIB(Processor_Init, 1);