compiler/include/resources/processor.h

   1 #ifndef RESOURCES_PROCESSOR_H
   2 #define RESOURCES_PROCESSOR_H
   3
   4 /*
   5     Copyright © 2010-2011, The AROS Development Team. All rights reserved.
   6
   7     Tags and defines for processors information queries
   8 */
   9
  10 #ifndef UTILITY_TAGITEM_H
  11 #   include <utility/tagitem.h>
  12 #endif
  13
  14 #define PROCESSORNAME "processor.resource"
  15
  16 /*
  17  * Tags.
  18  *
  19  * ARM-specific implementation:
  20  * 1. GCIT_Model   manufacturer-specific part number
  21  * 2. GCIT_Version manufacturer-specific revision and variant numbers (see macros below)
  22  * 3. GCIT_Vendor  implementer ID as defined by ARM Ltd.
  23  */
  24 #define GCIT_NumberOfProcessors     (TAG_USER +   1)
  25 #define GCIT_NumberOfCPUs           GCIT_NumberOfProcessors
  26 #define GCIT_Family                 (TAG_USER +   2)
  27 #define GCIT_Model                  (TAG_USER +   3)
  28 #define GCIT_ModelString            (TAG_USER +   4)
  29 #define GCIT_Version                (TAG_USER +   5)
  30 /* #define GCIT_VersionString      (TAG_USER +   6) */
  31 #define GCIT_FrontsideSpeed         (TAG_USER +   7)
  32 #define GCIT_ProcessorSpeed         (TAG_USER +   8)
  33 #define GCIT_L1CacheSize            (TAG_USER +   9)
  34 #define GCIT_L2CacheSize            (TAG_USER +  10)
  35 #define GCIT_L3CacheSize            (TAG_USER +  11)
  36 #define GCIT_VectorUnit             (TAG_USER +  12)
  37 /* #define GCIT_Extensions         (TAG_USER +  13) */
  38 #define GCIT_CacheLineSize          (TAG_USER +  14)
  39 /* #define GCIT_CPUPageSize        (TAG_USER +  15) */
  40 /* #define GCIT_ExecPageSize       (TAG_USER +  16) */
  41 /* #define GCIT_TimeBaseSpeed      (TAG_USER +  17) */
  42 #define GCIT_SelectedProcessor      (TAG_USER + 100)
  43 #define GCIT_L1DataCacheSize        (TAG_USER + 102)
  44 #define GCIT_L1InstructionCacheSize (TAG_USER + 103)
  45 #define GCIT_Architecture           (TAG_USER + 104)
  46 #define GCIT_Endianness             (TAG_USER + 105)
  47 #define GCIT_ProcessorLoad          (TAG_USER + 106)
  48 #define GCIT_Vendor                 (TAG_USER + 107)
  49
  50 /* Space [TAG_USER + 200, TAG_USER + 499] is reserved for boolean feature
  51    tags. Do no introduce non boolean, non feature tags in this space. */
  52 #define GCIT_FeaturesBase           (TAG_USER + 200)
  53 #define GCIT_SupportsFPU            (GCIT_FeaturesBase +   1)
  54 #define GCIT_SupportsAltiVec        (GCIT_FeaturesBase +   2)
  55 #define GCIT_SupportsVMX            (GCIT_FeaturesBase +   3)
  56 #define GCIT_SupportsMMX            (GCIT_FeaturesBase +   4)
  57 #define GCIT_SupportsMMXEXT         (GCIT_FeaturesBase +   5)
  58 #define GCIT_Supports3DNOW          (GCIT_FeaturesBase +   6)
  59 #define GCIT_Supports3DNOWEXT       (GCIT_FeaturesBase +   7)
  60 #define GCIT_SupportsSSE            (GCIT_FeaturesBase +   8)
  61 #define GCIT_SupportsSSE2           (GCIT_FeaturesBase +   9)
  62 #define GCIT_SupportsSSE3           (GCIT_FeaturesBase +  10)
  63 #define GCIT_SupportsSSSE3          (GCIT_FeaturesBase +  11)
  64 #define GCIT_SupportsSSE41          (GCIT_FeaturesBase +  12)
  65 #define GCIT_SupportsSSE42          (GCIT_FeaturesBase +  13)
  66 #define GCIT_SupportsSSE4A          (GCIT_FeaturesBase +  14)
  67 #define GCIT_SupportsVME            (GCIT_FeaturesBase +  15)
  68 #define GCIT_SupportsPSE            (GCIT_FeaturesBase +  16)
  69 #define GCIT_SupportsPAE            (GCIT_FeaturesBase +  17)
  70 #define GCIT_SupportsCX8            (GCIT_FeaturesBase +  18)
  71 #define GCIT_SupportsAPIC           (GCIT_FeaturesBase +  19)
  72 #define GCIT_SupportsCMOV           (GCIT_FeaturesBase +  20)
  73 #define GCIT_SupportsPSE36          (GCIT_FeaturesBase +  21)
  74 #define GCIT_SupportsCLFSH          (GCIT_FeaturesBase +  22)
  75 #define GCIT_SupportsACPI           (GCIT_FeaturesBase +  23)
  76 #define GCIT_SupportsFXSR           (GCIT_FeaturesBase +  24)
  77 #define GCIT_SupportsHTT            (GCIT_FeaturesBase +  25)
  78 #define GCIT_SupportsCX16           (GCIT_FeaturesBase +  26)
  79 #define GCIT_SupportsVirtualization (GCIT_FeaturesBase +  27)
  80 #define GCIT_SupportsNoExecutionBit (GCIT_FeaturesBase +  28)
  81 #define GCIT_Supports64BitMode      (GCIT_FeaturesBase +  29)
  82 #define GCIT_SupportsMSR            (GCIT_FeaturesBase +  30)
  83 #define GCIT_SupportsVFP            (GCIT_FeaturesBase +  31)
  84 #define GCIT_SupportsVFPv3          (GCIT_FeaturesBase +  32)
  85 #define GCIT_SupportsNeon           (GCIT_FeaturesBase +  33)
  86 #define GCIT_SupportsThumb          (GCIT_FeaturesBase +  34)
  87 #define GCIT_SupportsThumbEE        (GCIT_FeaturesBase +  35)
  88 #define GCIT_FeaturesLast           (TAG_USER + 499)
  89
  90 /* Processor family defines */
  91 #define CPUFAMILY_UNKNOWN             0
  92 #define CPUFAMILY_60X                 1
  93 #define CPUFAMILY_7X0                 2
  94 #define CPUFAMILY_74XX                3
  95 #define CPUFAMILY_4XX                 4
  96 #define CPUFAMILY_AMD_K5            100
  97 #define CPUFAMILY_AMD_K6            101
  98 #define CPUFAMILY_AMD_K7            102
  99 #define CPUFAMILY_AMD_K8            103
 100 #define CPUFAMILY_AMD_K9            104
 101 #define CPUFAMILY_AMD_K10           105
 102 #define CPUFAMILY_INTEL_486         106
 103 #define CPUFAMILY_INTEL_PENTIUM     107
 104 #define CPUFAMILY_INTEL_PENTIUM_PRO 108
 105 #define CPUFAMILY_INTEL_PENTIUM4    109
 106 #define CPUFAMILY_MOTOROLA_68000    110
 107 #define CPUFAMILY_ARM_3             120    /* ARM family is architecture designation */
 108 #define CPUFAMILY_ARM_4             121
 109 #define CPUFAMILY_ARM_4T            122
 110 #define CPUFAMILY_ARM_5             123
 111 #define CPUFAMILY_ARM_5T            124
 112 #define CPUFAMILY_ARM_5TE           125
 113 #define CPUFAMILY_ARM_5TEJ          126
 114 #define CPUFAMILY_ARM_6             127
 115 #define CPUFAMILY_ARM_7             128
 116
 117 /* Vector unit type */
 118 #define VECTORTYPE_NONE               0
 119 #define VECTORTYPE_ALTIVEC            1
 120 #define VECTORTYPE_VMX                2
 121 #define VECTORTYPE_MMX              100
 122 #define VECTORTYPE_MMXEXT           101
 123 #define VECTORTYPE_3DNOW            102
 124 #define VECTORTYPE_3DNOWEXT         103
 125 #define VECTORTYPE_SSE              104
 126 #define VECTORTYPE_SSE2             105
 127 #define VECTORTYPE_SSE3             106
 128 #define VECTORTYPE_SSSE3            107
 129 #define VECTORTYPE_SSE41            108
 130 #define VECTORTYPE_SSE42            109
 131 #define VECTORTYPE_SSE4A            110
 132 #define VECTORTYPE_VFP              120
 133 #define VECTORTYPE_VFPv3            121
 134 #define VECTORTYPE_NEON             122
 135
 136 /* Processor architecture defines */
 137 #define PROCESSORARCH_UNKNOWN         0
 138 #define PROCESSORARCH_M68K            1
 139 #define PROCESSORARCH_PPC             2
 140 #define PROCESSORARCH_X86             3
 141 #define PROCESSORARCH_ARM             4
 142
 143 /* Endianness */
 144 #define ENDIANNESS_UNKNOWN            0
 145 #define ENDIANNESS_LE                 1
 146 #define ENDIANNESS_BE                 2
 147
 148 /* Some generic vendor IDs */
 149 #define VENDOR_UNKNOWN                0
 150 #define VENDOR_AMD                    1
 151 #define VENDOR_INTEL                  2
 152 #define VENDOR_CYRIX                  3
 153 #define VENDOR_UMC                    4
 154 #define VENDOR_NEXGEN                 5
 155 #define VENDOR_CENTAUR                6
 156 #define VENDOR_RISE                   7
 157 #define VENDOR_SIS                    8
 158 #define VENDOR_TRANSMETA              9
 159 #define VENDOR_NSC                   10 /* National Semiconductor */
 160 #define VENDOR_MOTOROLA             256
 161
 162 /* ARM implementer IDs */
 163 #define ARM_VENDOR_ARMLTD           0x41 /* ARM Ltd                 */
 164 #define ARM_VENDOR_DEC              0x44 /* Digital Equipment Corp  */
 165 #define ARM_VENDOR_MOTOROLA         0x4D /* Motorola/Freescale      */
 166 #define ARM_VENDOR_QUALCOMM         0x51 /* Qualcomm                */
 167 #define ARM_VENDOR_MARVELL          0x56 /* Marvell Semi Inc        */
 168 #define ARM_VENDOR_INTEL            0x69 /* Intel corp              */
 169
 170 /* For ARM Version tag encodes Revision and Variant numbers */
 171 #define ARM_REVISION(x)     ((x >> 16) & 0xFFFF)
 172 #define ARM_VARIANT(x)      (x & 0xFFFF)
 173
 174 #endif /* EXEC_PROCESSORS_H */