arch/arm-raspi/kernel/intr.c

   1 /*
   2     Copyright � 2013-2015, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #include <inttypes.h>
   7 #include <aros/kernel.h>
   8 #include <aros/libcall.h>
   9 #include <hardware/intbits.h>
  10 #include <stddef.h>
  11 #include <string.h>
  12
  13 #include <proto/exec.h>
  14 #include <proto/kernel.h>
  15
  16 #include "kernel_cpu.h"
  17 #include "kernel_intern.h"
  18 #include "kernel_debug.h"
  19 #include "kernel_interrupts.h"
  20 #include "kernel_intr.h"
  21
  22 #define BOOT_STACK_SIZE         (256 << 2)
  23 #define BOOT_TAGS_SIZE          (128 << 3)
  24
  25 #define IRQBANK_POINTER(bank)   ((bank == 0) ? GPUIRQ_ENBL0 : (bank == 1) ? GPUIRQ_ENBL1 : ARMIRQ_ENBL)
  26
  27 #define DREGS(x)
  28 #define DIRQ(x)
  29 #define D(x)
  30
  31 void ictl_enable_irq(uint8_t irq, struct KernelBase *KernelBase)
  32 {
  33     int bank = IRQ_BANK(irq);
  34     unsigned int val, reg;
  35
  36     reg = IRQBANK_POINTER(bank);
  37
  38     DIRQ(bug("[KRN] Enabling irq %d [bank %d, reg 0x%p]\n", irq, bank, reg));
  39
  40     val = *((volatile unsigned int *)reg);
  41     val |= IRQ_MASK(irq);
  42     *((volatile unsigned int *)reg) = val;
  43 }
  44
  45 void ictl_disable_irq(uint8_t irq, struct KernelBase *KernelBase)
  46 {
  47     int bank = IRQ_BANK(irq);
  48     unsigned int val, reg;
  49
  50     reg = IRQBANK_POINTER(bank);
  51
  52     DIRQ(bug("[KRN] Dissabling irq %d [bank %d, reg 0x%p]\n", irq, bank, reg));
  53
  54     val = *((volatile unsigned int *)reg);
  55     val |= IRQ_MASK(irq);
  56     *((volatile unsigned int *)reg) = val;
  57 }
  58
  59 /*
  60     ** UNDEF INSTRUCTION EXCEPTION
  61     return addr = lr
  62     entered in UND mode.
  63 */
  64
  65 asm (
  66     ".set       MODE_SYSTEM, 0x1f              \n"
  67
  68     ".globl __vectorhand_undef                 \n"
  69     ".type __vectorhand_undef,%function        \n"
  70     "__vectorhand_undef:                       \n"
  71     VECTCOMMON_START
  72     "           cpsid   i, #" STR(MODE_SYSTEM)"\n" // switch to system mode, with interrupts disabled..
  73     "           str     sp, [r0, #13*4]        \n"
  74     "           str     lr, [r0, #14*4]        \n" // store lr in ctx_lr
  75     "           mov     fp, #0                 \n" // clear fp
  76
  77     "           bl      handle_undef           \n"
  78
  79     VECTCOMMON_END
  80 );
  81
  82 void handle_undef(regs_t *regs)
  83 {
  84     bug("[Kernel] Trap ARM Undef Exception -> Exception #4 (Illegal instruction)\n");
  85
  86     if (krnRunExceptionHandlers(KernelBase, 4, regs))
  87         return;
  88
  89     if (core_Trap(4, regs))
  90     {
  91         bug("[Kernel] Trap handler returned\n");
  92         return;
  93     }
  94
  95     bug("[Kernel] UNHANDLED EXCEPTION #4\n");
  96
  97     while (1)
  98         asm volatile ("mov r0, r0\n");
  99 }
 100
 101 /*
 102     ** RESET HANDLER
 103     no return address,
 104     entered in SVC mode.
 105 */
 106
 107 asm (
 108     ".globl __vectorhand_reset                          \n"
 109     ".type __vectorhand_reset,%function                 \n"
 110     "__vectorhand_reset:                                \n"
 111     "           mov     sp, #0x1000 - 16                \n" // re-use bootstrap tmp stack
 112     "           mov     r0, sp                          \n"
 113     "           sub     r0, r0, #" STR(BOOT_STACK_SIZE)"\n" // get the boottag's
 114     "           sub     r0, r0, #" STR(BOOT_TAGS_SIZE) "\n"
 115     "           mov     fp, #0                          \n" // clear fp
 116
 117     "           ldr     pc, 2f                          \n" // jump into kernel resource
 118     "1:         b       1b                              \n"
 119     "2:         .word   kernel_cstart                   \n"
 120
 121 );
 122
 123
 124 /* ** SWI HANDLER ** */
 125
 126 /** SWI handled in syscall.c */
 127
 128 /*
 129     ** IRQ HANDLER
 130     return address = lr - 4
 131     entered in IRQ mode.
 132 */
 133
 134 asm (
 135     ".set       MODE_IRQ, 0x12                 \n"
 136     ".set       MODE_SUPERVISOR, 0x13          \n"
 137     ".set       MODE_SYSTEM, 0x1f              \n"
 138
 139     ".globl __vectorhand_irq                   \n"
 140     ".type __vectorhand_irq,%function          \n"
 141     "__vectorhand_irq:                         \n"
 142     "           sub     lr, lr, #4             \n" // adjust lr_irq
 143     VECTCOMMON_START
 144     "           cpsid   i, #MODE_SYSTEM        \n" // switch to system mode, with interrupts disabled..
 145     "           str     sp, [r0, #13*4]        \n"
 146     "           str     lr, [r0, #14*4]        \n" // store lr in ctx_lr
 147     "           mov     fp, #0                 \n" // clear fp
 148
 149     "           bl      handle_irq             \n"
 150
 151     "           cpsid   i, #MODE_IRQ           \n" // switch to IRQ mode, with interrupts disabled..
 152     "           mov     r0, sp                 \n"
 153     "           mov     fp, #0                 \n" // clear fp
 154     "           bl      core_ExitInterrupt     \n"
 155     VECTCOMMON_END
 156 );
 157
 158 #define IRQ_BANK1       0x00000100
 159 #define IRQ_BANK2       0x00000200
 160
 161 void handle_irq(regs_t *regs)
 162 {
 163     unsigned int pending, processed, irq;
 164
 165     DIRQ(bug("[KRN] ## IRQ ##\n"));
 166
 167     DREGS(cpu_DumpRegs(regs));
 168
 169     pending = *((volatile unsigned int *)(ARMIRQ_PEND));
 170     DIRQ(bug("[KRN] PendingARM %08x\n", pending));
 171     if (!(pending & IRQ_BANK1))
 172     {
 173         processed = 0;
 174         for (irq = (2 << 5); irq < ((2 << 5) + 32); irq++)
 175         {
 176             if (pending & (1 << (irq - (2 << 5))))
 177             {
 178                 DIRQ(bug("[KRN] Handling IRQ %d ..\n", irq));
 179                 krnRunIRQHandlers(KernelBase, irq);
 180                 processed |= (1 << (irq - (2 << 5)));
 181             }
 182         }
 183     }
 184     else
 185     {
 186         processed = IRQ_BANK1;
 187     }
 188     if (processed) *((volatile unsigned int *)(ARMIRQ_PEND)) = (pending & ~processed);
 189
 190     pending = *((volatile unsigned int *)(GPUIRQ_PEND0));
 191     DIRQ(bug("[KRN] Pending0 %08x\n", pending));
 192     if (!(pending & IRQ_BANK2))
 193     {
 194         processed = 0;
 195         for (irq = (0 << 5); irq < ((0 << 5) + 32); irq++)
 196         {
 197             if (pending & (1 << (irq - (0 << 5))))
 198             {
 199                 DIRQ(bug("[KRN] Handling IRQ %d ..\n", irq));
 200                 krnRunIRQHandlers(KernelBase, irq);
 201                 processed |= (1 << (irq - (0 << 5)));
 202             }
 203         }
 204     }
 205     else
 206     {
 207         processed = IRQ_BANK2;
 208     }
 209     if (processed) *((volatile unsigned int *)(GPUIRQ_PEND0)) = (pending & ~processed);
 210
 211     pending = *((volatile unsigned int *)(GPUIRQ_PEND1));
 212     DIRQ(bug("[KRN] Pending1 %08x\n", pending));
 213     processed = 0;
 214     for (irq = (1 << 5); irq < ((1 << 5) + 32); irq++)
 215     {
 216             if (pending & (1 << (irq - (1 << 5))))
 217         {
 218             DIRQ(bug("[KRN] Handling IRQ %d ..\n", irq));
 219             krnRunIRQHandlers(KernelBase, irq);
 220             processed |= (1 << (irq - (1 << 5)));
 221         }
 222     }
 223     if (processed) *((volatile unsigned int *)(GPUIRQ_PEND1)) = (pending & ~processed);
 224
 225     DIRQ(bug("[KRN] IRQ processing finished\n"));
 226
 227     return;
 228 }
 229
 230 /*
 231     ** FIQ HANDLER
 232     return address = lr -4
 233     entered in FIQ mode.
 234 */
 235
 236 __attribute__ ((interrupt ("FIQ"))) void __vectorhand_fiq(void)
 237 {
 238     DIRQ(bug("[KRN] ## FIQ ##\n"));
 239
 240     return;
 241 }
 242
 243
 244 /*
 245     ** DATA ABORT EXCEPTION
 246     return address = lr - 8
 247     entered in ABT mode.
 248 */
 249
 250 asm (
 251     ".set       MODE_SYSTEM, 0x1f              \n"
 252
 253     ".globl __vectorhand_dataabort             \n"
 254     ".type __vectorhand_dataabort,%function    \n"
 255     "__vectorhand_dataabort:                   \n"
 256     "           sub     lr, lr, #8             \n" // adjust lr_irq
 257     VECTCOMMON_START
 258     "           cpsid   i, #MODE_SYSTEM        \n" // switch to system mode, with interrupts disabled..
 259     "           str     sp, [r0, #13*4]        \n"
 260     "           str     lr, [r0, #14*4]        \n" // store lr in ctx_lr
 261     "           mov     fp, #0                 \n" // clear fp
 262
 263     "           bl      handle_dataabort       \n"
 264
 265     VECTCOMMON_END
 266 );
 267
 268 void handle_dataabort(regs_t *regs)
 269 {
 270     register unsigned int far;
 271
 272     // Read fault address register
 273     asm volatile("mrc p15, 0, %[far], c6, c0, 0": [far] "=r" (far) );
 274
 275     bug("[Kernel] Trap ARM Data Abort Exception -> Exception #2 (Bus Error)\n");
 276     bug("[Kernel] attempt to access 0x%p\n", far);
 277
 278     if (krnRunExceptionHandlers(KernelBase, 2, regs))
 279         return;
 280
 281     if (core_Trap(2, regs))
 282     {
 283         bug("[Kernel] Trap handler returned\n");
 284         return;
 285     }
 286
 287     bug("[Kernel] UNHANDLED EXCEPTION #2\n");
 288
 289     while (1)
 290         asm volatile ("mov r0, r0\n");
 291 }
 292
 293 /*
 294     ** PREFETCH ABORT EXCEPTION
 295     return address = lr - 4
 296     entered in ABT mode.
 297 */
 298
 299 asm (
 300     ".set       MODE_SYSTEM, 0x1f              \n"
 301
 302     ".globl __vectorhand_prefetchabort         \n"
 303     ".type __vectorhand_prefetchabort,%function \n"
 304     "__vectorhand_prefetchabort:               \n"
 305     "           sub     lr, lr, #4             \n" // adjust lr_irq
 306     VECTCOMMON_START
 307     "           cpsid   i, #MODE_SYSTEM        \n" // switch to system mode, with interrupts disabled..
 308     "           str     sp, [r0, #13*4]        \n"
 309     "           str     lr, [r0, #14*4]        \n" // store lr in ctx_lr
 310     "           mov     fp, #0                 \n" // clear fp
 311
 312     "           bl      handle_prefetchabort   \n"
 313
 314     VECTCOMMON_END
 315 );
 316
 317 void handle_prefetchabort(regs_t *regs)
 318 {
 319     bug("[Kernel] Trap ARM Prefetch Abort Exception -> Exception #3 (Address Error)\n");
 320
 321     if (krnRunExceptionHandlers(KernelBase, 3, regs))
 322         return;
 323
 324     if (core_Trap(3, regs))
 325     {
 326         bug("[Kernel] Trap handler returned\n");
 327         return;
 328     }
 329
 330     bug("[Kernel] UNHANDLED EXCEPTION #3\n");
 331
 332     while (1)
 333         asm volatile ("mov r0, r0\n");
 334 }
 335
 336
 337 /* ** SETUP ** */
 338
 339 /* linker exports */
 340 extern void *__intvecs_start, *__intvecs_end;
 341
 342 void arm_flush_cache(uint32_t addr, uint32_t length)
 343 {
 344         while (length)
 345         {
 346                 __asm__ __volatile__("mcr p15, 0, %0, c7, c14, 1"::"r"(addr));
 347                 addr += 32;
 348                 length -= 32;
 349         }
 350         __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4"::"r"(addr));
 351 }
 352
 353 void arm_icache_invalidate(uint32_t addr, uint32_t length)
 354 {
 355         while (length)
 356         {
 357                 __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 1"::"r"(addr));
 358                 addr += 32;
 359                 length -= 32;
 360         }
 361         __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4"::"r"(addr));
 362 }
 363
 364 void core_SetupIntr(void)
 365 {
 366     int irq;
 367     bug("[KRN] Initializing cpu vectors\n");
 368
 369     /* Copy vectors into place */
 370     memcpy(0, &__intvecs_start,
 371             (unsigned int)&__intvecs_end -
 372             (unsigned int)&__intvecs_start);
 373
 374     arm_flush_cache(0, 1024);
 375     arm_icache_invalidate(0, 1024);
 376
 377     D(bug("[KRN] Copied %d bytes from 0x%p to 0x00000000\n", (unsigned int)&__intvecs_end - (unsigned int)&__intvecs_start, &__intvecs_start));
 378
 379     D(
 380         unsigned int x = 0;
 381         bug("[KRN]: Vector dump-:");
 382         for (x=0; x < (unsigned int)&__intvecs_end - (unsigned int)&__intvecs_start; x++) {
 383             if ((x%16) == 0)
 384             {
 385                 bug("\n[KRN]:     %08x:", x);
 386             }
 387             bug(" %02x", *((volatile UBYTE *)x));
 388         }
 389         bug("\n");
 390     )
 391
 392     D(bug("[KRN] Disabling IRQs\n"));
 393     *(volatile unsigned int *)ARMIRQ_DIBL = ~0;
 394     *(volatile unsigned int *)GPUIRQ_DIBL0 = ~0;
 395     *(volatile unsigned int *)GPUIRQ_DIBL1 = ~0;
 396 }