rom/devs/ata/ata.h

   1 #ifndef _ATA_H
   2 #define _ATA_H
   3
   4 /*
   5     Copyright © 2004-2018, The AROS Development Team. All rights reserved.
   6     $Id$
   7
   8     Desc: ata.device main private include file
   9     Lang: English
  10 */
  11
  12 #if !defined(__OOP_NOMETHODBASES__)
  13 #define __OOP_NOMETHODBASES__
  14 #endif
  15
  16 #include <exec/devices.h>
  17 #include <exec/semaphores.h>
  18 #include <exec/execbase.h>
  19 #include <exec/libraries.h>
  20 #include <exec/ports.h>
  21 #include <oop/oop.h>
  22 #include <utility/hooks.h>
  23 #include <utility/utility.h>
  24 #include <exec/io.h>
  25 #include <exec/errors.h>
  26 #include <devices/trackdisk.h>
  27 #include <devices/scsidisk.h>
  28 #include <devices/newstyle.h>
  29 #include <devices/timer.h>
  30 #include <devices/cd.h>
  31 #include <hardware/ata.h>
  32 #include <hidd/ata.h>
  33
  34 #include "include/devices/scsicmds.h"
  35
  36 #define MAX_DEVICEBUSES         2
  37 #define MAX_BUSUNITS            2
  38 #define STACK_SIZE              16384
  39 #define TASK_PRI                10
  40 #define TIMEOUT                 30
  41
  42 /*
  43    Don't blame me for information redundance here!
  44
  45    Please note, that all structures here are more or less chained together.
  46    The aim is, every single function in ata.device, no matter whether it takes
  47    ata_Unit or ata_Bus or God knows what else, would have access to ata device
  48    base and through it, to all other device structures.
  49
  50    I just wanted to avoid passing ataBase everywhere. :-D
  51    */
  52
  53 /* structure forward declarations */
  54 struct ata_Unit;
  55 struct ata_Bus;
  56
  57 /* ata.device base */
  58 struct ataBase
  59 {
  60     struct Device               ata_Device;                     /* Exec device structure                */
  61     struct Task                 *ata_Daemon;                    /* master task pointer                  */
  62     struct MsgPort              *DaemonPort;                    /* Daemon's message port                */
  63     struct MinList              Daemon_ios;                     /* Daemon's IORequests                  */
  64     struct SignalSemaphore      DaemonSem;
  65     struct Task                 *daemonParent;                  /* Who sends control requests to daemon */
  66     int                         ata__buscount;                  /* Number of all buses                  */
  67     struct SignalSemaphore      DetectionSem;                   /* Device detection semaphore           */
  68
  69     /* Arguments and flags */
  70     UBYTE                       ata_32bit;
  71     UBYTE                       ata_NoMulti;
  72     UBYTE                       ata_NoDMA;
  73     UBYTE                       ata_Poll;
  74
  75     /*
  76      * memory pool
  77      */
  78     APTR                        ata_MemPool;
  79
  80     ULONG                       ata_ItersPer100ns;
  81
  82     struct Library              *ata_OOPBase;
  83     struct Library              *ata_UtilityBase;
  84     BPTR                        ata_SegList;
  85
  86     /* Bus HIDD classes */
  87     OOP_Class                   *ataClass;
  88     OOP_Class                   *busClass;
  89     OOP_Class                   *unitClass;
  90
  91 #if defined(__OOP_NOATTRBASES__)
  92     OOP_AttrBase                unitAttrBase;
  93     OOP_AttrBase                hwAttrBase;
  94     OOP_AttrBase                busAttrBase;
  95     OOP_AttrBase                atabusAttrBase;
  96     OOP_AttrBase                sunitAttrBase;
  97 #endif
  98 #if defined(__OOP_NOMETHODBASES__)
  99     OOP_MethodID                hwMethodBase;
 100     OOP_MethodID                busMethodBase;
 101     OOP_MethodID                HiddSCMethodBase;
 102 #endif
 103
 104     struct List                 ata_Controllers;
 105 };
 106
 107 #if defined(__OOP_NOATTRBASES__)
 108 #undef HWAttrBase
 109 #undef HiddBusAB
 110 #undef HiddATABusAB
 111 #undef HiddATAUnitAB
 112 #undef HiddStorageUnitAB
 113 #define HWAttrBase                      (ATABase->hwAttrBase)
 114 #define HiddBusAB                       (ATABase->busAttrBase)
 115 #define HiddATABusAB                    (ATABase->atabusAttrBase)
 116 #define HiddATAUnitAB                   (ATABase->unitAttrBase)
 117 #define HiddStorageUnitAB               (ATABase->sunitAttrBase)
 118 #endif
 119
 120 #if defined(__OOP_NOMETHODBASES__)
 121 #undef HWBase
 122 #undef HiddATABusBase
 123 #define HWBase                          (ATABase->hwMethodBase)
 124 #define HiddATABusBase                  (ATABase->busMethodBase)
 125 #define HiddStorageControllerBase       (ATABase->HiddSCMethodBase)
 126 #endif
 127
 128 #define OOPBase                         (ATABase->ata_OOPBase)
 129 #define UtilityBase                     (ATABase->ata_UtilityBase)
 130
 131 struct ata_Controller
 132 {
 133     struct Node                 ac_Node;
 134     OOP_Class                   *ac_Class;
 135     OOP_Object                  *ac_Object;
 136 };
 137
 138 /*
 139    A single IDE bus (channel)
 140    */
 141 struct ata_Bus
 142 {
 143    struct ataBase               *ab_Base;                       /* device self */
 144
 145    /** Bus object data **/
 146    struct ATA_BusInterface      *busVectors;                    /* Control vector table     */
 147    struct ATA_PIOInterface      *pioVectors;                    /* PIO vector table         */
 148    APTR                         *dmaVectors;                    /* DMA vector table         */
 149    ULONG                        pioDataSize;                    /* PIO interface data size  */
 150    ULONG                        dmaDataSize;                    /* DMA interface data size  */
 151    void                         *pioInterface;                  /* PIO interface object     */
 152    void                         *dmaInterface;                  /* DMA interface object     */
 153    BOOL                         keepEmpty;                      /* Whether we should keep empty bus object */
 154    BOOL                         haveAltIO;
 155
 156    volatile UBYTE               ab_Dev[MAX_BUSUNITS];           /* Master/Slave type, see below */
 157    UBYTE                        ab_Flags;                       /* Bus flags similar to unit flags */
 158    BYTE                         ab_SleepySignal;                /* Signal used to wake the task up, when it's waiting */
 159
 160    /** Data Requests/DMA **/
 161    UBYTE                        ab_BusNum;                      /* bus id - used to calculate device id */
 162
 163    OOP_Object                   *ab_Units[MAX_BUSUNITS];        /* Units on the bus */
 164    struct ata_Unit              *ab_SelectedUnit;               /* Currently selected unit */
 165
 166    ULONG                        ab_IntCnt;
 167
 168    struct Task                  *ab_Task;                       /* Bus task handling all not-immediate transactions */
 169    struct MsgPort               *ab_MsgPort;                    /* Task's message port */
 170    struct IORequest             *ab_Timer;                      /* timer stuff */
 171
 172    struct Interrupt             ab_ResetInt;
 173
 174    APTR                         ab_BounceBufferPool;
 175
 176    /** functions go here **/
 177    void                         (*ab_HandleIRQ)(struct ata_Unit* unit, UBYTE status);
 178 };
 179
 180 /* Device types */
 181 #define DEV_NONE                        0x00
 182 #define DEV_UNKNOWN                     0x01
 183 #define DEV_ATA                         0x02
 184 #define DEV_SATA                        0x03
 185 #define DEV_ATAPI                       0x80
 186 #define DEV_SATAPI                      0x81
 187
 188 /*
 189    DriveIdent structure as returned by ATA_IDENTIFY_[DEVICE|ATAPI]
 190    */
 191 struct DriveIdent {
 192    UWORD       id_General;             // 0
 193    UWORD       id_OldCylinders;        // 1
 194    UWORD       id_SpecificConfig;      // 2
 195    UWORD       id_OldHeads;            // 3
 196    UWORD       pad1[2];                // 4-5
 197    UWORD       id_OldSectors;          // 6
 198    UWORD       pad2[3];                // 7-9
 199    UBYTE       id_SerialNumber[20];    // 10-19
 200    UWORD       pad3;                   // 20
 201    ULONG       id_BufSize;             // 21-22
 202    UBYTE       id_FirmwareRev[8];      // 23-26
 203    UBYTE       id_Model[40];           // 27-46
 204    UWORD       id_RWMultipleSize;      // 47
 205    union {
 206       UWORD    id_io32;                 // 48
 207       UWORD    id_Trusted;
 208    };
 209    UWORD       id_Capabilities;        // 49
 210    UWORD       id_OldCaps;             // 50
 211    UWORD       id_OldPIO;              // 51
 212    UWORD       id_OldDMA;              // 52
 213    UWORD       id_ConfigAvailable;     // 53
 214    UWORD       id_OldLCylinders;       // 54
 215    UWORD       id_OldLHeads;           // 55
 216    UWORD       id_OldLSectors;         // 56
 217    UWORD       pad6[2];                // 57-58
 218    UWORD       id_RWMultipleTrans;     // 59
 219    ULONG       id_LBASectors;          // 60-61
 220    UWORD       id_DMADir;              // 62
 221    UWORD       id_MWDMASupport;        // 63
 222    UWORD       id_PIOSupport;          // 64
 223    UWORD       id_MWDMA_MinCycleTime;  // 65
 224    UWORD       id_MWDMA_DefCycleTime;  // 66
 225    UWORD       id_PIO_MinCycleTime;    // 67
 226    UWORD       id_PIO_MinCycleTimeIORDY; // 68
 227    UWORD       pad8[6];                // 69-74
 228    UWORD       id_QueueDepth;          // 75
 229    UWORD       pad9[4];                // 76-79
 230    UWORD       id_ATAVersion;          // 80
 231    UWORD       id_ATARevision;         // 81
 232    UWORD       id_Commands1;           // 82
 233    UWORD       id_Commands2;           // 83
 234    UWORD       id_Commands3;           // 84
 235    UWORD       id_Commands4;           // 85
 236    UWORD       id_Commands5;           // 86
 237    UWORD       id_Commands6;           // 87
 238    UWORD       id_UDMASupport;         // 88
 239    UWORD       id_SecurityEraseTime;   // 89
 240    UWORD       id_ESecurityEraseTime;  // 90
 241    UWORD       id_CurrentAdvPowerMode; // 91
 242    UWORD       id_MasterPwdRevision;   // 92
 243    UWORD       id_HWResetResult;       // 93
 244    UWORD       id_AcousticManagement;  // 94
 245    UWORD       id_StreamMinimunReqSize;// 95
 246    UWORD       id_StreamingTimeDMA;    // 96
 247    UWORD       id_StreamingLatency;    // 97
 248    ULONG       id_StreamingGranularity; // 98-99
 249    UQUAD       id_LBA48Sectors;        // 100-103
 250    UWORD       id_StreamingTimePIO;    // 104
 251    UWORD       pad10;                  // 105
 252    UWORD       id_PhysSectorSize;      // 106
 253    UWORD       pad11;                  // 107
 254    UQUAD       id_UniqueIDi[2];        // 108-115
 255    UWORD       pad12;                  // 116
 256    ULONG       id_WordsPerLogicalSector; // 117-118
 257    UWORD       pad13[8];               // 119-126
 258    UWORD       id_RemMediaStatusNotificationFeatures; // 127
 259    UWORD       id_SecurityStatus;      // 128
 260    UWORD       pad14[40];              // 129 - 168
 261    UWORD       id_DSManagement;        // 169
 262    UWORD       pad15[86];              // 170 - 256
 263 } __attribute__((packed));
 264
 265 typedef struct
 266 {
 267    UBYTE command;       // current ATA command
 268    UBYTE feature;       // FF to indicate no feature
 269    UBYTE secmul;        // for read multiple - multiplier. default 1
 270    UBYTE pad;
 271    UQUAD blk;
 272    ULONG sectors;
 273    APTR  buffer;
 274    ULONG length;
 275    ULONG actual;
 276
 277    enum
 278    {
 279       CM_NoData,
 280       CM_PIORead,
 281       CM_PIOWrite,
 282       CM_DMARead,
 283       CM_DMAWrite
 284    } method;
 285    enum
 286    {
 287       CT_NoBlock,
 288       CT_CHS,
 289       CT_LBA28,
 290       CT_LBA48,
 291    } type;
 292 } ata_CommandBlock;
 293
 294 struct DaemonIO
 295 {
 296     struct MinNode link;
 297     struct IOStdReq req;
 298 };
 299
 300 /*
 301    Unit structure describing given device on the bus. It contains all the
 302    necessary information unit/device may need.
 303    */
 304 struct ata_Unit
 305 {
 306    struct Unit         au_Unit;        /* exec's unit */
 307    struct DriveIdent  *au_Drive;       /* Drive Ident after IDENTIFY command */
 308    struct ata_Bus     *au_Bus;         /* Bus on which this unit is */
 309    struct IOStdReq    *DaemonReq;      /* Disk change monitoring request */
 310
 311    ULONG               au_XferModes;   /* available transfer modes */
 312    ULONG               au_UseModes;    /* Used transfer modes */
 313
 314    ULONG               au_Capacity;    /* Highest sector accessible through LBA28 */
 315    UQUAD               au_Capacity48;  /* Highest sector accessible through LBA48 */
 316    ULONG               au_Cylinders;
 317    UBYTE               au_Heads;
 318    UBYTE               au_Sectors;
 319    UBYTE               au_Model[41];
 320    UBYTE               au_FirmwareRev[9];
 321    UBYTE               au_SerialNumber[21];
 322
 323    /*
 324       Here are stored pointers to functions responsible for handling this
 325       device. They are set during device initialization and point to most
 326       effective functions for this particular unit. Read/Write may be done
 327       in PIO mode reading single sectors, using multisector PIO, or
 328       multiword DMA.
 329       */
 330    BYTE                (*au_Read32    )(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 331    BYTE                (*au_Write32   )(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 332    BYTE                (*au_Read64    )(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 333    BYTE                (*au_Write64   )(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 334    BYTE                (*au_Eject     )(struct ata_Unit *);
 335    BYTE                (*au_DirectSCSI)(struct ata_Unit *, struct SCSICmd*);
 336    BYTE                (*au_Identify  )(struct ata_Unit *);
 337    VOID                (*au_ins       )(APTR, APTR, ULONG);
 338    VOID                (*au_outs      )(APTR, APTR, ULONG);
 339    void                *pioInterface;  /* PIO interface object, cached for performance */
 340
 341    ULONG               au_UnitNum;     /* Unit number as coded by device */
 342    ULONG               au_Flags;       /* Unit flags, see below */
 343    ULONG               au_ChangeNum;   /* Number of disc changes */
 344
 345    struct Interrupt   *au_RemoveInt;   /* Raise this interrupt on a disc change */
 346    struct List         au_SoftList;    /* Raise even more interrupts from this list on disc change */
 347
 348    UBYTE               au_SectorShift; /* Sector shift. 9 here is 512 bytes sector */
 349    UBYTE               au_DevMask;     /* device mask used to simplify device number coding */
 350    UBYTE               au_SenseKey;    /* Sense key from ATAPI devices */
 351    UBYTE               au_DevType;
 352
 353    /******* PIO IO ********/
 354    APTR                au_cmd_data;
 355    ULONG               au_cmd_length;
 356    ULONG               au_cmd_total;
 357    ULONG               au_cmd_error;
 358 };
 359
 360 #define AF_XFER_DMA_MASK (AF_XFER_MDMA(0)|AF_XFER_MDMA(1)|AF_XFER_MDMA(2)|                 \
 361                           AF_XFER_UDMA(0)|AF_XFER_UDMA(1)|AF_XFER_UDMA(2)|AF_XFER_UDMA(3)| \
 362                           AF_XFER_UDMA(4)|AF_XFER_UDMA(5)|AF_XFER_UDMA(6))
 363
 364 /* Unit internal flags */
 365 #define AB_DiscPresent          30     /* disc now in drive */
 366 #define AB_DiscChanged          29     /* disc changed */
 367 #define AB_Removable            28     /* media removable */
 368 #define AB_DMA                  27     /* DMA is in use */
 369 #define AB_CHSOnly              26     /* only supports CHS commands */
 370
 371 #define AF_DiscPresent          (1 << AB_DiscPresent)
 372 #define AF_DiscChanged          (1 << AB_DiscChanged)
 373 #define AF_Removable            (1 << AB_Removable)
 374 #define AF_DMA                  (1 << AB_DMA)
 375 #define AF_CHSOnly              (1 << AB_CHSOnly)
 376
 377 #define Unit(io) ((struct ata_Unit *)(io)->io_Unit)
 378 #define IOStdReq(io) ((struct IOStdReq *)io)
 379
 380 /* Function prototypes */
 381
 382 BOOL Hidd_ATABus_Start(OOP_Object *o, struct ataBase *ATABase);
 383 AROS_UFP3(BOOL, Hidd_ATABus_Open,
 384           AROS_UFPA(struct Hook *, h, A0),
 385           AROS_UFPA(OOP_Object *, obj, A2),
 386           AROS_UFPA(IPTR, reqUnit, A1));
 387
 388 void ata_InitBus(struct ata_Bus *);
 389 int atapi_TestUnitOK(struct ata_Unit *);
 390 BOOL ata_setup_unit(struct ata_Bus *bus, struct ata_Unit *unit);
 391 void ata_init_unit(struct ata_Bus *bus, struct ata_Unit *unit, UBYTE u);
 392
 393 BOOL ata_RegisterVolume(ULONG StartCyl, ULONG EndCyl, struct ata_Unit *unit);
 394 void BusTaskCode(struct ata_Bus *bus, struct ataBase *ATABase);
 395 void DaemonCode(struct ataBase *LIBBASE);
 396
 397 BYTE SCSIEmu(struct ata_Unit*, struct SCSICmd*);
 398
 399 void ata_SMARTCmd(struct IOStdReq *io);
 400 void ata_TRIMCmd(struct IOStdReq *io);
 401
 402 #define ATAPI_SS_EJECT  0x02
 403 #define ATAPI_SS_LOAD   0x03
 404
 405 struct atapi_StartStop
 406 {
 407     UBYTE   command;
 408     UBYTE   immediate;
 409     UBYTE   pad1[2];
 410     UBYTE   flags;
 411     UBYTE   pad2[7];
 412 };
 413
 414 #endif // _ATA_H
 415