workbench/devs/networks/atheros5000/hal/ar5416/ar5416_recv.c

   1 /*
   2  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
   3  * Copyright (c) 2002-2008 Atheros Communications, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  * $Id$
  18  */
  19 #include "opt_ah.h"
  20
  21 #ifdef AH_SUPPORT_AR5416
  22
  23 #include "ah.h"
  24 #include "ah_desc.h"
  25 #include "ah_internal.h"
  26
  27 #include "ar5416/ar5416.h"
  28 #include "ar5416/ar5416reg.h"
  29 #include "ar5416/ar5416desc.h"
  30
  31 /*
  32  * Start receive at the PCU engine
  33  */
  34 void
  35 ar5416StartPcuReceive(struct ath_hal *ah)
  36 {
  37         struct ath_hal_private *ahp = AH_PRIVATE(ah);
  38
  39         OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);
  40
  41         HALDEBUG(ah, HAL_DEBUG_RX, "%s: Start PCU Receive \n", __func__);
  42         ar5212EnableMibCounters(ah);
  43         /* NB: restore current settings */
  44         ar5212AniReset(ah, ahp->ah_curchan, ahp->ah_opmode, AH_TRUE);
  45 }
  46
  47 /*
  48  * Stop receive at the PCU engine
  49  * and abort current frame in PCU
  50  */
  51 void
  52 ar5416StopPcuReceive(struct ath_hal *ah)
  53 {
  54         OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);
  55
  56         HALDEBUG(ah, HAL_DEBUG_RX, "%s: Stop PCU Receive \n", __func__);
  57         ar5212DisableMibCounters(ah);
  58 }
  59
  60 /*
  61  * Initialize RX descriptor, by clearing the status and setting
  62  * the size (and any other flags).
  63  */
  64 HAL_BOOL
  65 ar5416SetupRxDesc(struct ath_hal *ah, struct ath_desc *ds,
  66     uint32_t size, u_int flags)
  67 {
  68         struct ar5416_desc *ads = AR5416DESC(ds);
  69
  70         HALASSERT((size &~ AR_BufLen) == 0);
  71
  72         ads->ds_ctl1 = size & AR_BufLen;
  73         if (flags & HAL_RXDESC_INTREQ)
  74                 ads->ds_ctl1 |= AR_RxIntrReq;
  75
  76         /* this should be enough */
  77         ads->ds_rxstatus8 &= ~AR_RxDone;
  78
  79         return AH_TRUE;
  80 }
  81
  82 /*
  83  * Process an RX descriptor, and return the status to the caller.
  84  * Copy some hardware specific items into the software portion
  85  * of the descriptor.
  86  *
  87  * NB: the caller is responsible for validating the memory contents
  88  *     of the descriptor (e.g. flushing any cached copy).
  89  */
  90 HAL_STATUS
  91 ar5416ProcRxDesc(struct ath_hal *ah, struct ath_desc *ds,
  92     uint32_t pa, struct ath_desc *nds, uint64_t tsf,
  93     struct ath_rx_status *rs)
  94 {
  95         struct ar5416_desc *ads = AR5416DESC(ds);
  96         struct ar5416_desc *ands = AR5416DESC(nds);
  97
  98         if ((ads->ds_rxstatus8 & AR_RxDone) == 0)
  99                 return HAL_EINPROGRESS;
 100         /*
 101          * Given the use of a self-linked tail be very sure that the hw is
 102          * done with this descriptor; the hw may have done this descriptor
 103          * once and picked it up again...make sure the hw has moved on.
 104          */
 105         if ((ands->ds_rxstatus8 & AR_RxDone) == 0
 106             && OS_REG_READ(ah, AR_RXDP) == pa)
 107                 return HAL_EINPROGRESS;
 108
 109         rs->rs_status = 0;
 110         rs->rs_flags = 0;
 111
 112         rs->rs_datalen = ads->ds_rxstatus1 & AR_DataLen;
 113         rs->rs_tstamp =  ads->AR_RcvTimestamp;
 114
 115         /* XXX what about KeyCacheMiss? */
 116
 117         rs->rs_rssi = MS(ads->ds_rxstatus4, AR_RxRSSICombined);
 118         rs->rs_rssi_ctl[0] = MS(ads->ds_rxstatus0, AR_RxRSSIAnt00);
 119         rs->rs_rssi_ctl[1] = MS(ads->ds_rxstatus0, AR_RxRSSIAnt01);
 120         rs->rs_rssi_ctl[2] = MS(ads->ds_rxstatus0, AR_RxRSSIAnt02);
 121         rs->rs_rssi_ext[0] = MS(ads->ds_rxstatus4, AR_RxRSSIAnt10);
 122         rs->rs_rssi_ext[1] = MS(ads->ds_rxstatus4, AR_RxRSSIAnt11);
 123         rs->rs_rssi_ext[2] = MS(ads->ds_rxstatus4, AR_RxRSSIAnt12);
 124
 125         if (ads->ds_rxstatus8 & AR_RxKeyIdxValid)
 126                 rs->rs_keyix = MS(ads->ds_rxstatus8, AR_KeyIdx);
 127         else
 128                 rs->rs_keyix = HAL_RXKEYIX_INVALID;
 129
 130         /* NB: caller expected to do rate table mapping */
 131         rs->rs_rate = RXSTATUS_RATE(ah, ads);
 132         rs->rs_more = (ads->ds_rxstatus1 & AR_RxMore) ? 1 : 0;
 133
 134         rs->rs_isaggr = (ads->ds_rxstatus8 & AR_RxAggr) ? 1 : 0;
 135         rs->rs_moreaggr = (ads->ds_rxstatus8 & AR_RxMoreAggr) ? 1 : 0;
 136         rs->rs_antenna = MS(ads->ds_rxstatus3, AR_RxAntenna);
 137
 138         if (ads->ds_rxstatus3 & AR_GI)
 139                 rs->rs_flags |= HAL_RX_GI;
 140         if (ads->ds_rxstatus3 & AR_2040)
 141                 rs->rs_flags |= HAL_RX_2040;
 142
 143         if (ads->ds_rxstatus8 & AR_PreDelimCRCErr)
 144                 rs->rs_flags |= HAL_RX_DELIM_CRC_PRE;
 145         if (ads->ds_rxstatus8 & AR_PostDelimCRCErr)
 146                 rs->rs_flags |= HAL_RX_DELIM_CRC_POST;
 147         if (ads->ds_rxstatus8 & AR_DecryptBusyErr)
 148                 rs->rs_flags |= HAL_RX_DECRYPT_BUSY;
 149         if (ads->ds_rxstatus8 & AR_HiRxChain)
 150                 rs->rs_flags |= HAL_RX_HI_RX_CHAIN;
 151
 152         if ((ads->ds_rxstatus8 & AR_RxFrameOK) == 0) {
 153                 /*
 154                  * These four bits should not be set together.  The
 155                  * 5416 spec states a Michael error can only occur if
 156                  * DecryptCRCErr not set (and TKIP is used).  Experience
 157                  * indicates however that you can also get Michael errors
 158                  * when a CRC error is detected, but these are specious.
 159                  * Consequently we filter them out here so we don't
 160                  * confuse and/or complicate drivers.
 161                  */
 162                 if (ads->ds_rxstatus8 & AR_CRCErr)
 163                         rs->rs_status |= HAL_RXERR_CRC;
 164                 else if (ads->ds_rxstatus8 & AR_PHYErr) {
 165                         u_int phyerr;
 166
 167                         rs->rs_status |= HAL_RXERR_PHY;
 168                         phyerr = MS(ads->ds_rxstatus8, AR_PHYErrCode);
 169                         rs->rs_phyerr = phyerr;
 170                 } else if (ads->ds_rxstatus8 & AR_DecryptCRCErr)
 171                         rs->rs_status |= HAL_RXERR_DECRYPT;
 172                 else if (ads->ds_rxstatus8 & AR_MichaelErr)
 173                         rs->rs_status |= HAL_RXERR_MIC;
 174         }
 175
 176         return HAL_OK;
 177 }
 178 #endif /* AH_SUPPORT_AR5416 */