Added two wireless drivers: atheros5000.device and realtek8180.device.
[AROS.git] / workbench / devs / networks / atheros5000 / hal / ar5416 / ar5416_gpio.c
blob6c05ccbe0247a9919ea19b0f94db592dd65e7b77
1 /*
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $Id$
19 #include "opt_ah.h"
21 #ifdef AH_SUPPORT_AR5416
23 #include "ah.h"
24 #include "ah_internal.h"
25 #include "ah_devid.h"
26 #ifdef AH_DEBUG
27 #include "ah_desc.h" /* NB: for HAL_PHYERR* */
28 #endif
30 #include "ar5416/ar5416.h"
31 #include "ar5416/ar5416reg.h"
32 #include "ar5416/ar5416phy.h"
34 #define AR_NUM_GPIO 6 /* 6 GPIO pins */
35 #define AR_GPIO_BIT(_gpio) (1 << _gpio)
38 * Configure GPIO Output lines
40 HAL_BOOL
41 ar5416GpioCfgOutput(struct ath_hal *ah, uint32_t gpio)
43 HALASSERT(gpio < AR_NUM_GPIO);
44 OS_REG_CLR_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio));
45 return AH_TRUE;
49 * Configure GPIO Input lines
51 HAL_BOOL
52 ar5416GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
54 HALASSERT(gpio < AR_NUM_GPIO);
55 OS_REG_SET_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio));
56 return AH_TRUE;
60 * Once configured for I/O - set output lines
62 HAL_BOOL
63 ar5416GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
65 uint32_t reg;
67 HALASSERT(gpio < AR_NUM_GPIO);
68 reg = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_OUT_VAL);
69 if (val & 1)
70 reg |= AR_GPIO_BIT(gpio);
71 else
72 reg &= ~AR_GPIO_BIT(gpio);
74 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_OUT_VAL, reg);
75 return AH_TRUE;
79 * Once configured for I/O - get input lines
81 uint32_t
82 ar5416GpioGet(struct ath_hal *ah, uint32_t gpio)
84 if (gpio >= AR_NUM_GPIO)
85 return 0xffffffff;
86 return ((OS_REG_READ(ah, AR_GPIO_IN) & AR_GPIO_BIT(gpio)) >> gpio);
90 * Set the GPIO Interrupt
92 void
93 ar5416GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
95 uint32_t val;
97 HALASSERT(gpio < AR_NUM_GPIO);
98 /* XXX bounds check gpio */
99 val = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_INTR_CTRL);
100 if (ilevel) /* 0 == interrupt on pin high */
101 val &= ~AR_GPIO_BIT(gpio);
102 else /* 1 == interrupt on pin low */
103 val |= AR_GPIO_BIT(gpio);
104 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_INTR_CTRL, val);
106 /* Change the interrupt mask. */
107 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), AR_INTR_GPIO);
108 val |= AR_GPIO_BIT(gpio);
109 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, AR_INTR_GPIO, val);
111 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK), AR_INTR_GPIO);
112 val |= AR_GPIO_BIT(gpio);
113 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, AR_INTR_GPIO, val);
115 #endif /* AH_SUPPORT_AR5416 */