2 Copyright © 2004-2006, The AROS Development Team. All rights reserved.
5 Desc: PCI direct driver for i386 native.
9 #define __OOP_NOATTRBASES__
11 #include <exec/types.h>
15 #include <utility/tagitem.h>
17 #include <proto/exec.h>
18 #include <proto/utility.h>
19 #include <proto/oop.h>
21 #include <aros/symbolsets.h>
22 #include <asm/amcc440.h>
28 #include <aros/debug.h>
30 #undef HiddPCIDriverAttrBase
33 #define HiddPCIDriverAttrBase (PSD(cl)->hiddPCIDriverAB)
34 #define HiddAttrBase (PSD(cl)->hiddAB)
36 #define CFGADD(bus,dev,func,reg) \
37 ( 0x00000000 | ((bus)<<16) | \
38 ((dev)<<11) | ((func)<<8) | ((reg)&~3))
48 We overload the New method in order to introduce the Hidd Name and
49 HardwareName attributes.
51 OOP_Object
*PCI440__Root__New(OOP_Class
*cl
, OOP_Object
*o
, struct pRoot_New
*msg
)
53 struct pRoot_New mymsg
;
55 struct TagItem mytags
[] = {
56 { aHidd_Name
, (IPTR
)"PCINative" },
57 { aHidd_HardwareName
, (IPTR
)"AMCC440 native direct access PCI driver" },
62 mymsg
.attrList
= (struct TagItem
*)&mytags
;
66 mytags
[2].ti_Tag
= TAG_MORE
;
67 mytags
[2].ti_Data
= (IPTR
)msg
->attrList
;
72 o
= (OOP_Object
*)OOP_DoSuperMethod(cl
, o
, (OOP_Msg
)msg
);
77 static ULONG
ReadConfigLong(struct pci_staticdata
*psd
, UBYTE bus
, UBYTE dev
, UBYTE sub
, UBYTE reg
)
82 outl_le(CFGADD(bus
, dev
, sub
, reg
),PCI0_CFGADDR
);
83 temp
=inl_le(PCI0_CFGDATA
);
85 DB2(bug("[PCI440] -> %08x = %08x\n", CFGADD(bus
, dev
, sub
, reg
), temp
));
90 ULONG
PCI440__Hidd_PCIDriver__ReadConfigLong(OOP_Class
*cl
, OOP_Object
*o
,
91 struct pHidd_PCIDriver_ReadConfigLong
*msg
)
93 return ReadConfigLong(PSD(cl
), msg
->bus
, msg
->dev
, msg
->sub
, msg
->reg
);
96 static void WriteConfigLong(struct pci_staticdata
*psd
, UBYTE bus
, UBYTE dev
, UBYTE sub
, UBYTE reg
, ULONG val
)
98 DB2(bug("[PCI440] <- %08x = %08x\n", CFGADD(bus
, dev
, sub
, reg
), val
));
100 outl_le(CFGADD(bus
, dev
, sub
, reg
),PCI0_CFGADDR
);
101 outl_le(val
,PCI0_CFGDATA
);
105 void PCI440__Hidd_PCIDriver__WriteConfigLong(OOP_Class
*cl
, OOP_Object
*o
,
106 struct pHidd_PCIDriver_WriteConfigLong
*msg
)
108 WriteConfigLong(PSD(cl
), msg
->bus
, msg
->dev
, msg
->sub
, msg
->reg
, msg
->val
);
111 /* Class initialization and destruction */
113 static int PCI440_InitClass(LIBBASETYPEPTR LIBBASE
)
117 D(bug("PCI440: Driver initialization\n"));
119 struct pHidd_PCI_AddHardwareDriver msg
,*pmsg
=&msg
;
121 LIBBASE
->psd
.hiddPCIDriverAB
= OOP_ObtainAttrBase(IID_Hidd_PCIDriver
);
122 LIBBASE
->psd
.hiddAB
= OOP_ObtainAttrBase(IID_Hidd
);
123 if (LIBBASE
->psd
.hiddPCIDriverAB
== 0 || LIBBASE
->psd
.hiddAB
== 0)
125 D(bug("PCI440: ObtainAttrBases failed\n"));
129 msg
.driverClass
= LIBBASE
->psd
.driverClass
;
130 msg
.mID
= OOP_GetMethodID(IID_Hidd_PCI
, moHidd_PCI_AddHardwareDriver
);
131 D(bug("PCI440: Adding Driver to main the class OK\n"));
133 pci
= OOP_NewObject(NULL
, CLID_Hidd_PCI
, NULL
);
134 OOP_DoMethod(pci
, (OOP_Msg
)pmsg
);
135 OOP_DisposeObject(pci
);
137 D(bug("PCI440: CPU %p%p:%p%p PCI (0x%08x)\n",
138 inl_le(PCI0_POM0LAH
), inl_le(PCI0_POM0LAL
),
139 inl_le(PCI0_POM0PCIAH
), inl_le(PCI0_POM0PCIAL
),
140 ~(inl_le(PCI0_POM0SA
) & ~0xf) + 1
142 D(bug("PCI440: CPU %p%p:%p%p PCI (0x%08x)\n",
143 inl_le(PCI0_POM1LAH
), inl_le(PCI0_POM1LAL
),
144 inl_le(PCI0_POM1PCIAH
), inl_le(PCI0_POM1PCIAL
),
145 ~(inl_le(PCI0_POM1SA
) & ~0xf) + 1
147 uint64_t sa
= ((uint64_t)inl_le(PCI0_PIM0SAH
) << 32) | inl_le(PCI0_PIM0SAL
);
148 sa
= ~(sa
& ~0xfULL
) + 1;
149 D(bug("PCI440: PCI %p%p:%p%p CPU (0x%08x%08x)\n",
150 inl_le(PCI0_BAR0H
), inl_le(PCI0_BAR0L
) & ~0xf,
151 inl_le(PCI0_PIM0LAH
), inl_le(PCI0_PIM0LAL
),
152 (uint32_t)(sa
>>32), (uint32_t)sa
155 D(bug("PCI440: All OK\n"));
160 static int PCI440_ExpungeClass(LIBBASETYPEPTR LIBBASE
)
162 D(bug("PCI440: Class destruction\n"));
164 OOP_ReleaseAttrBase(IID_Hidd_PCIDriver
);
165 OOP_ReleaseAttrBase(IID_Hidd
);
170 ADD2INITLIB(PCI440_InitClass
, 0)
171 ADD2EXPUNGELIB(PCI440_ExpungeClass
, 0)