in case of EfikaMX, optimize for size
[AROS.git] / arch / arm-efika / kernel / include / hardware / mx51_uart.h
blob01a61b299eef62e847b275bac925a716e313bea9
1 /*
2 * mx51_uart.h
4 * Created on: Jun 2, 2013
5 * Author: michal
6 */
8 #ifndef HARDWARE_MX51_UART_H
9 #define HARDWARE_MX51_UART_H
11 #ifndef _INTTYPES_H
12 #include <inttypes.h>
13 #endif
15 #define UART1_BASE_ADDR 0x73FBC000
16 #define UART2_BASE_ADDR 0x73FC0000
18 #define UART_URXD 0x00
19 #define UART_UTXD 0x40
20 #define UART_UCR1 0x80
21 #define UART_UCR2 0x84
22 #define UART_UCR3 0x88
23 #define UART_UCR4 0x8C
24 #define UART_UFCR 0x90
25 #define UART_USR1 0x94
26 #define UART_USR2 0x98
27 #define UART_UESC 0x9C
28 #define UART_UTIM 0xA0
29 #define UART_UBIR 0xA4
30 #define UART_UBMR 0xA8
31 #define UART_UBRC 0xAC
32 #define UART_ONEMS 0xB0
33 #define UART_UTS 0xB4
35 typedef struct {
36 uint32_t URXD;
37 uint32_t __reserved_1[15];
38 uint32_t UTXD;
39 uint32_t __reserved_2[15];
40 uint32_t UCR1;
41 uint32_t UCR2;
42 uint32_t UCR3;
43 uint32_t UCR4;
44 uint32_t UFCR;
45 uint32_t USR1;
46 uint32_t USR2;
47 uint32_t UESC;
48 uint32_t UTIM;
49 uint32_t UBIR;
50 uint32_t UBRC;
51 uint32_t ONEMS;
52 uint32_t UTS;
53 } MX51_UART;
55 #define UART_URXD_RX_DATA_MASK 0x000000FF
56 #define UART_URXD_RX_DATA(x) ((x) & UART_URXD_RX_DATA_MASK)
57 #define UART_URXD_PRERR 0x00000400
58 #define UART_URXD_BRK 0x00000800
59 #define UART_URXD_FRMERR 0x00001000
60 #define UART_URXD_OVRRUN 0x00002000
61 #define UART_URXD_ERR 0x00004000
62 #define UART_URXD_CHARRDY 0x00008000
64 #define UART_UTXD_TX_DATA_MASK 0x000000FF
65 #define UART_UTXD_TX_DATA(x) ((x) & UART_UTXD_TX_DATA_MASK)
67 #define UART_UCR1_UARTEN 0x00000001
68 #define UART_UCR1_DOZE 0x00000002
69 #define UART_UCR1_ATDMAEN 0x00000004
70 #define UART_UCR1_TXDMAEN 0x00000008
71 #define UART_UCR1_SNDBRK 0x00000010
72 #define UART_UCR1_RTSDEN 0x00000020
73 #define UART_UCR1_TXMPTYEN 0x00000040
74 #define UART_UCR1_IREN 0x00000080
75 #define UART_UCR1_RXDMAEN 0x00000100
76 #define UART_UCR1_RRDYEN 0x00000200
77 #define UART_UCR1_ICD_MASK 0x00000c00
78 #define UART_UCR1_ICD_4F 0x00000000
79 #define UART_UCR1_ICD_8F 0x00000400
80 #define UART_UCR1_ICD_16F 0x00000800
81 #define UART_UCR1_ICD_32F 0x00000c00
82 #define UART_UCR1_IDEN 0x00001000
83 #define UART_UCR1_TRDYEN 0x00002000
84 #define UART_UCR1_ADBR 0x00004000
85 #define UART_UCR1_ADEN 0x00008000
87 #define UART_UCR2_SRST 0x00000001
88 #define UART_UCR2_RXEN 0x00000002
89 #define UART_UCR2_TXEN 0x00000004
90 #define UART_UCR2_ATEN 0x00000008
91 #define UART_UCR2_RTSEN 0x00000010
92 #define UART_UCR2_WS 0x00000020
93 #define UART_UCR2_STPB 0x00000040
94 #define UART_UCR2_PROE 0x00000080
95 #define UART_UCR2_PREN 0x00000100
96 #define UART_UCR2_RTEC_MASK 0x00000600
97 #define UART_UCR2_RTEC_RISING 0x00000000
98 #define UART_UCR2_RTEC_FALLING 0x00000200
99 #define UART_UCR2_RTEC_ANY 0x00000400
100 #define UART_UCR2_ESCEN 0x00000800
101 #define UART_UCR2_CTS 0x00001000
102 #define UART_UCR2_CTSC 0x00002000
103 #define UART_UCR2_IRTS 0x00004000
104 #define UART_UCR2_ESCI 0x00008000
106 #define UART_UCR3_ACIEN 0x00000001
107 #define UART_UCR3_INVT 0x00000002
108 #define UART_UCR3_RXDMUXSEL 0x00000004
109 #define UART_UCR3_DTRDEN 0x00000008
110 #define UART_UCR3_AWAKEN 0x00000010
111 #define UART_UCR3_AIRINTEN 0x00000020
112 #define UART_UCR3_RXDSEN 0x00000040
113 #define UART_UCR3_ADNIMP 0x00000080
114 #define UART_UCR3_RI 0x00000100
115 #define UART_UCR3_DCD 0x00000200
116 #define UART_UCR3_DSR 0x00000400
117 #define UART_UCR3_FRAERREN 0x00000800
118 #define UART_UCR3_PARERREN 0x00001000
119 #define UART_UCR3_DTREN 0x00002000
120 #define UART_UCR3_DPEC_MASK 0x0000c000
121 #define UART_UCR3_DPEC_RISING 0x00000000
122 #define UART_UCR3_DPEC_FALLING 0x00004000
123 #define UART_UCR3_DPEC_ANY 0x00008000
125 #define UART_UCR4_DREN 0x00000001
126 #define UART_UCR4_OREN 0x00000002
127 #define UART_UCR4_BKEN 0x00000004
128 #define UART_UCR4_TCEN 0x00000008
129 #define UART_UCR4_LPBYP 0x00000010
130 #define UART_UCR4_IRSC 0x00000020
131 #define UART_UCR4_IDDMAEN 0x00000040
132 #define UART_UCR4_WKEN 0x00000080
133 #define UART_UCR4_ENIRI 0x00000100
134 #define UART_UCR4_INVR 0x00000200
135 #define UART_UCR4_CTSTL_MASK 0x0000fc00
136 #define UART_UCR4_CTSTL_SHIFT 10
137 #define UART_UCR4_CTSTL(x) ((x) & UART_UCR4_CTSTL_MASK)
139 #define UART_UFCR_RXTL_MASK 0x0000003f
140 #define UART_UFCR_RXTL_SHIFT 0
141 #define UART_UFCR_RXTL(x) ((x) & UART_UFCR_RXTL_MASK)
142 #define UART_UFCR_DCEDTE 0x00000040
143 #define UART_UFCR_RFDIV_MASK 0x00000380
144 #define UART_UFCR_RFDIV_SHIFT 7
145 #define UART_UFCR_RFDIV(x) ((x) & UART_UFCR_RFDIV_MASK)
146 #define UART_UFCR_TXTL_MASK 0x0000fc00
147 #define UART_UFCR_TXTL_SHIFT 10
148 #define UART_UFCR_TXTL(x) ((x) & UART_UFCR_TXTL_MASK)
150 #define UART_USR1_AWAKE 0x00000010
151 #define UART_USR1_AIRINT 0x00000020
152 #define UART_USR1_RXDS 0x00000040
153 #define UART_USR1_DTRD 0x00000080
154 #define UART_USR1_AGTIM 0x00000100
155 #define UART_USR1_RRDY 0x00000200
156 #define UART_USR1_FRAMERR 0x00000400
157 #define UART_USR1_ESCF 0x00000800
158 #define UART_USR1_RTSD 0x00001000
159 #define UART_USR1_TRDY 0x00002000
160 #define UART_USR1_RTSS 0x00004000
161 #define UART_USR1_PARITYERR 0x00008000
163 #define UART_USR2_RDR 0x00000001
164 #define UART_USR2_ORE 0x00000002
165 #define UART_USR2_BRCD 0x00000004
166 #define UART_USR2_TXDC 0x00000008
167 #define UART_USR2_RTSF 0x00000010
168 #define UART_USR2_DCDIN 0x00000020
169 #define UART_USR2_DCDDELT 0x00000040
170 #define UART_USR2_WAKE 0x00000080
171 #define UART_USR2_IRINT 0x00000100
172 #define UART_USR2_RIIN 0x00000200
173 #define UART_USR2_RIDELT 0x00000400
174 #define UART_USR2_ACST 0x00000800
175 #define UART_USR2_IDLE 0x00001000
176 #define UART_USR2_DTRF 0x00002000
177 #define UART_USR2_TXFE 0x00004000
178 #define UART_USR2_ADET 0x00008000
180 #define UART_UESC_ESC_CHAR_MASK 0x000000ff
181 #define UART_UESC_ESC_CHAR_SHIFT 0
182 #define UART_UESC_ESC_CHAR(x) ((x) & UART_UESC_ESC_CHAR_MASK)
184 #define UART_UTIM_TIM_MASK 0x00000fff
185 #define UART_UTIM_TIM_SHIFT 0
186 #define UART_UTIM_TIM(x) ((x) & UART_UTIM_TIM_MASK)
188 #define UART_UBIR_INC_MASK 0x0000ffff
189 #define UART_UBIR_INC_SHIFT 0
190 #define UART_UBIR_INC(x) ((x) & UART_UBIR_INC_MASK)
192 #define UART_UBMR_MOD_MASK 0x0000ffff
193 #define UART_UBMR_MOD_SHIFT 0
194 #define UART_UBMR_MOD(x) ((x) & UART_UBMR_MOD_MASK)
196 #define UART_UBRC_BCNT_MASK 0x0000ffff
197 #define UART_UBRC_BCNT_SHIFT 0
198 #define UART_UBRC_BCNT(x) ((x) & UART_UBRC_BCNT_MASK)
200 #define UART_ONEMS_MASK 0x00ffffff
201 #define UART_ONEMS_SHIFT 0
202 #define UART_ONEMS(x) ((x) & UART_ONEMS_MASK)
204 #define UART_UTS_SOFTRST 0x00000001
205 #define UART_UTS_RXFULL 0x00000008
206 #define UART_UTS_TXFULL 0x00000010
207 #define UART_UTS_RXEMPTY 0x00000020
208 #define UART_UTS_TXEMPTY 0x00000040
209 #define UART_UTS_RXDBG 0x00000200
210 #define UART_UTS_LOOPIR 0x00000400
211 #define UART_UTS_DBGEN 0x00000800
212 #define UART_UTS_LOOP 0x00001000
213 #define UART_UTS_FRCPERR 0x00002000
215 #endif /* HARDWARE_MX51_UART_H */