arch/arm-native/soc/broadcom/283x/mbox/vcmbox_init.c

   1 /*
   2     Copyright � 2013-2015, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #define DEBUG 0
   7
   8 #include <aros/debug.h>
   9 #include <aros/symbolsets.h>
  10 #include <aros/libcall.h>
  11 #include <proto/kernel.h>
  12 #include <proto/exec.h>
  13 #include <proto/vcmbox.h>
  14
  15 #include <hardware/bcm283x.h>
  16 #include <hardware/videocore.h>
  17
  18 #include "vcmbox_private.h"
  19
  20
  21 static int vcmbox_init(struct VCMBoxBase *VCMBoxBase)
  22 {
  23     int retval = TRUE;
  24
  25     D(bug("[VCMBox] vcmbox_init()\n"));
  26
  27     InitSemaphore(&VCMBoxBase->vcmb_Sem);
  28
  29     D(bug("[VCMBox] vcmbox_init: Initialised Semaphore @ 0x%p\n", &VCMBoxBase->vcmb_Sem));
  30
  31     return retval;
  32 }
  33
  34 AROS_LH1(unsigned int, VCMBoxStatus,
  35                 AROS_LHA(void *, mb, A0),
  36                 struct VCMBoxBase *, VCMBoxBase, 1, Vcmbox)
  37 {
  38     AROS_LIBFUNC_INIT
  39
  40     D(bug("[VCMBox] VCMBoxStatus(0x%p)\n", mb));
  41
  42     return *((volatile unsigned int *)(mb + VCMB_STATUS));
  43
  44     AROS_LIBFUNC_EXIT
  45 }
  46
  47 AROS_LH2(volatile unsigned int *, VCMBoxRead,
  48                 AROS_LHA(void *, mb, A0),
  49                 AROS_LHA( unsigned int, chan, D0),
  50                 struct VCMBoxBase *, VCMBoxBase, 2, Vcmbox)
  51 {
  52     AROS_LIBFUNC_INIT
  53
  54     unsigned int try = 0x2000000;
  55     unsigned int msg;
  56
  57     D(bug("[VCMBox] VCMBoxRead(chan %d @ 0x%p)\n", chan, mb));
  58
  59     if (chan <= VCMB_CHAN_MAX)
  60     {
  61         while(1)
  62         {
  63             ObtainSemaphore(&VCMBoxBase->vcmb_Sem);
  64             APTR ssp = SuperState();
  65             while ((VCMBoxStatus(mb) & VCMB_STATUS_READREADY) != 0)
  66             {
  67                 /* Data synchronization barrier */
  68                 asm volatile ("mcr p15, 0, %[r], c7, c10, 4" : : [r] "r" (0) );
  69
  70                 if(try-- == 0)
  71                 {
  72                     break;
  73                 }
  74             }
  75             asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) );
  76
  77             msg = *((volatile unsigned int *)(mb + VCMB_READ));
  78
  79             asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) );
  80             UserState(ssp);
  81             ReleaseSemaphore(&VCMBoxBase->vcmb_Sem);
  82
  83             if ((msg & VCMB_CHAN_MASK) == chan)
  84                 return (volatile unsigned int *)(msg & ~VCMB_CHAN_MASK);
  85         }
  86     }
  87     return (volatile unsigned int *)-1;
  88
  89     AROS_LIBFUNC_EXIT
  90 }
  91
  92 AROS_LH3(void, VCMBoxWrite,
  93                 AROS_LHA(void *, mb, A0),
  94                 AROS_LHA( unsigned int, chan, D0),
  95                 AROS_LHA(void *, msg, A1),
  96                 struct VCMBoxBase *, VCMBoxBase, 3, Vcmbox)
  97 {
  98     AROS_LIBFUNC_INIT
  99
 100     D(bug("[VCMB] VCMBWrite(chan %d @ 0x%p, msg @ 0x%p)\n", chan, mb, msg));
 101
 102     if ((((unsigned int)msg & VCMB_CHAN_MASK) == 0) && (chan <= VCMB_CHAN_MAX))
 103     {
 104         ObtainSemaphore(&VCMBoxBase->vcmb_Sem);
 105         APTR ssp = SuperState();
 106         while ((VCMBoxStatus(mb) & VCMB_STATUS_WRITEREADY) != 0)
 107         {
 108             /* Data synchronization barrier */
 109             asm volatile ("mcr p15, 0, %[r], c7, c10, 4" : : [r] "r" (0) );
 110         }
 111
 112         asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) );
 113
 114         *((volatile unsigned int *)(mb + VCMB_WRITE)) = ((unsigned int)msg | chan);
 115         UserState(ssp);
 116         ReleaseSemaphore(&VCMBoxBase->vcmb_Sem);
 117     }
 118
 119     AROS_LIBFUNC_EXIT
 120 }
 121
 122 ADD2INITLIB(vcmbox_init, 0)