arch/arm-raspi/boot/serialdebug.c

   1 /*
   2     Copyright © 2013, The AROS Development Team. All rights reserved.
   3     $Id$
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdio.h>
   8
   9 #include <asm/bcm2835.h>
  10 #include <hardware/videocore.h>
  11 #include <hardware/pl011uart.h>
  12
  13 #include "serialdebug.h"
  14 #include "bootconsole.h"
  15 #include "vc_mb.h"
  16 #include "vc_fb.h"
  17
  18 #define ICR_FLAGS (ICR_RXIC|ICR_TXIC|ICR_RTIC|ICR_FEIC|ICR_PEIC|ICR_BEIC|ICR_OEIC|ICR_RIMIC|ICR_CTSMIC|ICR_DSRMIC|ICR_DCDMIC)
  19
  20 #define DEF_BAUD 115200
  21
  22 #define PL011_DIVCLOCK(baud, clock)     ((clock * 4) / baud)
  23 #define PL011_BAUDINT(baud, clock)      ((PL011_DIVCLOCK(baud, clock) & 0xFFFFFFC0) >> 6)
  24 #define PL011_BAUDFRAC(baud, clock)     ((PL011_DIVCLOCK(baud, clock) & 0x0000003F) >> 0)
  25
  26 unsigned int uartclock;
  27 unsigned int uartdivint;
  28 unsigned int uartdivfrac;
  29 unsigned int uartbaud;
  30
  31 inline void waitSerOUT()
  32 {
  33     while(1)
  34     {
  35        if ((*(volatile uint32_t *)(UART0_BASE + UART_FR) & FR_TXFF) == 0) break;
  36     }
  37 }
  38
  39 inline void putByte(uint8_t chr)
  40 {
  41     waitSerOUT();
  42
  43     if (chr == '\n')
  44         *(volatile uint32_t *)(UART0_BASE + UART_DR) = '\r';
  45     *(volatile uint32_t *)(UART0_BASE + UART_DR) = chr;
  46 }
  47
  48 void putBytes(const char *str)
  49 {
  50     while(*str)
  51     {
  52         fb_Putc(*str);
  53         putByte(*str++);
  54     }
  55 }
  56
  57 static char tmpbuf[512];
  58
  59 void kprintf(const char *format, ...)
  60 {
  61         char *out = tmpbuf;
  62         va_list vp;
  63
  64         va_start(vp, format);
  65         vsnprintf(tmpbuf, 511, format, vp);
  66         va_end(vp);
  67
  68         putBytes(out);
  69 }
  70
  71 void serInit(void)
  72 {
  73     unsigned int        uartvar;
  74
  75     volatile unsigned int *uart_msg = (unsigned int *) MESSAGE_BUFFER;
  76
  77     uartbaud = DEF_BAUD;
  78
  79     uart_msg[0] = 8 * 4;
  80     uart_msg[1] = VCTAG_REQ;
  81     uart_msg[2] = VCTAG_GETCLKRATE;
  82     uart_msg[3] = 8;
  83     uart_msg[4] = 4;
  84     uart_msg[5] = 0x000000002;                  // UART clock
  85     uart_msg[6] = 0;
  86     uart_msg[7] = 0;                            // terminate tag
  87
  88     vcmb_write(VCMB_BASE, VCMB_FBCHAN, uart_msg);
  89     uart_msg = vcmb_read(VCMB_BASE, VCMB_FBCHAN);
  90
  91     uartclock = uart_msg[6];
  92
  93     *(volatile uint32_t *)(UART0_BASE + UART_CR) = 0;
  94
  95     uartvar = *(volatile uint32_t *)GPFSEL1;
  96     uartvar &= ~(7<<12);                        // TX on GPIO14
  97     uartvar |= 4<<12;                           // alt0
  98     uartvar &= ~(7<<15);                        // RX on GPIO15
  99     uartvar |= 4<<15;                           // alt0
 100     *(volatile uint32_t *)GPFSEL1 = uartvar;
 101
 102     *(volatile uint32_t *)GPPUD = 0;
 103
 104     for (uartvar = 0; uartvar < 150; uartvar++) asm volatile ("mov r0, r0\n");
 105
 106     *(volatile uint32_t *)GPPUDCLK0 = (1 << 14)|(1 << 15);
 107
 108     for (uartvar = 0; uartvar < 150; uartvar++) asm volatile ("mov r0, r0\n");
 109
 110     *(volatile uint32_t *)GPPUDCLK0 = 0;
 111
 112     *(volatile uint32_t *)(UART0_BASE + UART_ICR) = ICR_FLAGS;
 113     uartdivint = PL011_BAUDINT(uartbaud, uartclock);
 114     *(volatile uint32_t *)(UART0_BASE + UART_IBRD) = uartdivint;
 115     uartdivfrac = PL011_BAUDFRAC(uartbaud, uartclock);
 116     *(volatile uint32_t *)(UART0_BASE + UART_FBRD) = uartdivfrac;
 117     *(volatile uint32_t *)(UART0_BASE + UART_LCRH) = LCRH_WLEN8|LCRH_FEN;                       // 8N1, Fifo enabled
 118     *(volatile uint32_t *)(UART0_BASE + UART_CR) = CR_UARTEN|CR_TXE|CR_RXE|CR_RTSEN|CR_CTSEN;   // enable the uart, tx/rx, and hardware flow control
 119
 120     for (uartvar = 0; uartvar < 150; uartvar++) asm volatile ("mov r0, r0\n");
 121 }