revert between 56095 -> 55830 in arch
[AROS.git] / arch / ppc-sam440 / pci460 / driverclass.c
bloba2aa35f9aded28b8322298383833b057585f1ddd
1 /*
2 Copyright © 2004-2006, The AROS Development Team. All rights reserved.
3 $Id$
5 Desc: PCI direct driver for i386 native.
6 Lang: English
7 */
9 #define __OOP_NOATTRBASES__
11 #include <exec/types.h>
12 #include <hidd/pci.h>
13 #include <oop/oop.h>
15 #include <utility/tagitem.h>
17 #include <proto/exec.h>
18 #include <proto/utility.h>
19 #include <proto/oop.h>
21 #include <resources/processor.h>
22 #include <proto/processor.h>
24 #include <aros/symbolsets.h>
25 #include <asm/amcc440.h>
26 #include <asm/io.h>
28 #include "pci.h"
30 #define DEBUG 1
31 #include <aros/debug.h>
33 #undef HiddPCIDriverAttrBase
34 #undef HiddAttrBase
36 #define HiddPCIDriverAttrBase (PSD(cl)->hiddPCIDriverAB)
37 #define HiddAttrBase (PSD(cl)->hiddAB)
40 We overload the New method in order to introduce the Hidd Name and
41 HardwareName attributes.
43 OOP_Object *PCI460__Root__New(OOP_Class *cl, OOP_Object *o, struct pRoot_New *msg)
45 struct pRoot_New mymsg;
47 struct TagItem mytags[] = {
48 { aHidd_Name, (IPTR)"PCIUSB" },
49 { aHidd_HardwareName, (IPTR)"AMCC460 Pseudo-PCI driver for USB access" },
50 { TAG_DONE, 0 }
53 mymsg.mID = msg->mID;
54 mymsg.attrList = (struct TagItem *)&mytags;
56 if (msg->attrList)
58 mytags[2].ti_Tag = TAG_MORE;
59 mytags[2].ti_Data = (IPTR)msg->attrList;
62 msg = &mymsg;
64 o = (OOP_Object *)OOP_DoSuperMethod(cl, o, (OOP_Msg)msg);
66 return o;
69 const ULONG ohci0[256/4] = {
70 /* 0x00 */ 0x046010e8, /* Device / Vendor */
71 /* 0x04 */ 0x00b00007, /* Enable */
72 /* 0x08 */ 0x0c031000, /* OHCI CLASSC */
73 /* 0x0c */ 0x00800000, /* Multifunction */
74 /* 0x10 */ OHCI0_HCREV, /* AMCC460's OHCI0 base address */
75 /* 0x14 */ 0x00000000,
76 /* 0x18 */ 0x00000000,
77 /* 0x1c */ 0x00000000,
78 /* 0x20 */ 0x00000000,
79 /* 0x24 */ 0x00000000,
80 /* 0x28 */ 0x00000000,
81 /* 0x2c */ 0x00000000,
82 /* 0x30 */ 0x00000000,
83 /* 0x34 */ 0x00000000,
84 /* 0x38 */ 0x00000000,
85 /* 0x3c */ 0x01030100 | INTR_UIC2_USB_OHCI,
86 /* 0x40 */ 0x00000000,
87 /* 0x44 */ 0x00000000,
88 /* 0x48 */ 0x00000000,
89 /* 0x4c */ 0x00000000,
90 /* 0x50 */ 0x00000000,
91 /* 0x54 */ 0x00000000,
92 /* 0x58 */ 0x00000000,
93 /* 0x5c */ 0x00000000,
94 /* 0x60 */ 0x00002020, /* PORTWAKECAP / FLADJ / SBRN */
97 const ULONG ehci0[256/4] = {
98 /* 0x00 */ 0x046010e8, /* Device / Vendor */
99 /* 0x04 */ 0x00b00006, /* Enable */
100 /* 0x08 */ 0x0c032000, /* EHCI CLASSC */
101 /* 0x0c */ 0x00800000, /* Multifunction */
102 /* 0x10 */ EHCI0_HCCAPBASE, /* AMCC460's EHCI0 base address */
103 /* 0x14 */ 0x00000000,
104 /* 0x18 */ 0x00000000,
105 /* 0x1c */ 0x00000000,
106 /* 0x20 */ 0x00000000,
107 /* 0x24 */ 0x00000000,
108 /* 0x28 */ 0x00000000,
109 /* 0x2c */ 0x00000000,
110 /* 0x30 */ 0x00000000,
111 /* 0x34 */ 0x00000000,
112 /* 0x38 */ 0x00000000,
113 /* 0x3c */ 0x01030200 | INTR_UIC2_USB_EHCI,
114 /* 0x40 */ 0x00000000,
115 /* 0x44 */ 0x00000000,
116 /* 0x48 */ 0x00000000,
117 /* 0x4c */ 0x00000000,
118 /* 0x50 */ 0x00000000,
119 /* 0x54 */ 0x00000000,
120 /* 0x58 */ 0x00000000,
121 /* 0x5c */ 0x00000000,
122 /* 0x60 */ 0x00002020, /* PORTWAKECAP / FLADJ / SBRN */
125 ULONG ReadConfigLong(struct pci_staticdata *psd, UBYTE bus, UBYTE dev, UBYTE sub, UBYTE reg)
127 ULONG temp = ~0;
129 if (bus == 0 && dev == 0 && sub == 0) {
130 /* Simulated PCI OHCI device, mapped to OHCI0 */
131 temp = ohci0[reg>>2];
133 #if 0
134 if (bus == 0 && dev == 0 && sub == 1) {
135 /* Simulated PCI EHCI device, mapped to EHCI0 */
136 temp = ehci0[reg>>2];
138 #endif
140 return temp;
143 ULONG PCI460__Hidd_PCIDriver__ReadConfigLong(OOP_Class *cl, OOP_Object *o,
144 struct pHidd_PCIDriver_ReadConfigLong *msg)
146 return ReadConfigLong(PSD(cl), msg->bus, msg->dev, msg->sub, msg->reg);
149 void WriteConfigLong(struct pci_staticdata *psd, UBYTE bus, UBYTE dev, UBYTE sub, UBYTE reg, ULONG val)
151 /* Nothing to do */
154 void PCI460__Hidd_PCIDriver__WriteConfigLong(OOP_Class *cl, OOP_Object *o,
155 struct pHidd_PCIDriver_WriteConfigLong *msg)
157 WriteConfigLong(PSD(cl), msg->bus, msg->dev, msg->sub, msg->reg, msg->val);
160 /* Class initialization and destruction */
161 static inline ULONG GetPVR(void)
163 struct Library *ProcessorBase = OpenResource(PROCESSORNAME);
164 ULONG pvr = 0;
166 if (ProcessorBase) {
167 struct TagItem tags[] = {
168 { GCIT_Model, (IPTR)&pvr },
169 { TAG_END }
171 GetCPUInfo(tags);
174 return pvr;
177 static int PCI460_InitClass(LIBBASETYPEPTR LIBBASE)
179 OOP_Object *pci;
180 ULONG pvr;
182 struct pHidd_PCI_AddHardwareDriver msg,*pmsg=&msg;
184 /* Are we on the right machine? */
185 pvr = GetPVR();
186 if (pvr != PVR_PPC460EX_B)
187 return FALSE;
189 D(bug("PCI460: Driver initialization\n"));
191 LIBBASE->psd.hiddPCIDriverAB = OOP_ObtainAttrBase(IID_Hidd_PCIDriver);
192 LIBBASE->psd.hiddAB = OOP_ObtainAttrBase(IID_Hidd);
193 if (LIBBASE->psd.hiddPCIDriverAB == 0 || LIBBASE->psd.hiddAB == 0)
195 D(bug("PCI460: ObtainAttrBases failed\n"));
196 return FALSE;
199 msg.driverClass = LIBBASE->psd.driverClass;
200 msg.mID = OOP_GetMethodID(IID_Hidd_PCI, moHidd_PCI_AddHardwareDriver);
201 D(bug("PCI460: Adding Driver to main the class OK\n"));
203 pci = OOP_NewObject(NULL, CLID_Hidd_PCI, NULL);
204 OOP_DoMethod(pci, (OOP_Msg)pmsg);
205 OOP_DisposeObject(pci);
207 D(bug("PCI460: All OK\n"));
209 return TRUE;
212 static int PCI460_ExpungeClass(LIBBASETYPEPTR LIBBASE)
214 D(bug("PCI460: Class destruction\n"));
216 OOP_ReleaseAttrBase(IID_Hidd_PCIDriver);
217 OOP_ReleaseAttrBase(IID_Hidd);
219 return TRUE;
222 ADD2INITLIB(PCI460_InitClass, 0)
223 ADD2EXPUNGELIB(PCI460_ExpungeClass, 0)