2 Copyright © 2013, The AROS Development Team. All rights reserved.
7 #include <aros/kernel.h>
8 #include <aros/libcall.h>
10 #include <aros/arm/cpucontext.h>
15 #include <proto/exec.h>
16 #include <proto/kernel.h>
18 #include "kernel_cpu.h"
19 #include "kernel_intern.h"
20 #include "kernel_scheduler.h"
21 #include "kernel_intr.h"
22 #include "kernel_syscall.h"
24 extern char * __text_start
;
25 extern char * __text_end
;
37 this code currently assumes the caller is in user mode (and will break from any other mode)
39 r0 = passed to c handler, r1/r2 = temp
42 ".globl __vectorhand_swi \n"
43 ".type __vectorhand_swi,%function \n"
44 "__vectorhand_swi: \n"
46 " add r1, r0, #13*4 \n" // store sp^ in ctx_sp
48 " add r1, r0, #14*4 \n" // store lr^ in ctx_lr
50 " mov fp, #0 \n" // clear fp(??)
52 " bl handle_syscall \n"
56 void cache_clear_e(void *addr
, uint32_t length
, uint32_t flags
)
60 if (addr
== NULL
&& length
== 0xffffffff)
66 void *end_addr
= ((uintptr_t)addr
+ length
+ 31) & ~31;
67 addr
= (void *)((uintptr_t)addr
& ~31);
68 count
= (uintptr_t)(end_addr
- addr
) >> 5;
71 D(bug("[KRN] CacheClearE from %p length %d count %d, flags %x\n", addr
, length
, count
, flags
));
75 if (flags
& CACRF_ClearD
)
77 __asm__
__volatile__("mcr p15, 0, %0, c7, c14, 1"::"r"(addr
));
79 if (flags
& CACRF_ClearI
)
81 __asm__
__volatile__("mcr p15, 0, %0, c7, c5, 1"::"r"(addr
));
83 if (flags
& CACRF_InvalidateD
)
85 __asm__
__volatile__("mcr p15, 0, %0, c7, c6, 1"::"r"(addr
));
91 __asm__
__volatile__("mcr p15, 0, %0, c7, c10, 4"::"r"(addr
));
94 void handle_syscall(void *regs
)
96 register unsigned int addr
;
97 register unsigned int swi_no
;
99 /* We determine the SWI number by reading in "tasks"
100 program counter, subtract the instruction from it and
101 obtain the value from there. we also use this to check if
102 we have been called from outwith the kernel's code (illegal!)
105 addr
= ((uint32_t *)regs
)[15];
107 swi_no
= *((unsigned int *)addr
) & 0x00ffffff;
109 D(bug("[KRN] ## SWI %d @ 0x%p\n", swi_no
, addr
));
111 if (((char*)addr
< &__text_start
) || ((char*)addr
>= &__text_end
))
113 D(bug("[KRN] ## SWI : ILLEGAL ACCESS!\n"));
116 if (swi_no
<= 0x0b || swi_no
== 0x100)
118 DREGS(cpu_DumpRegs(regs
));
124 D(bug("[KRN] ## CLI...\n"));
125 ((uint32_t *)regs
)[16] |= 0x80;
131 D(bug("[KRN] ## STI...\n"));
132 ((uint32_t *)regs
)[16] &= ~0x80;
138 D(bug("[KRN] ## SUPERSTATE... (0x%p ->", ((uint32_t *)regs
)[16]));
139 ((uint32_t *)regs
)[16] &= ~CPUMODE_MASK
;
140 ((uint32_t *)regs
)[16] |= (0x80 | CPUMODE_SUPERVISOR
);
141 D(bug(" 0x%p)\n", ((uint32_t *)regs
)[16]));
145 case SC_ISSUPERSTATE
:
147 D(bug("[KRN] ## ISSUPERSTATE... "));
148 ((uint32_t *)regs
)[0] = !(((((uint32_t *)regs
)[16] & CPUMODE_MASK
) == CPUMODE_USER
) || ((((uint32_t *)regs
)[16] & CPUMODE_MASK
) == CPUMODE_SYSTEM
));
149 D(bug("%d\n", ((uint32_t *)regs
)[0]));
155 D(bug("[KRN] ## REBOOT...\n"));
156 asm volatile ("mov pc, #0\n"); // Jump to the reset vector..
162 D(bug("[KRN] ## CACHECLEARE...\n"));
163 void * address
= ((void **)regs
)[0];
164 uint32_t length
= ((uint32_t *)regs
)[1];
165 uint32_t flags
= ((uint32_t *)regs
)[2];
167 cache_clear_e(address
, length
, flags
);
172 core_SysCall(swi_no
, regs
);
178 D(bug("[KRN] ## SWI : ILLEGAL SWI!\n"));
182 D(bug("[KRN] ## SWI returning ..\n"));