rom/devs/ata/lowlevel.c

   1 /*
   2     Copyright © 2004-2012, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc:
   6     Lang: English
   7 */
   8
   9 /*
  10  * TODO:
  11  * - put a critical section around DMA transfers (shared dma channels)
  12  */
  13
  14 // use #define xxx(a) D(a) to enable particular sections.
  15 #if DEBUG
  16 #define DIRQ(a) D(a)
  17 #define DIRQ_MORE(a)
  18 #define DUMP(a) D(a)
  19 #define DUMP_MORE(a)
  20 #define DATA(a) D(a)
  21 #define DATAPI(a) D(a)
  22 #define DINIT(a) (a)
  23 #else
  24 #define DIRQ(a)      do { } while (0)
  25 #define DIRQ_MORE(a) do { } while (0)
  26 #define DUMP(a)      do { } while (0)
  27 #define DUMP_MORE(a) do { } while (0)
  28 #define DATA(a)      do { } while (0)
  29 #define DATAPI(a)    do { } while (0)
  30 #define DINIT(a)     do { } while (0)
  31 #endif
  32 /* Errors that shouldn't happen */
  33 #define DERROR(a) a
  34
  35 #include <aros/debug.h>
  36 #include <exec/types.h>
  37 #include <exec/exec.h>
  38 #include <exec/resident.h>
  39 #include <utility/utility.h>
  40 #include <oop/oop.h>
  41
  42 #include <proto/exec.h>
  43 #include <devices/timer.h>
  44
  45 #include "ata.h"
  46 #include "timer.h"
  47
  48 /*
  49     Prototypes of static functions from lowlevel.c. I do not want to make them
  50     non-static as I'd like to remove as much symbols from global table as possible.
  51     Besides some of this functions could conflict with old ide.device or any other
  52     device.
  53 */
  54 static BYTE ata_ReadSector32(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
  55 static BYTE ata_ReadSector64(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
  56 static BYTE ata_ReadMultiple32(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
  57 static BYTE ata_ReadMultiple64(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
  58 static BYTE ata_ReadDMA32(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
  59 static BYTE ata_ReadDMA64(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
  60 static BYTE ata_WriteSector32(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
  61 static BYTE ata_WriteSector64(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
  62 static BYTE ata_WriteMultiple32(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
  63 static BYTE ata_WriteMultiple64(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
  64 static BYTE ata_WriteDMA32(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
  65 static BYTE ata_WriteDMA64(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
  66 static BYTE ata_Eject(struct ata_Unit *);
  67 static BOOL ata_WaitBusyTO(struct ata_Unit *unit, UWORD tout, BOOL irq, UBYTE *stout);
  68
  69 static BYTE atapi_EndCmd(struct ata_Unit *unit);
  70
  71 static BYTE atapi_Read(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
  72 static BYTE atapi_Write(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
  73 static BYTE atapi_Eject(struct ata_Unit *);
  74
  75 static void common_SetBestXferMode(struct ata_Unit* unit);
  76
  77 #define DEVHEAD_VAL 0x40
  78
  79 #if DEBUG
  80 static void dump(APTR mem, ULONG len)
  81 {
  82     register int i, j = 0;
  83
  84     DUMP_MORE(for (j=0; j<(len+15)>>4; ++j))
  85     {
  86         bug("[ATA  ] %06lx: ", j<<4);
  87
  88         for (i=0; i<len-(j<<4); i++)
  89         {
  90             bug("%02lx ", ((unsigned char*)mem)[(j<<4)|i]);
  91             if (i == 15)
  92                 break;
  93         }
  94
  95         for (i=0; i<len-(j<<4); i++)
  96         {
  97             unsigned char c = ((unsigned char*)mem)[(j<<4)|i];
  98
  99             bug("%c", c >= 0x20 ? c<=0x7f ? c : '.' : '.');
 100             if (i == 15)
 101                 break;
 102         }
 103         bug("\n");
 104     }
 105 }
 106 #endif
 107
 108 static void ata_strcpy(const UBYTE *str1, UBYTE *str2, ULONG size)
 109 {
 110     register int i = size;
 111
 112     while (size--)
 113         str2[size ^ 1] = str1[size];
 114
 115     while (i > 0 && str2[--i] <= ' ')
 116         str2[i] = '\0';
 117 }
 118
 119 /*
 120  * a STUB function for commands not supported by this particular device
 121  */
 122 static BYTE ata_STUB(struct ata_Unit *au)
 123 {
 124     DERROR(bug("[ATA%02ld] CALLED STUB FUNCTION (GENERIC). THIS OPERATION IS NOT "
 125         "SUPPORTED BY DEVICE\n", au->au_UnitNum));
 126     return CDERR_NOCMD;
 127 }
 128
 129 static BYTE ata_STUB_IO32(struct ata_Unit *au, ULONG blk, ULONG len,
 130     APTR buf, ULONG* act)
 131 {
 132     DERROR(bug("[ATA%02ld] CALLED STUB FUNCTION (IO32). THIS OPERATION IS NOT "
 133         "SUPPORTED BY DEVICE\n", au->au_UnitNum));
 134     return CDERR_NOCMD;
 135 }
 136
 137 static BYTE ata_STUB_IO64(struct ata_Unit *au, UQUAD blk, ULONG len,
 138     APTR buf, ULONG* act)
 139 {
 140     DERROR(bug("[ATA%02ld] CALLED STUB FUNCTION -- IO ACCESS TO BLOCK %08lx:%08lx, LENGTH %08lx. THIS OPERATION IS NOT SUPPORTED BY DEVICE\n", au->au_UnitNum, (blk >> 32), (blk & 0xffffffff), len));
 141     return CDERR_NOCMD;
 142 }
 143
 144 static BYTE ata_STUB_SCSI(struct ata_Unit *au, struct SCSICmd* cmd)
 145 {
 146     DERROR(bug("[ATA%02ld] CALLED STUB FUNCTION. THIS OPERATION IS NOT SUPPORTED BY DEVICE\n", au->au_UnitNum));
 147     return CDERR_NOCMD;
 148 }
 149
 150 static inline struct ata_Unit* ata_GetSelectedUnit(struct ata_Bus* bus)
 151 {
 152     return bus->ab_SelectedUnit;
 153 }
 154
 155 static inline UBYTE ata_ReadStatus(struct ata_Bus *bus)
 156 {
 157     return bus->ab_Driver->ata_in(ata_Status, bus->ab_Port, bus->ab_DriverData);
 158 }
 159
 160 static inline UBYTE ata_ReadAltStatus(struct ata_Bus *bus)
 161 {
 162     return bus->ab_Driver->ata_in(ata_AltStatus, bus->ab_Alt, bus->ab_DriverData);
 163 }
 164
 165 static inline BOOL ata_SelectUnit(struct ata_Unit* unit)
 166 {
 167     struct ata_Bus *bus = unit->au_Bus;
 168
 169     if (unit == bus->ab_SelectedUnit)
 170         return TRUE;
 171
 172     ATA_OUT(unit->au_DevMask, ata_DevHead, bus->ab_Port);
 173
 174     do
 175     {
 176         ata_WaitNano(400, bus->ab_Base);
 177         //ata_WaitTO(unit->au_Bus->ab_Timer, 0, 1, 0);
 178     }
 179     while (0 != (ATAF_BUSY & ata_ReadStatus(bus)));
 180
 181     bus->ab_SelectedUnit = unit;
 182
 183     return TRUE;
 184 }
 185
 186 /*
 187  * handle IRQ; still fast and efficient, supposed to verify if this irq is for us and take adequate steps
 188  * part of code moved here from ata.c to reduce containment
 189  */
 190 void ata_IRQSignalTask(struct ata_Bus *bus)
 191 {
 192     bus->ab_IntCnt++;
 193     Signal(bus->ab_Task, 1UL << bus->ab_SleepySignal);
 194 }
 195
 196 /* PIO-only: IDE doublers don't have real AltStatus register.
 197  * Do not assume reading AltStatus does not clear interrupt request.
 198  */
 199 BOOL ata_HandleIRQ(struct ata_Bus *bus)
 200 {
 201     struct ata_Unit *unit = ata_GetSelectedUnit(bus);
 202     UBYTE status;
 203     BOOL for_us = FALSE;
 204
 205     /*
 206      * don't waste your time on checking other devices.
 207      * pass irq ONLY if task is expecting one;
 208      */
 209     if ((unit != NULL) && (0 != bus->ab_HandleIRQ))
 210     {
 211         /*
 212          * The DMA status register indicates all interrupt types, not
 213          * just DMA interrupts. However, if there's no DMA port, we have
 214          * to rely on the busy flag, which is incompatible with IRQ sharing.
 215          */
 216         if (unit->au_DMAPort != 0) {
 217             status = ata_ReadAltStatus(bus);
 218             for_us =
 219                 (ATA_IN(dma_Status, unit->au_DMAPort) & DMAF_Interrupt) != 0;
 220         } else {
 221             status = ata_ReadStatus(bus);
 222             for_us = (status & ATAF_BUSY) == 0;
 223         }
 224     }
 225
 226     if (for_us)
 227     {
 228         /*
 229          * Acknowledge interrupt (note that the DMA interrupt bit should be
 230          * cleared for all interrupt types)
 231          */
 232         if (unit->au_DMAPort != 0) {
 233             ATA_OUT(ATA_IN(dma_Status, unit->au_DMAPort) |
 234                 DMAF_Error | DMAF_Interrupt, dma_Status, unit->au_DMAPort);
 235             status = ata_ReadStatus(bus);
 236         } else {
 237             /* Acknowledge PIO hardware interrupt (Amiga A600/A1200 Gayle) */
 238             if (bus->ab_Driver->AckInterrupt)
 239                 bus->ab_Driver->AckInterrupt(bus);
 240         }
 241
 242         /*
 243          * ok, we have a routine to handle any form of transmission etc.
 244          */
 245         DIRQ(bug("[ATA  ] IRQ: Calling dedicated handler... \n"));
 246         bus->ab_HandleIRQ(unit, status);
 247
 248         return TRUE;
 249     }
 250
 251     DIRQ_MORE({
 252         /*
 253          * if we got *here* then device is most likely not expected to have an irq.
 254          */
 255         status = ata_ReadAltStatus(bus);
 256         bug("[ATA%02ld] IRQ: Checking busy flag: ", unit->au_UnitNum);
 257
 258         if (0 == (ATAF_BUSY & status))
 259         {
 260             bug("device ready. Dumping details:\n");
 261
 262             bug("[ATA  ] STATUS: %02lx\n", status);
 263             bug("[ATA  ] ALT STATUS: %02lx\n", ata_ReadAltStatus(bus));
 264             bug("[ATA  ] ERROR: %02lx\n", BUS_IN(ata_Error, bus->ab_Port));
 265             bug("[ATA  ] IRQ: REASON: %02lx\n", BUS_IN(atapi_Reason, bus->ab_Port));
 266         }
 267         else
 268         {
 269             bug("device still busy. ignoring irq.\n");
 270         }
 271     });
 272     return FALSE;
 273 }
 274
 275 void ata_IRQSetHandler(struct ata_Unit *unit, void (*handler)(struct ata_Unit*, UBYTE), APTR piomem, ULONG blklen, ULONG piolen)
 276 {
 277     if (NULL != handler)
 278         unit->au_cmd_error = 0;
 279
 280     unit->au_cmd_data = piomem;
 281     unit->au_cmd_length = (piolen < blklen) ? piolen : blklen;
 282     unit->au_cmd_total = piolen;
 283     unit->au_Bus->ab_HandleIRQ = handler;
 284 }
 285
 286 void ata_IRQNoData(struct ata_Unit *unit, UBYTE status)
 287 {
 288     if (status & ATAF_BUSY)
 289         return;
 290
 291     if ((unit->au_cmd_error == 0) && (status & ATAF_ERROR))
 292         unit->au_cmd_error = HFERR_BadStatus;
 293
 294     DIRQ(bug("[ATA%02ld] IRQ: NoData - done; status %02lx.\n", unit->au_UnitNum, status));
 295     ata_IRQSetHandler(unit, NULL, NULL, 0, 0);
 296     ata_IRQSignalTask(unit->au_Bus);
 297 }
 298
 299 void ata_IRQPIORead(struct ata_Unit *unit, UBYTE status)
 300 {
 301     if (status & ATAF_DATAREQ) {
 302         DIRQ(bug("[ATA  ] IRQ: PIOReadData - DRQ.\n"));
 303         unit->au_ins(unit->au_cmd_data, unit->au_Bus->ab_Port, unit->au_cmd_length, unit->au_Bus->ab_DriverData);
 304
 305         /*
 306          * indicate it's all done here
 307          */
 308         unit->au_cmd_data += unit->au_cmd_length;
 309         unit->au_cmd_total -= unit->au_cmd_length;
 310         if (unit->au_cmd_total) {
 311             if (unit->au_cmd_length > unit->au_cmd_total)
 312                 unit->au_cmd_length = unit->au_cmd_total;
 313             return;
 314         }
 315         DIRQ(bug("[ATA  ] IRQ: PIOReadData - transfer completed.\n"));
 316     }
 317     ata_IRQNoData(unit, status);
 318 }
 319
 320 void ata_PIOWriteBlk(struct ata_Unit *unit)
 321 {
 322     unit->au_outs(unit->au_cmd_data, unit->au_Bus->ab_Port, unit->au_cmd_length, unit->au_Bus->ab_DriverData);
 323
 324     /*
 325      * indicate it's all done here
 326      */
 327     unit->au_cmd_data += unit->au_cmd_length;
 328     unit->au_cmd_total -= unit->au_cmd_length;
 329     if (unit->au_cmd_length > unit->au_cmd_total)
 330         unit->au_cmd_length = unit->au_cmd_total;
 331 }
 332
 333 void ata_IRQPIOWrite(struct ata_Unit *unit, UBYTE status)
 334 {
 335     if (status & ATAF_DATAREQ) {
 336         DIRQ(bug("[ATA  ] IRQ: PIOWriteData - DRQ.\n"));
 337         ata_PIOWriteBlk(unit);
 338         return;
 339     }
 340     DIRQ(bug("[ATA  ] IRQ: PIOWriteData - done.\n"));
 341     ata_IRQNoData(unit, status);
 342 }
 343
 344 void ata_IRQDMAReadWrite(struct ata_Unit *unit, UBYTE status)
 345 {
 346     UBYTE stat = ATA_IN(dma_Status, unit->au_DMAPort);
 347
 348     DIRQ(bug("[ATA%02ld] IRQ: IO status %02lx, DMA status %02lx\n", unit->au_UnitNum, status, stat));
 349
 350     if ((status & ATAF_ERROR) || (stat & DMAF_Error))
 351     {
 352         /* This is turned on in order to help Phantom - Pavel Fedin <sonic_amiga@rambler.ru> */
 353         DERROR(bug("[ATA%02ld] IRQ: IO status %02lx, DMA status %02lx\n", unit->au_UnitNum, status, stat));
 354         DERROR(bug("[ATA%02ld] IRQ: ERROR %02lx\n", unit->au_UnitNum, ATA_IN(atapi_Error, unit->au_Bus->ab_Port)));
 355         DERROR(bug("[ATA  ] IRQ: DMA Failed.\n"));
 356
 357         unit->au_cmd_error = HFERR_DMA;
 358         ata_IRQNoData(unit, status);
 359     }
 360     else if (0 == (status & (ATAF_BUSY | ATAF_DATAREQ)))
 361     {
 362         DIRQ(bug("[ATA  ] IRQ: DMA Done.\n"));
 363         ata_IRQNoData(unit, status);
 364     }
 365 }
 366
 367 void ata_IRQPIOReadAtapi(struct ata_Unit *unit, UBYTE status)
 368 {
 369     ULONG port = unit->au_Bus->ab_Port;
 370     ULONG size = 0;
 371     LONG remainder = 0;
 372     UBYTE reason = ATA_IN(atapi_Reason, port);
 373     DIRQ(bug("[DSCSI] Current status: %ld during READ\n", reason));
 374
 375     /* have we failed yet? */
 376     if (0 == (status & (ATAF_BUSY | ATAF_DATAREQ)))
 377         ata_IRQNoData(unit, status);
 378     if (status & ATAF_ERROR)
 379     {
 380         ata_IRQNoData(unit, status);
 381         return;
 382     }
 383
 384     /* anything for us please? */
 385     if (ATAPIF_READ != (reason & ATAPIF_MASK))
 386         return;
 387
 388     size = ATA_IN(atapi_ByteCntH, port) << 8 | ATA_IN(atapi_ByteCntL, port);
 389     DIRQ(bug("[ATAPI] IRQ: data available for read (%ld bytes, max: %ld bytes)\n", size, unit->au_cmd_total));
 390
 391     if (size > unit->au_cmd_total)
 392     {
 393         DERROR(bug("[ATAPI] IRQ: CRITICAL! MORE DATA OFFERED THAN STORAGE CAN TAKE: %ld bytes vs %ld bytes left!\n", size, unit->au_cmd_total));
 394         remainder = size - unit->au_cmd_total;
 395         size = unit->au_cmd_total;
 396     }
 397
 398     unit->au_ins(unit->au_cmd_data, port, size, unit->au_Bus->ab_DriverData);
 399     unit->au_cmd_data = &((UBYTE*)unit->au_cmd_data)[size];
 400     unit->au_cmd_total -= size;
 401
 402     DIRQ(bug("[ATAPI] IRQ: %lu bytes read.\n", size));
 403
 404     for (; remainder > 0; remainder -= 2)
 405         unit->au_ins(&size, port, 2, unit->au_Bus->ab_DriverData);
 406
 407     if (unit->au_cmd_total == 0)
 408         ata_IRQSetHandler(unit, &ata_IRQNoData, NULL, 0, 0);
 409 }
 410
 411 void ata_IRQPIOWriteAtapi(struct ata_Unit *unit, UBYTE status)
 412 {
 413     ULONG port = unit->au_Bus->ab_Port;
 414     ULONG size = 0;
 415     UBYTE reason = ATA_IN(atapi_Reason, port);
 416     DIRQ(bug("[ATAPI] IRQ: Current status: %ld during WRITE\n", reason));
 417
 418     /* have we failed yet? */
 419     if (0 == (status & (ATAF_BUSY | ATAF_DATAREQ)))
 420         ata_IRQNoData(unit, status);
 421     if (status & ATAF_ERROR)
 422     {
 423         ata_IRQNoData(unit, status);
 424         return;
 425     }
 426
 427     /* anything for us please? */
 428     if (ATAPIF_WRITE != (reason & ATAPIF_MASK))
 429         return;
 430
 431     size = ATA_IN(atapi_ByteCntH, port) << 8 | ATA_IN(atapi_ByteCntL, port);
 432     DIRQ(bug("[ATAPI] IRQ: data requested for write (%ld bytes, max: %ld bytes)\n", size, unit->au_cmd_total));
 433
 434     if (size > unit->au_cmd_total)
 435     {
 436         DERROR(bug("[ATAPI] IRQ: CRITICAL! MORE DATA REQUESTED THAN STORAGE CAN GIVE: %ld bytes vs %ld bytes left!\n", size, unit->au_cmd_total));
 437         size = unit->au_cmd_total;
 438     }
 439
 440     unit->au_outs(unit->au_cmd_data, port, size, unit->au_Bus->ab_DriverData);
 441     unit->au_cmd_data = &((UBYTE*)unit->au_cmd_data)[size];
 442     unit->au_cmd_total -= size;
 443
 444     DIRQ(bug("[ATAPI] IRQ: %lu bytes written.\n", size));
 445
 446     if (unit->au_cmd_total == 0)
 447         ata_IRQSetHandler(unit, &ata_IRQNoData, NULL, 0, 0);
 448 }
 449
 450 /*
 451  * wait for timeout or drive ready
 452  */
 453 BOOL ata_WaitBusyTO(struct ata_Unit *unit, UWORD tout, BOOL irq, UBYTE *stout)
 454 {
 455     struct ata_Bus *bus = unit->au_Bus;
 456     UBYTE status;
 457     ULONG sigs = SIGBREAKF_CTRL_C;
 458     ULONG step = 0;
 459     BOOL res = TRUE;
 460
 461     if (unit->au_Bus->ab_Base->ata_Poll)
 462         irq = FALSE;
 463
 464     /* FIXME: This shouldn't happen but it could explain reported random -6 (IOERR_UNITBUSY) problem */
 465     if (SetSignal(0, SIGBREAKF_CTRL_C) & SIGBREAKF_CTRL_C)
 466         DERROR(bug("[ATA%02ld] SIGBREAKF_CTRL_C was already set!?\n", unit->au_UnitNum));
 467
 468     /*
 469      * set up bus timeout
 470      */
 471     Forbid();
 472     unit->au_Bus->ab_Timeout = tout;
 473     Permit();
 474
 475     sigs |= (irq ? (1 << unit->au_Bus->ab_SleepySignal) : 0);
 476     status = ATA_IN(ata_AltStatus, unit->au_Bus->ab_Alt);
 477
 478     if (irq)
 479     {
 480         /*
 481          * wait for either IRQ or TIMEOUT (unless device seems to be a
 482          * phantom SATAPI drive, in which case we fake a timeout)
 483          */
 484         DIRQ(bug("[ATA%02ld] Waiting (Current status: %02lx)...\n",
 485             unit->au_UnitNum, status));
 486         if (status != 0)
 487             step = Wait(sigs);
 488         else
 489             step = SIGBREAKF_CTRL_C;
 490
 491         /*
 492          * now if we did reach timeout, then there's no point in going ahead.
 493          */
 494         if (SIGBREAKF_CTRL_C & step)
 495         {
 496             DERROR(bug("[ATA%02ld] Timeout while waiting for device to complete"
 497                 " operation\n", unit->au_UnitNum));
 498             res = FALSE;
 499
 500             /*
 501              * do nothing if the interrupt eventually arrives
 502              */
 503             Disable();
 504             ata_IRQSetHandler(unit, NULL, NULL, 0, 0);
 505             Enable();
 506         }
 507     }
 508     else
 509     {
 510         while (status & ATAF_BUSY)
 511         {
 512             ++step;
 513
 514             /*
 515              * every 16n rounds do some extra stuff
 516              */
 517             if ((step & 15) == 0)
 518             {
 519                 /*
 520                  * huhm. so it's been 16n rounds already. any timeout yet?
 521                  */
 522                 if (SetSignal(0, SIGBREAKF_CTRL_C) & SIGBREAKF_CTRL_C)
 523                 {
 524                     DERROR(bug("[ATA%02ld] Device still busy after timeout."
 525                         " Aborting\n", unit->au_UnitNum));
 526                     res = FALSE;
 527                     break;
 528                 }
 529
 530                 /*
 531                  * no timeout just yet, but it's not a good idea to keep
 532                  * spinning like that. let's give the system some time.
 533                  */
 534                 ata_WaitNano(400, bus->ab_Base);
 535             }
 536
 537             status = ATA_IN(ata_AltStatus, unit->au_Bus->ab_Alt);
 538         }
 539     }
 540
 541     /*
 542      * clear up all our expectations
 543      */
 544     Forbid();
 545     unit->au_Bus->ab_Timeout = -1;
 546     Permit();
 547
 548     /*
 549      * get final status and clear any interrupt (may be neccessary if we
 550      * were polling, for example)
 551      */
 552     status = ATA_IN(ata_Status, unit->au_Bus->ab_Port);
 553
 554     /*
 555      * be nice to frustrated developer
 556      */
 557     DIRQ(bug("[ATA%02ld] WaitBusy status: %lx / %ld\n", unit->au_UnitNum,
 558         status, res));
 559
 560     /*
 561      * release old junk
 562      */
 563     SetSignal(0, sigs);
 564
 565     /*
 566      * and say it went fine (i mean it)
 567      */
 568     if (stout)
 569         *stout = status;
 570     return res;
 571 }
 572
 573 /*
 574  * Procedure for sending ATA command blocks
 575  * it appears LARGE but there's a lot of COMMENTS here :)
 576  * handles *all* ata commands (no data, pio and dma)
 577  * naturally could be split at some point in the future
 578  * depends if anyone believes that the change for 50 lines
 579  * would make slow ATA transfers any faster
 580  */
 581 static BYTE ata_exec_cmd(struct ata_Unit* unit, ata_CommandBlock *block)
 582 {
 583     struct ata_Bus *bus = unit->au_Bus;
 584     ULONG port = unit->au_Bus->ab_Port;
 585     BYTE err = 0;
 586     APTR mem = block->buffer;
 587     UBYTE status;
 588
 589     if (FALSE == ata_SelectUnit(unit))
 590         return IOERR_UNITBUSY;
 591
 592     switch (block->type)
 593     {
 594         case CT_LBA28:
 595             if (block->sectors > 256)
 596             {
 597                 DERROR(bug("[ATA%02ld] ata_exec_cmd: ERROR: Transfer length (%ld) exceeds 256 sectors. Aborting.\n", unit->au_UnitNum, block->sectors));
 598                 return IOERR_BADLENGTH;
 599             }
 600
 601             /* note:
 602              * we want the above to fall in here!
 603              * we really do (checking for secmul)
 604              */
 605
 606         case CT_LBA48:
 607             if (block->sectors > 65536)
 608             {
 609                 DERROR(bug("[ATA%02ld] ata_exec_cmd: ERROR: Transfer length (%ld) exceeds 65536 sectors. Aborting.\n", unit->au_UnitNum, block->sectors));
 610                 return IOERR_BADLENGTH;
 611             }
 612             if (block->secmul == 0)
 613             {
 614                 DERROR(bug("[ATA%02ld] ata_exec_cmd: ERROR: Invalid transfer multiplier. Should be at least set to 1 (correcting)\n", unit->au_UnitNum));
 615                 block->secmul = 1;
 616             }
 617            break;
 618
 619         case CT_NoBlock:
 620             break;
 621
 622         default:
 623             DERROR(bug("[ATA%02ld] ata_exec_cmd: ERROR: Invalid command type %lx. Aborting.\n", unit->au_UnitNum, block->type));
 624             return IOERR_NOCMD;
 625     }
 626
 627     block->actual = 0;
 628     D(bug("[ATA%02ld] ata_exec_cmd: Executing command %02lx\n", unit->au_UnitNum, block->command));
 629
 630     if (block->feature != 0)
 631         ATA_OUT(block->feature, ata_Feature, port);
 632
 633     /*
 634      * - set LBA and sector count
 635      */
 636     switch (block->type)
 637     {
 638         case CT_LBA28:
 639             DATA(bug("[ATA%02ld] ata_exec_cmd: Command uses 28bit LBA addressing (OLD)\n", unit->au_UnitNum));
 640
 641             ATA_OUT(((block->blk >> 24) & 0x0f) | DEVHEAD_VAL | unit->au_DevMask, ata_DevHead, port);
 642             ATA_OUT(block->blk >> 16, ata_LBAHigh, port);
 643             ATA_OUT(block->blk >> 8, ata_LBAMid, port);
 644             ATA_OUT(block->blk, ata_LBALow, port);
 645             ATA_OUT(block->sectors, ata_Count, port);
 646             break;
 647
 648         case CT_LBA48:
 649             DATA(bug("[ATA%02ld] ata_exec_cmd: Command uses 48bit LBA addressing (NEW)\n", unit->au_UnitNum));
 650
 651             ATA_OUT(0x40 | unit->au_DevMask, ata_DevHead, port);
 652             ATA_OUT(block->blk >> 40, ata_LBAHigh, port);
 653             ATA_OUT(block->blk >> 32, ata_LBAMid, port);
 654             ATA_OUT(block->blk >> 24, ata_LBALow, port);
 655
 656             ATA_OUT(block->blk >> 16, ata_LBAHigh, port);
 657             ATA_OUT(block->blk >> 8, ata_LBAMid, port);
 658             ATA_OUT(block->blk, ata_LBALow, port);
 659
 660             ATA_OUT(block->sectors >> 8, ata_Count, port);
 661             ATA_OUT(block->sectors, ata_Count, port);
 662             break;
 663
 664         case CT_NoBlock:
 665             DATA(bug("[ATA%02ld] ata_exec_cmd: Command does not address any block\n", unit->au_UnitNum));
 666             break;
 667     }
 668
 669     switch (block->method)
 670     {
 671         case CM_PIOWrite:
 672             ata_IRQSetHandler(unit, &ata_IRQPIOWrite, mem, block->secmul << unit->au_SectorShift, block->length);
 673             break;
 674
 675         case CM_PIORead:
 676             ata_IRQSetHandler(unit, &ata_IRQPIORead, mem, block->secmul << unit->au_SectorShift, block->length);
 677             break;
 678
 679         case CM_DMARead:
 680             if (FALSE == dma_SetupPRDSize(unit, mem, block->length, TRUE))
 681                 return IOERR_ABORTED;
 682             ata_IRQSetHandler(unit, &ata_IRQDMAReadWrite, NULL, 0, 0);
 683             dma_StartDMA(unit);
 684             break;
 685
 686         case CM_DMAWrite:
 687             if (FALSE == dma_SetupPRDSize(unit, mem, block->length, FALSE))
 688                 return IOERR_ABORTED;
 689             ata_IRQSetHandler(unit, &ata_IRQDMAReadWrite, NULL, 0, 0);
 690             dma_StartDMA(unit);
 691             break;
 692
 693         case CM_NoData:
 694             ata_IRQSetHandler(unit, &ata_IRQNoData, NULL, 0, 0);
 695             break;
 696
 697         default:
 698             return IOERR_NOCMD;
 699             break;
 700     };
 701
 702     /*
 703      * send command now
 704      * let drive propagate its signals
 705      */
 706     DATA(bug("[ATA%02ld] ata_exec_cmd: Sending command\n", unit->au_UnitNum));
 707     ATA_OUT(block->command, ata_Command, port);
 708     ata_WaitNano(400, bus->ab_Base);
 709     //ata_WaitTO(unit->au_Bus->ab_Timer, 0, 1, 0);
 710
 711     /*
 712      * In case of PIO write the drive won't issue an IRQ before first
 713      * data transfer, so we should poll the status and send the first
 714      * block upon request.
 715      */
 716     if (block->method == CM_PIOWrite)
 717     {
 718         if (FALSE == ata_WaitBusyTO(unit, TIMEOUT, FALSE, &status)) {
 719             DERROR(bug("[ATA%02ld] ata_exec_cmd: PIOWrite - no response from device. Status %02X\n", unit->au_UnitNum, status));
 720             return IOERR_UNITBUSY;
 721         }
 722         if (status & ATAF_DATAREQ) {
 723             DATA(bug("[ATA%02ld] ata_exec_cmd: PIOWrite - DRQ.\n", unit->au_UnitNum));
 724             ata_PIOWriteBlk(unit);
 725         }
 726         else
 727         {
 728             DERROR(bug("[ATA%02ld] ata_exec_cmd: PIOWrite - bad status: %02X\n", status));
 729             return HFERR_BadStatus;
 730         }
 731     }
 732
 733     /*
 734      * wait for drive to complete what it has to do
 735      */
 736     if (FALSE == ata_WaitBusyTO(unit, TIMEOUT, TRUE, NULL))
 737     {
 738         DERROR(bug("[ATA%02ld] ata_exec_cmd: Device is late - no response\n", unit->au_UnitNum));
 739         err = IOERR_UNITBUSY;
 740     }
 741     else
 742         err = unit->au_cmd_error;
 743
 744     DATA(bug("[ATA%02ld] ata_exec_cmd: Command done\n", unit->au_UnitNum));
 745     /*
 746      * clean up DMA
 747      * don't use 'mem' pointer here as it's already invalid.
 748      */
 749     if (block->method == CM_DMARead)
 750     {
 751         dma_StopDMA(unit);
 752         dma_Cleanup(block->buffer, block->length, TRUE);
 753     }
 754     else if (block->method == CM_DMAWrite)
 755     {
 756         dma_StopDMA(unit);
 757         dma_Cleanup(block->buffer, block->length, FALSE);
 758     }
 759
 760     D(bug("[ATA%02ld] ata_exec_cmd: return code %ld\n", unit->au_UnitNum, err));
 761     return err;
 762 }
 763
 764 /*
 765  * atapi packet iface
 766  */
 767 BYTE atapi_SendPacket(struct ata_Unit *unit, APTR packet, APTR data, LONG datalen, BOOL *dma, BOOL write)
 768 {
 769     struct ata_Bus *bus = unit->au_Bus;
 770     *dma = *dma && (unit->au_XferModes & AF_XFER_DMA) ? TRUE : FALSE;
 771     LONG err = 0;
 772
 773     UBYTE cmd[12] = {
 774         0
 775     };
 776     register int t=5,l=0;
 777     ULONG port = unit->au_Bus->ab_Port;
 778
 779     if (((UBYTE*)packet)[0] > 0x1f)
 780         t+= 4;
 781     if (((UBYTE*)packet)[0] > 0x5f)
 782         t+= 2;
 783
 784     switch (((UBYTE*)packet)[0])
 785     {
 786         case 0x28:  // read10
 787         case 0xa8:  // read12
 788         case 0xbe:  // readcd
 789         case 0xb9:  // readcdmsf
 790         case 0x2f:  // verify
 791         case 0x2a:  // write
 792         case 0xaa:  // write12
 793         case 0x2e:  // writeverify
 794         case 0xad:  // readdvdstructure
 795         case 0xa4:  // reportkey
 796         case 0xa3:  // sendkey
 797             break;
 798         default:
 799             *dma = FALSE;
 800     }
 801
 802     while (l<=t)
 803     {
 804         cmd[l] = ((UBYTE*)packet)[l];
 805         ++l;
 806     }
 807
 808     DATAPI({
 809         bug("[ATA%02lx] Sending %s ATA packet: ", unit->au_UnitNum, (*dma) ? "DMA" : "PIO");
 810         l=0;
 811         while (l<=t)
 812         {
 813             bug("%02lx ", ((UBYTE*)cmd)[l]);
 814             ++l;
 815         }
 816         bug("\n");
 817
 818         if (datalen & 1)
 819             bug("[ATAPI] ERROR: DATA LENGTH NOT EVEN! Rounding Up! (%ld bytes requested)\n", datalen);
 820     });
 821
 822     datalen = (datalen+1)&~1;
 823
 824     if (FALSE == ata_SelectUnit(unit))
 825     {
 826         DATAPI(bug("[ATAPI] WaitBusy failed at first check\n"));
 827         return IOERR_UNITBUSY;
 828     }
 829
 830     /*
 831      * tell device whether we want to read or write and if we want a dma transfer
 832      */
 833     ATA_OUT(((*dma) ? 1 : 0) |
 834         (((unit->au_Drive->id_DMADir & 0x8000) && !write) ? 4 : 0),
 835         atapi_Features, port);
 836     ATA_OUT((datalen & 0xff), atapi_ByteCntL, port);
 837     ATA_OUT((datalen >> 8) & 0xff, atapi_ByteCntH, port);
 838
 839     /*
 840      * once we're done with that, we can go ahead and inform device that we're about to send atapi packet
 841      * after command is dispatched, we are obliged to give 400ns for the unit to parse command and set status
 842      */
 843     DATAPI(bug("[ATAPI] Issuing ATA_PACKET command.\n"));
 844     ata_IRQSetHandler(unit, &ata_IRQNoData, 0, 0, 0);
 845     ATA_OUT(ATA_PACKET, atapi_Command, port);
 846     ata_WaitNano(400, bus->ab_Base);
 847     //ata_WaitTO(unit->au_Bus->ab_Timer, 0, 1, 0);
 848
 849     ata_WaitBusyTO(unit, TIMEOUT, (unit->au_Drive->id_General & 0x60) == 0x20,
 850         NULL);
 851     if (0 == (ata_ReadStatus(unit->au_Bus) & ATAF_DATAREQ))
 852         return HFERR_BadStatus;
 853
 854     /*
 855      * setup appropriate hooks
 856      */
 857     if (datalen == 0)
 858         ata_IRQSetHandler(unit, &ata_IRQNoData, 0, 0, 0);
 859     else if (*dma)
 860         ata_IRQSetHandler(unit, &ata_IRQDMAReadWrite, NULL, 0, 0);
 861     else if (write)
 862         ata_IRQSetHandler(unit, &ata_IRQPIOWriteAtapi, data, 0, datalen);
 863     else
 864         ata_IRQSetHandler(unit, &ata_IRQPIOReadAtapi, data, 0, datalen);
 865
 866     if (*dma)
 867     {
 868         DATAPI(bug("[ATAPI] Starting DMA\n"));
 869         dma_StartDMA(unit);
 870     }
 871
 872     DATAPI(bug("[ATAPI] Sending packet\n"));
 873     unit->au_outs(cmd, unit->au_Bus->ab_Port, 12, unit->au_Bus->ab_DriverData);
 874     ata_WaitNano(400, bus->ab_Base);
 875     DATAPI(bug("[ATAPI] Status after packet: %lx\n",
 876         ata_ReadAltStatus(unit->au_Bus)));
 877
 878     /*
 879      * Wait for command to complete. Note that two interrupts will occur
 880      * before we wake up if this is a PIO data transfer
 881      */
 882     if (ata_WaitTO(unit->au_Bus->ab_Timer, TIMEOUT, 0,
 883         1 << unit->au_Bus->ab_SleepySignal) == 0)
 884     {
 885         DATAPI(bug("[DSCSI] Command timed out.\n"));
 886         err = IOERR_UNITBUSY;
 887     }
 888     else
 889         err = atapi_EndCmd(unit);
 890
 891     if (*dma)
 892     {
 893         dma_StopDMA(unit);
 894         dma_Cleanup(data, datalen, !write);
 895     }
 896
 897     DATAPI(bug("[ATAPI] IO error code %ld\n", err));
 898     return err;
 899 }
 900
 901 BYTE atapi_DirectSCSI(struct ata_Unit *unit, struct SCSICmd *cmd)
 902 {
 903     APTR buffer = cmd->scsi_Data;
 904     ULONG length = cmd->scsi_Length;
 905     BYTE err = 0;
 906     BOOL dma = FALSE;
 907
 908     cmd->scsi_Actual = 0;
 909
 910     DATAPI(bug("[DSCSI] Sending packet!\n"));
 911
 912     /*
 913      * setup DMA & push command
 914      * it does not really mean we will use dma here btw
 915      */
 916     if ((unit->au_XferModes & AF_XFER_DMA) && (length !=0) && (buffer != 0))
 917     {
 918         dma = TRUE;
 919         if ((cmd->scsi_Flags & SCSIF_READ) != 0)
 920         {
 921             if (FALSE == dma_SetupPRDSize(unit, buffer, length, TRUE))
 922                 dma = FALSE;
 923         }
 924         else
 925         {
 926             if (FALSE == dma_SetupPRDSize(unit, buffer, length, FALSE))
 927                 dma = FALSE;
 928         }
 929     }
 930
 931     err = atapi_SendPacket(unit, cmd->scsi_Command, cmd->scsi_Data, cmd->scsi_Length, &dma, (cmd->scsi_Flags & SCSIF_READ) == 0);
 932
 933     DUMP({ if (cmd->scsi_Data != 0) dump(cmd->scsi_Data, cmd->scsi_Length); });
 934
 935     /*
 936      * on check condition - grab sense data
 937      */
 938     DATAPI(bug("[ATA%02lx] atapi_DirectSCSI: SCSI Flags: %02lx / Error: %ld\n", unit->au_UnitNum, cmd->scsi_Flags, err));
 939     if ((err != 0) && (cmd->scsi_Flags & SCSIF_AUTOSENSE))
 940     {
 941         DATAPI(bug("[DSCSI] atapi_DirectSCSI: Packet Failed. Calling atapi_RequestSense\n"));
 942         atapi_RequestSense(unit, cmd->scsi_SenseData, cmd->scsi_SenseLength);
 943         DUMP(dump(cmd->scsi_SenseData, cmd->scsi_SenseLength));
 944     }
 945
 946     return err;
 947 }
 948
 949 /*
 950  * chops the large transfers into set of smaller transfers
 951  * specifically useful when requested transfer size is >256 sectors for 28bit commands
 952  */
 953 static BYTE ata_exec_blk(struct ata_Unit *unit, ata_CommandBlock *blk)
 954 {
 955     BYTE err = 0;
 956     ULONG part;
 957     ULONG max=256;
 958     ULONG count=blk->sectors;
 959
 960     if (blk->type == CT_LBA48)
 961         max <<= 8;
 962
 963     DATA(bug("[ATA%02ld] ata_exec_blk: Accessing %ld sectors starting from %x%08x\n", unit->au_UnitNum, count, (ULONG)(blk->blk >> 32), (ULONG)blk->blk));
 964     while ((count > 0) && (err == 0))
 965     {
 966         part = (count > max) ? max : count;
 967         blk->sectors = part;
 968         blk->length  = part << unit->au_SectorShift;
 969
 970         DATA(bug("[ATA%02ld] Transfer of %ld sectors from %x%08x\n", unit->au_UnitNum, part, (ULONG)(blk->blk >> 32), (ULONG)blk->blk));
 971         err = ata_exec_cmd(unit, blk);
 972         DATA(bug("[ATA%02ld] ata_exec_blk: ata_exec_cmd returned %lx\n", unit->au_UnitNum, err));
 973
 974         blk->blk    += part;
 975         blk->buffer  = &((char*)blk->buffer)[part << unit->au_SectorShift];
 976         count -= part;
 977     }
 978     return err;
 979 }
 980
 981 /*
 982  * Initial device configuration that suits *all* cases
 983  */
 984 BOOL ata_init_unit(struct ata_Bus *bus, UBYTE u)
 985 {
 986     struct ata_Unit *unit=NULL;
 987
 988     DINIT(bug("[ATA  ] ata_init_unit(%ld)\n", u));
 989
 990     unit = bus->ab_Units[u];
 991     if (NULL == unit)
 992         return FALSE;
 993
 994     unit->au_Bus        = bus;
 995     unit->au_Drive      = AllocPooled(bus->ab_Base->ata_MemPool, sizeof(struct DriveIdent));
 996     unit->au_UnitNum    = bus->ab_BusNum << 1 | u;      // b << 8 | u
 997     unit->au_DevMask    = 0xa0 | (u << 4);
 998
 999     /*
1000      * 32-bit transfer routines are options.
1001      * If the bus doesn't support this, they will be NULLs.
1002      */
1003     if (bus->ab_Base->ata_32bit && bus->ab_Driver->ata_insl)
1004     {
1005         unit->au_ins        = bus->ab_Driver->ata_insl;
1006         unit->au_outs       = bus->ab_Driver->ata_outsl;
1007     }
1008     else
1009     {
1010         unit->au_ins        = bus->ab_Driver->ata_insw;
1011         unit->au_outs       = bus->ab_Driver->ata_outsw;
1012     }
1013     unit->au_SectorShift= 9;    /* this really has to be set here. */
1014
1015     NEWLIST(&unit->au_SoftList);
1016
1017     /*
1018      * since the stack is always handled by caller
1019      * it's safe to stub all calls with one function
1020      */
1021     unit->au_Read32                 = ata_STUB_IO32;
1022     unit->au_Read64                 = ata_STUB_IO64;
1023     unit->au_Write32                = ata_STUB_IO32;
1024     unit->au_Write64                = ata_STUB_IO64;
1025     unit->au_Eject                  = ata_STUB;
1026     unit->au_DirectSCSI             = ata_STUB_SCSI;
1027     unit->au_Identify               = ata_STUB;
1028     return TRUE;
1029 }
1030
1031 BOOL ata_setup_unit(struct ata_Bus *bus, UBYTE u)
1032 {
1033     struct ata_Unit *unit=NULL;
1034
1035     /*
1036      * this stuff always goes along the same way
1037      * WARNING: NO INTERRUPTS AT THIS POINT!
1038      */
1039     DINIT(bug("[ATA  ] ata_setup_unit(%ld,%ld)\n", bus->ab_BusNum, u));
1040
1041     unit = bus->ab_Units[u];
1042     if (NULL == unit)
1043         return FALSE;
1044
1045     ata_SelectUnit(unit);
1046
1047     if (unit->au_DMAPort != 0
1048         && (ATA_IN(dma_Status, unit->au_DMAPort) & 0x80) != 0)
1049         bug("[ATA%02ld] ata_setup_unit: WARNING: Controller only supports "
1050             "DMA on one bus at a time. DMAStatus=%lx\n", unit->au_UnitNum,
1051             ATA_IN(dma_Status, unit->au_DMAPort));
1052
1053     if (FALSE == ata_WaitBusyTO(unit, 1, FALSE, NULL))
1054     {
1055         DINIT(bug("[ATA%02ld] ata_setup_unit: ERROR: Drive not ready for use. Keeping functions stubbed\n", unit->au_UnitNum));
1056         FreePooled(bus->ab_Base->ata_MemPool, unit->au_Drive, sizeof(struct DriveIdent));
1057         unit->au_Drive = 0;
1058         return FALSE;
1059     }
1060
1061     switch (bus->ab_Dev[u])
1062     {
1063         /*
1064          * safe fallback settings
1065          */
1066         case DEV_SATAPI:
1067         case DEV_ATAPI:
1068         case DEV_SATA:
1069         case DEV_ATA:
1070             unit->au_Identify = ata_Identify;
1071             break;
1072
1073         default:
1074             DINIT(bug("[ATA%02ld] ata_setup_unit: Unsupported device %lx. All functions will remain stubbed.\n", unit->au_UnitNum, bus->ab_Dev[u]));
1075             FreePooled(bus->ab_Base->ata_MemPool, unit->au_Drive, sizeof(struct DriveIdent));
1076             unit->au_Drive = 0;
1077             return FALSE;
1078     }
1079
1080     DINIT(bug("[ATA  ] ata_setup_unit: Enabling IRQs\n"));
1081     ATA_OUT(0x0, ata_AltControl, bus->ab_Alt);
1082
1083     /*
1084      * now make unit self diagnose
1085      */
1086     if (unit->au_Identify(unit) != 0)
1087     {
1088         FreePooled(bus->ab_Base->ata_MemPool, unit->au_Drive, sizeof(struct DriveIdent));
1089         unit->au_Drive = NULL;
1090         return FALSE;
1091     }
1092
1093     return TRUE;
1094 }
1095
1096 /*
1097  * ata[pi] identify
1098  */
1099 static void common_SetXferMode(struct ata_Unit* unit, ata_XferMode mode)
1100 {
1101     BOOL dma = FALSE;
1102 #if 0 // We can't set drive modes unless we also set the controller's timing registers
1103     UBYTE type=0;
1104     ata_CommandBlock acb =
1105     {
1106         ATA_SET_FEATURES,
1107         0x03,
1108         0x01,
1109         0x00,
1110         0x00,
1111         0x00,
1112         0x00,
1113         0x00,
1114         0x00,
1115         CM_NoData,
1116         CT_LBA28
1117     };
1118 #endif
1119     DINIT(bug("[ATA%02ld] common_SetXferMode: Trying to set mode %d\n", unit->au_UnitNum, mode));
1120
1121     if ((unit->au_DMAPort == 0) && (mode >= AB_XFER_MDMA0))
1122     {
1123         DINIT(bug("[ATA%02ld] common_SetXferMode: This controller does not own DMA port! Will set best PIO\n", unit->au_UnitNum));
1124         common_SetBestXferMode(unit);
1125         return;
1126     }
1127
1128     /*
1129      * first, ONLY for ATA devices, set new commands
1130      */
1131     if (0 == (unit->au_XferModes & AF_XFER_PACKET))
1132     {
1133         if ((mode >= AB_XFER_PIO0) && (mode <= AB_XFER_PIO4))
1134         {
1135             if ((!unit->au_Bus->ab_Base->ata_NoMulti) && (unit->au_XferModes & AF_XFER_RWMULTI))
1136             {
1137                 ata_IRQSetHandler(unit, ata_IRQNoData, NULL, 0, 0);
1138                 ATA_OUT(unit->au_Drive->id_RWMultipleSize & 0xFF, ata_Count, unit->au_Bus->ab_Port);
1139                 ATA_OUT(ATA_SET_MULTIPLE, ata_Command, unit->au_Bus->ab_Port);
1140                 ata_WaitBusyTO(unit, -1, TRUE, NULL);
1141
1142                 unit->au_Read32         = ata_ReadMultiple32;
1143                 unit->au_Write32        = ata_WriteMultiple32;
1144                 if (unit->au_XferModes & AF_XFER_48BIT)
1145                 {
1146                     unit->au_Read64         = ata_ReadMultiple64;
1147                     unit->au_Write64        = ata_WriteMultiple64;
1148                 }
1149             }
1150             else
1151             {
1152                 unit->au_Read32         = ata_ReadSector32;
1153                 unit->au_Write32        = ata_WriteSector32;
1154                 if (unit->au_XferModes & AF_XFER_48BIT)
1155                 {
1156                     unit->au_Read64         = ata_ReadSector64;
1157                     unit->au_Write64        = ata_WriteSector64;
1158                 }
1159             }
1160         }
1161         else if ((mode >= AB_XFER_MDMA0) && (mode <= AB_XFER_MDMA2))
1162         {
1163             unit->au_Read32         = ata_ReadDMA32;
1164             unit->au_Write32        = ata_WriteDMA32;
1165             if (unit->au_XferModes & AF_XFER_48BIT)
1166             {
1167                 unit->au_Read64         = ata_ReadDMA64;
1168                 unit->au_Write64        = ata_WriteDMA64;
1169             }
1170         }
1171         else if ((mode >= AB_XFER_UDMA0) && (mode <= AB_XFER_UDMA6))
1172         {
1173             unit->au_Read32         = ata_ReadDMA32;
1174             unit->au_Write32        = ata_WriteDMA32;
1175             if (unit->au_XferModes & AF_XFER_48BIT)
1176             {
1177                 unit->au_Read64         = ata_ReadDMA64;
1178                 unit->au_Write64        = ata_WriteDMA64;
1179             }
1180         }
1181         else
1182         {
1183             unit->au_Read32         = ata_ReadSector32;
1184             unit->au_Write32        = ata_WriteSector32;
1185             if (unit->au_XferModes & AF_XFER_48BIT)
1186             {
1187                 unit->au_Read64         = ata_ReadSector64;
1188                 unit->au_Write64        = ata_WriteSector64;
1189             }
1190         }
1191     }
1192
1193 #if 0 // We can't set drive modes unless we also set the controller's timing registers
1194     if ((mode >= AB_XFER_PIO0) && (mode <= AB_XFER_PIO4))
1195     {
1196         type = 8 + (mode - AB_XFER_PIO0);
1197     }
1198     else if ((mode >= AB_XFER_MDMA0) && (mode <= AB_XFER_MDMA2))
1199     {
1200         type = 32 + (mode - AB_XFER_MDMA0);
1201         dma=TRUE;
1202     }
1203     else if ((mode >= AB_XFER_UDMA0) && (mode <= AB_XFER_UDMA6))
1204     {
1205         type = 64 + (mode - AB_XFER_UDMA0);
1206         dma=TRUE;
1207     }
1208     else
1209     {
1210         type = 0;
1211     }
1212
1213     acb.sectors = type;
1214     if (0 != ata_exec_cmd(unit, &acb))
1215     {
1216         DINIT(bug("[ATA%02ld] common_SetXferMode: ERROR: Failed to apply new xfer mode.\n", unit->au_UnitNum));
1217     }
1218
1219     if (unit->au_DMAPort)
1220     {
1221         type = ATA_IN(dma_Status, unit->au_DMAPort);
1222         type &= 0x60;
1223         if (dma)
1224         {
1225             type |= 1 << (5 + (unit->au_UnitNum & 1));
1226         }
1227         else
1228         {
1229             type &= ~(1 << (5 + (unit->au_UnitNum & 1)));
1230         }
1231
1232         DINIT(bug("[DSCSI] common_SetXferMode: Trying to apply new DMA (%lx) status: %02lx (unit %ld)\n", unit->au_DMAPort, type, unit->au_UnitNum & 1));
1233
1234         ata_SelectUnit(unit);
1235         ATA_OUT(type, dma_Status, unit->au_DMAPort);
1236         if (type == (ATA_IN(dma_Status, unit->au_DMAPort) & 0x60))
1237         {
1238             DINIT(bug("[DSCSI] common_SetXferMode: New DMA Status: %02lx\n", type));
1239         }
1240         else
1241         {
1242             DINIT(bug("[DSCSI] common_SetXferMode: Failed to modify DMA state for this device\n"));
1243             dma = FALSE;
1244         }
1245     }
1246 #else
1247     if (mode >= AB_XFER_MDMA0)
1248         dma = TRUE;
1249 #endif
1250
1251     if (dma)
1252         unit->au_XferModes |= AF_XFER_DMA;
1253     else
1254         unit->au_XferModes &= ~AF_XFER_DMA;
1255 }
1256
1257 static void common_SetBestXferMode(struct ata_Unit* unit)
1258 {
1259     int iter;
1260     int max = AB_XFER_UDMA6;
1261
1262     if (unit->au_Bus->ab_Base->ata_NoDMA || (unit->au_DMAPort == 0)
1263         || (   !(unit->au_Drive->id_MWDMASupport & 0x0700)
1264             && !(unit->au_Drive->id_UDMASupport  & 0x7f00)))
1265     {
1266         /*
1267          * make sure you reduce scan search to pio here!
1268          * otherwise this and above function will fall into infinite loop
1269          */
1270         DINIT(bug("[ATA%02ld] common_SetBestXferMode: DMA is disabled for"
1271             " this drive.\n", unit->au_UnitNum));
1272         max = AB_XFER_PIO4;
1273     }
1274     else if (!(unit->au_Flags & AF_80Wire))
1275     {
1276         DINIT(bug("[ATA%02ld] common_SetBestXferMode: "
1277             "An 80-wire cable has not been detected for this drive. "
1278             "Disabling modes above UDMA2.\n", unit->au_UnitNum));
1279         max = AB_XFER_UDMA2;
1280     }
1281
1282     for (iter=max; iter>=AB_XFER_PIO0; --iter)
1283     {
1284         if (unit->au_XferModes & (1<<iter))
1285         {
1286             common_SetXferMode(unit, iter);
1287             return;
1288         }
1289     }
1290     bug("[ATA%02ld] common_SetBestXferMode: ERROR: device never reported any valid xfer modes. will continue at default\n", unit->au_UnitNum);
1291     common_SetXferMode(unit, AB_XFER_PIO0);
1292 }
1293
1294 void common_DetectXferModes(struct ata_Unit* unit)
1295 {
1296     int iter;
1297
1298     DINIT(bug("[ATA%02ld] common_DetectXferModes: Supports\n", unit->au_UnitNum));
1299
1300     if (unit->au_Drive->id_Commands4 & (1 << 4))
1301     {
1302         DINIT(bug("[ATA%02ld] common_DetectXferModes: - Packet interface\n", unit->au_UnitNum));
1303         unit->au_XferModes     |= AF_XFER_PACKET;
1304         unit->au_DirectSCSI     = atapi_DirectSCSI;
1305     }
1306     else if (unit->au_Drive->id_Commands5 & (1 << 10))
1307     {
1308         /* ATAPI devices do not use this bit. */
1309         DINIT(bug("[ATA%02ld] common_DetectXferModes: - 48bit I/O\n", unit->au_UnitNum));
1310         unit->au_XferModes     |= AF_XFER_48BIT;
1311     }
1312
1313     if ((unit->au_XferModes & AF_XFER_PACKET) || (unit->au_Drive->id_Capabilities & (1<< 9)))
1314     {
1315         DINIT(bug("[ATA%02ld] common_DetectXferModes: - LBA Addressing\n", unit->au_UnitNum));
1316         unit->au_XferModes     |= AF_XFER_LBA;
1317     }
1318     else
1319     {
1320         DINIT(bug("[ATA%02ld] common_DetectXferModes: - DEVICE DOES NOT SUPPORT LBA ADDRESSING >> THIS IS A POTENTIAL PROBLEM <<\n", unit->au_UnitNum));
1321     }
1322
1323     if (unit->au_Drive->id_RWMultipleSize & 0xff)
1324     {
1325         DINIT(bug("[ATA%02ld] common_DetectXferModes: - R/W Multiple (%ld sectors per xfer)\n", unit->au_UnitNum, unit->au_Drive->id_RWMultipleSize & 0xff));
1326         unit->au_XferModes     |= AF_XFER_RWMULTI;
1327     }
1328
1329     DINIT(bug("[ATA%02ld] common_DetectXferModes: - PIO0 PIO1 PIO2 ",
1330         unit->au_UnitNum));
1331     unit->au_XferModes |= AF_XFER_PIO(0) | AF_XFER_PIO(1) | AF_XFER_PIO(2);
1332     if (unit->au_Drive->id_ConfigAvailable & (1 << 1))
1333     {
1334         for (iter = 0; iter < 2; iter++)
1335         {
1336             if (unit->au_Drive->id_PIOSupport & (1 << iter))
1337             {
1338                 DINIT(bug("PIO%ld ", 3 + iter));
1339                 unit->au_XferModes |= AF_XFER_PIO(3 + iter);
1340             }
1341         }
1342         DINIT(bug("\n"));
1343     }
1344
1345     if ((unit->au_Drive->id_ConfigAvailable & (1 << 1)) &&
1346         (unit->au_Drive->id_Capabilities & (1<<8)))
1347     {
1348         DINIT(bug("[ATA%02ld] common_DetectXferModes: DMA:\n", unit->au_UnitNum));
1349         if (unit->au_Drive->id_MWDMASupport & 0xff)
1350         {
1351             DINIT(bug("[ATA%02ld] common_DetectXferModes: - ", unit->au_UnitNum));
1352             for (iter = 0; iter < 3; iter++)
1353             {
1354                 if (unit->au_Drive->id_MWDMASupport & (1 << iter))
1355                 {
1356                     unit->au_XferModes |= AF_XFER_MDMA(iter);
1357                     if (unit->au_Drive->id_MWDMASupport & (256 << iter))
1358                     {
1359                         DINIT(bug("[MDMA%ld] ", iter));
1360                     }
1361                     else
1362                     {
1363                         DINIT(bug("MDMA%ld ", iter));
1364                     }
1365                 }
1366             }
1367             DINIT(bug("\n"));
1368         }
1369
1370         if (unit->au_Drive->id_UDMASupport & 0xff)
1371         {
1372             DINIT(bug("[ATA%02ld] common_DetectXferModes: - ", unit->au_UnitNum));
1373             for (iter = 0; iter < 7; iter++)
1374             {
1375                 if (unit->au_Drive->id_UDMASupport & (1 << iter))
1376                 {
1377                     unit->au_XferModes |= AF_XFER_UDMA(iter);
1378                     if (unit->au_Drive->id_UDMASupport & (256 << iter))
1379                     {
1380                         DINIT(bug("[UDMA%ld] ", iter));
1381                     }
1382                     else
1383                     {
1384                         DINIT(bug("UDMA%ld ", iter));
1385                     }
1386                 }
1387             }
1388             DINIT(bug("\n"));
1389         }
1390     }
1391 }
1392
1393 #define SWAP_LE_WORD(x) (x) = AROS_LE2WORD((x))
1394 #define SWAP_LE_LONG(x) (x) = AROS_LE2LONG((x))
1395 #define SWAP_LE_QUAD(x) (x) = AROS_LE2LONG((x) >> 32) | (((QUAD)(AROS_LE2LONG((x) & 0xffffffff))) << 32)
1396
1397 BYTE ata_Identify(struct ata_Unit* unit)
1398 {
1399     BOOL atapi = unit->au_Bus->ab_Dev[unit->au_UnitNum & 1] & 0x80;
1400     ata_CommandBlock acb =
1401     {
1402         atapi ? ATA_IDENTIFY_ATAPI : ATA_IDENTIFY_DEVICE,
1403         0,
1404         1,
1405         0,
1406         0,
1407         0,
1408         unit->au_Drive,
1409         sizeof(struct DriveIdent),
1410         0,
1411         CM_PIORead,
1412         CT_NoBlock
1413     };
1414
1415     /* If the right command fails, try the wrong one. If both fail, abort */
1416     DINIT(bug("[ATA%02ld] ata_Identify: Executing ATA_IDENTIFY_%s command\n",
1417         unit->au_UnitNum, atapi ? "ATAPI" : "DEVICE"));
1418     if (ata_exec_cmd(unit, &acb))
1419     {
1420         acb.command = atapi ? ATA_IDENTIFY_DEVICE : ATA_IDENTIFY_ATAPI;
1421         DINIT(bug("[ATA%02ld] ata_Identify: Executing ATA_IDENTIFY_%s command"
1422             " instead\n", unit->au_UnitNum, atapi ? "DEVICE" : "ATAPI"));
1423         if (ata_exec_cmd(unit, &acb))
1424         {
1425             DINIT(bug("[ATA%02ld] ata_Identify: Both command variants failed\n",
1426                 unit->au_UnitNum));
1427             return IOERR_OPENFAIL;
1428         }
1429         unit->au_Bus->ab_Dev[unit->au_UnitNum & 1] ^= 0x82;
1430         atapi = unit->au_Bus->ab_Dev[unit->au_UnitNum & 1] & 0x80;
1431         DINIT(bug("[ATA%02ld] ata_Identify:"
1432             " Incorrect device signature detected."
1433             " Switching device type to %lx.\n", unit->au_UnitNum,
1434             unit->au_Bus->ab_Dev[unit->au_UnitNum & 1]));
1435     }
1436
1437     /*
1438      * If every second word is zero with 32-bit reads, switch to 16-bit
1439      * accesses for this drive and try again
1440      */
1441     if (unit->au_Bus->ab_Base->ata_32bit)
1442     {
1443         UWORD n = 0, *p, *limit;
1444
1445         for (p = (UWORD *)unit->au_Drive, limit = p + 256; p < limit; p++)
1446             n |= *++p;
1447
1448         if (n == 0)
1449         {
1450             DINIT(bug("[ATA%02ld] Identify data was invalid with 32-bit reads."
1451                 " Switching to 16-bit mode.\n", unit->au_UnitNum));
1452
1453             unit->au_ins  = unit->au_Bus->ab_Driver->ata_insw;
1454             unit->au_outs = unit->au_Bus->ab_Driver->ata_outsw;
1455
1456             if (ata_exec_cmd(unit, &acb))
1457                 return IOERR_OPENFAIL;
1458         }
1459     }
1460
1461 #if (AROS_BIG_ENDIAN != 0)
1462     SWAP_LE_WORD(unit->au_Drive->id_General);
1463     SWAP_LE_WORD(unit->au_Drive->id_OldCylinders);
1464     SWAP_LE_WORD(unit->au_Drive->id_SpecificConfig);
1465     SWAP_LE_WORD(unit->au_Drive->id_OldHeads);
1466     SWAP_LE_WORD(unit->au_Drive->id_OldSectors);
1467     SWAP_LE_WORD(unit->au_Drive->id_RWMultipleSize);
1468     SWAP_LE_WORD(unit->au_Drive->id_Capabilities);
1469     SWAP_LE_WORD(unit->au_Drive->id_OldCaps);
1470     SWAP_LE_WORD(unit->au_Drive->id_OldPIO);
1471     SWAP_LE_WORD(unit->au_Drive->id_ConfigAvailable);
1472     SWAP_LE_WORD(unit->au_Drive->id_OldLCylinders);
1473     SWAP_LE_WORD(unit->au_Drive->id_OldLHeads);
1474     SWAP_LE_WORD(unit->au_Drive->id_OldLSectors);
1475     SWAP_LE_WORD(unit->au_Drive->id_RWMultipleTrans);
1476     SWAP_LE_WORD(unit->au_Drive->id_MWDMASupport);
1477     SWAP_LE_WORD(unit->au_Drive->id_PIOSupport);
1478     SWAP_LE_WORD(unit->au_Drive->id_MWDMA_MinCycleTime);
1479     SWAP_LE_WORD(unit->au_Drive->id_MWDMA_DefCycleTime);
1480     SWAP_LE_WORD(unit->au_Drive->id_PIO_MinCycleTime);
1481     SWAP_LE_WORD(unit->au_Drive->id_PIO_MinCycleTimeIORDY);
1482     SWAP_LE_WORD(unit->au_Drive->id_QueueDepth);
1483     SWAP_LE_WORD(unit->au_Drive->id_ATAVersion);
1484     SWAP_LE_WORD(unit->au_Drive->id_ATARevision);
1485     SWAP_LE_WORD(unit->au_Drive->id_Commands1);
1486     SWAP_LE_WORD(unit->au_Drive->id_Commands2);
1487     SWAP_LE_WORD(unit->au_Drive->id_Commands3);
1488     SWAP_LE_WORD(unit->au_Drive->id_Commands4);
1489     SWAP_LE_WORD(unit->au_Drive->id_Commands5);
1490     SWAP_LE_WORD(unit->au_Drive->id_Commands6);
1491     SWAP_LE_WORD(unit->au_Drive->id_UDMASupport);
1492     SWAP_LE_WORD(unit->au_Drive->id_SecurityEraseTime);
1493     SWAP_LE_WORD(unit->au_Drive->id_ESecurityEraseTime);
1494     SWAP_LE_WORD(unit->au_Drive->id_CurrentAdvPowerMode);
1495     SWAP_LE_WORD(unit->au_Drive->id_MasterPwdRevision);
1496     SWAP_LE_WORD(unit->au_Drive->id_HWResetResult);
1497     SWAP_LE_WORD(unit->au_Drive->id_AcousticManagement);
1498     SWAP_LE_WORD(unit->au_Drive->id_StreamMinimunReqSize);
1499     SWAP_LE_WORD(unit->au_Drive->id_StreamingTimeDMA);
1500     SWAP_LE_WORD(unit->au_Drive->id_StreamingLatency);
1501     SWAP_LE_WORD(unit->au_Drive->id_StreamingTimePIO);
1502     SWAP_LE_WORD(unit->au_Drive->id_PhysSectorSize);
1503     SWAP_LE_WORD(unit->au_Drive->id_RemMediaStatusNotificationFeatures);
1504     SWAP_LE_WORD(unit->au_Drive->id_SecurityStatus);
1505
1506     SWAP_LE_LONG(unit->au_Drive->id_WordsPerLogicalSector);
1507     SWAP_LE_LONG(unit->au_Drive->id_LBASectors);
1508     SWAP_LE_LONG(unit->au_Drive->id_StreamingGranularity);
1509
1510     SWAP_LE_QUAD(unit->au_Drive->id_LBA48Sectors);
1511 #endif
1512
1513     DUMP(dump(unit->au_Drive, sizeof(struct DriveIdent)));
1514
1515     if (atapi)
1516     {
1517         unit->au_SectorShift    = 11;
1518         unit->au_Read32         = atapi_Read;
1519         unit->au_Write32        = atapi_Write;
1520         unit->au_DirectSCSI     = atapi_DirectSCSI;
1521         unit->au_Eject          = atapi_Eject;
1522         unit->au_Flags          |= AF_DiscChanged;
1523         unit->au_DevType        = (unit->au_Drive->id_General >>8) & 0x1f;
1524         unit->au_XferModes      = AF_XFER_PACKET;
1525     }
1526     else
1527     {
1528         unit->au_SectorShift    = 9;
1529         unit->au_DevType        = DG_DIRECT_ACCESS;
1530         unit->au_Read32         = ata_ReadSector32;
1531         unit->au_Write32        = ata_WriteSector32;
1532         unit->au_Eject          = ata_Eject;
1533         unit->au_XferModes      = 0;
1534         unit->au_Flags         |= AF_DiscPresent | AF_DiscChanged;
1535     }
1536
1537     ata_strcpy(unit->au_Drive->id_Model, unit->au_Model, 40);
1538     ata_strcpy(unit->au_Drive->id_SerialNumber, unit->au_SerialNumber, 20);
1539     ata_strcpy(unit->au_Drive->id_FirmwareRev, unit->au_FirmwareRev, 8);
1540
1541     bug("[ATA%02ld] ata_Identify: Unit info: %s / %s / %s\n", unit->au_UnitNum, unit->au_Model, unit->au_SerialNumber, unit->au_FirmwareRev);
1542     common_DetectXferModes(unit);
1543     common_SetBestXferMode(unit);
1544
1545     if (unit->au_Drive->id_General & 0x80)
1546     {
1547         DINIT(bug("[ATA%02ld] ata_Identify: Device is removable.\n", unit->au_UnitNum));
1548         unit->au_Flags |= AF_Removable;
1549     }
1550
1551     unit->au_Capacity   = unit->au_Drive->id_LBASectors;
1552     unit->au_Capacity48 = unit->au_Drive->id_LBA48Sectors;
1553     bug("[ATA%02ld] ata_Identify: Unit info: %07lx 28bit / %04lx:%08lx 48bit addressable blocks\n", unit->au_UnitNum, unit->au_Capacity, (ULONG)(unit->au_Capacity48 >> 32), (ULONG)(unit->au_Capacity48 & 0xfffffffful));
1554
1555     if (atapi)
1556     {
1557         /*
1558          * ok, this is not very original, but quite compatible :P
1559          */
1560         switch (unit->au_DevType)
1561         {
1562             case DG_CDROM:
1563             case DG_WORM:
1564             case DG_OPTICAL_DISK:
1565                 unit->au_SectorShift    = 11;
1566                 unit->au_Heads          = 1;
1567                 unit->au_Sectors        = 75;
1568                 unit->au_Cylinders      = 4440;
1569                 break;
1570
1571             case DG_DIRECT_ACCESS:
1572                 unit->au_SectorShift = 9;
1573                 if (!strcmp("LS-120", &unit->au_Model[0]))
1574                 {
1575                     unit->au_Heads      = 2;
1576                     unit->au_Sectors    = 18;
1577                     unit->au_Cylinders  = 6848;
1578                 }
1579                 else if (!strcmp("ZIP 100 ", &unit->au_Model[8]))
1580                 {
1581                     unit->au_Heads      = 1;
1582                     unit->au_Sectors    = 64;
1583                     unit->au_Cylinders  = 3072;
1584                 }
1585                 break;
1586         }
1587
1588         atapi_TestUnitOK(unit);
1589     }
1590     else
1591     {
1592         /*
1593            For drive capacities > 8.3GB assume maximal possible layout.
1594            It really doesn't matter here, as BIOS will not handle them in
1595            CHS way anyway :)
1596            i guess this just solves that weirdo div-by-zero crash, if nothing
1597            else...
1598            */
1599         if ((unit->au_Drive->id_LBA48Sectors > (63 * 255 * 1024)) ||
1600             (unit->au_Drive->id_LBASectors > (63 * 255 * 1024)))
1601         {
1602             ULONG div = 1;
1603             /*
1604              * TODO: this shouldn't be casted down here.
1605              */
1606             ULONG sec = unit->au_Capacity48;
1607
1608             if (sec < unit->au_Capacity48)
1609                 sec = ~((ULONG)0);
1610
1611             if (sec < unit->au_Capacity)
1612                 sec = unit->au_Capacity;
1613
1614             unit->au_Sectors = 63;
1615             sec /= 63;
1616             /*
1617              * keep dividing by 2
1618              */
1619             do
1620             {
1621                 if (((sec >> 1) << 1) != sec)
1622                     break;
1623                 if ((div << 1) > 255)
1624                     break;
1625                 div <<= 1;
1626                 sec >>= 1;
1627             } while (1);
1628
1629             do
1630             {
1631                 if (((sec / 3) * 3) != sec)
1632                     break;
1633                 if ((div * 3) > 255)
1634                     break;
1635                 div *= 3;
1636                 sec /= 3;
1637             } while (1);
1638
1639             unit->au_Cylinders  = sec;
1640             unit->au_Heads      = div;
1641         }
1642         else
1643         {
1644             unit->au_Cylinders  = unit->au_Drive->id_OldLCylinders;
1645             unit->au_Heads      = unit->au_Drive->id_OldLHeads;
1646             unit->au_Sectors    = unit->au_Drive->id_OldLSectors;
1647         }
1648     }
1649
1650     return 0;
1651 }
1652
1653 /*
1654  * ata read32 commands
1655  */
1656 static BYTE ata_ReadSector32(struct ata_Unit *unit, ULONG block,
1657     ULONG count, APTR buffer, ULONG *act)
1658 {
1659     ata_CommandBlock acb =
1660     {
1661         ATA_READ,
1662         0,
1663         1,
1664         0,
1665         block,
1666         count,
1667         buffer,
1668         count << unit->au_SectorShift,
1669         0,
1670         CM_PIORead,
1671         CT_LBA28
1672     };
1673     BYTE err;
1674
1675     D(bug("[ATA%02ld] ata_ReadSector32()\n", unit->au_UnitNum));
1676
1677     *act = 0;
1678     if (0 != (err = ata_exec_blk(unit, &acb)))
1679         return err;
1680
1681     *act = count << unit->au_SectorShift;
1682     return 0;
1683 }
1684
1685 static BYTE ata_ReadMultiple32(struct ata_Unit *unit, ULONG block,
1686     ULONG count, APTR buffer, ULONG *act)
1687 {
1688     ata_CommandBlock acb =
1689     {
1690         ATA_READ_MULTIPLE,
1691         0,
1692         unit->au_Drive->id_RWMultipleSize & 0xff,
1693         0,
1694         block,
1695         count,
1696         buffer,
1697         count << unit->au_SectorShift,
1698         0,
1699         CM_PIORead,
1700         CT_LBA28
1701     };
1702     BYTE err;
1703
1704     D(bug("[ATA%02ld] ata_ReadMultiple32()\n", unit->au_UnitNum));
1705
1706     *act = 0;
1707     if (0 != (err = ata_exec_blk(unit, &acb)))
1708         return err;
1709
1710     *act = count << unit->au_SectorShift;
1711     return 0;
1712 }
1713
1714 static BYTE ata_ReadDMA32(struct ata_Unit *unit, ULONG block,
1715     ULONG count, APTR buffer, ULONG *act)
1716 {
1717     BYTE err;
1718     ata_CommandBlock acb =
1719     {
1720         ATA_READ_DMA,
1721         0,
1722         1,
1723         0,
1724         block,
1725         count,
1726         buffer,
1727         count << unit->au_SectorShift,
1728         0,
1729         CM_DMARead,
1730         CT_LBA28
1731     };
1732
1733     D(bug("[ATA%02ld] ata_ReadDMA32()\n", unit->au_UnitNum));
1734
1735     *act = 0;
1736     if (0 != (err = ata_exec_blk(unit, &acb)))
1737         return err;
1738
1739     *act = count << unit->au_SectorShift;
1740     return 0;
1741 }
1742
1743 /*
1744  * ata read64 commands
1745  */
1746 static BYTE ata_ReadSector64(struct ata_Unit *unit, UQUAD block,
1747     ULONG count, APTR buffer, ULONG *act)
1748 {
1749     ata_CommandBlock acb =
1750     {
1751         ATA_READ64,
1752         0,
1753         1,
1754         0,
1755         block,
1756         count,
1757         buffer,
1758         count << unit->au_SectorShift,
1759         0,
1760         CM_PIORead,
1761         CT_LBA48
1762     };
1763     BYTE err = 0;
1764
1765     D(bug("[ATA%02ld] ata_ReadSector64()\n", unit->au_UnitNum));
1766
1767     *act = 0;
1768     if (0 != (err = ata_exec_blk(unit, &acb)))
1769         return err;
1770
1771     *act = count << unit->au_SectorShift;
1772     return 0;
1773 }
1774
1775 static BYTE ata_ReadMultiple64(struct ata_Unit *unit, UQUAD block,
1776     ULONG count, APTR buffer, ULONG *act)
1777 {
1778     ata_CommandBlock acb =
1779     {
1780         ATA_READ_MULTIPLE64,
1781         0,
1782         unit->au_Drive->id_RWMultipleSize & 0xff,
1783         0,
1784         block,
1785         count,
1786         buffer,
1787         count << unit->au_SectorShift,
1788         0,
1789         CM_PIORead,
1790         CT_LBA48
1791     };
1792     BYTE err;
1793
1794     D(bug("[ATA%02ld] ata_ReadMultiple64()\n", unit->au_UnitNum));
1795
1796     *act = 0;
1797     if (0 != (err = ata_exec_blk(unit, &acb)))
1798         return err;
1799
1800     *act = count << unit->au_SectorShift;
1801     return 0;
1802 }
1803
1804 static BYTE ata_ReadDMA64(struct ata_Unit *unit, UQUAD block,
1805     ULONG count, APTR buffer, ULONG *act)
1806 {
1807     ata_CommandBlock acb =
1808     {
1809         ATA_READ_DMA64,
1810         0,
1811         1,
1812         0,
1813         block,
1814         count,
1815         buffer,
1816         count << unit->au_SectorShift,
1817         0,
1818         CM_DMARead,
1819         CT_LBA48
1820     };
1821     BYTE err;
1822
1823     D(bug("[ATA%02ld] ata_ReadDMA64()\n", unit->au_UnitNum));
1824
1825     *act = 0;
1826     if (0 != (err = ata_exec_blk(unit, &acb)))
1827         return err;
1828
1829     *act = count << unit->au_SectorShift;
1830     return 0;
1831 }
1832
1833 /*
1834  * ata write32 commands
1835  */
1836 static BYTE ata_WriteSector32(struct ata_Unit *unit, ULONG block,
1837     ULONG count, APTR buffer, ULONG *act)
1838 {
1839     ata_CommandBlock acb =
1840     {
1841         ATA_WRITE,
1842         0,
1843         1,
1844         0,
1845         block,
1846         count,
1847         buffer,
1848         count << unit->au_SectorShift,
1849         0,
1850         CM_PIOWrite,
1851         CT_LBA28
1852     };
1853     BYTE err;
1854
1855     D(bug("[ATA%02ld] ata_WriteSector32()\n", unit->au_UnitNum));
1856
1857     *act = 0;
1858     if (0 != (err = ata_exec_blk(unit, &acb)))
1859         return err;
1860
1861     *act = count << unit->au_SectorShift;
1862     return 0;
1863 }
1864
1865 static BYTE ata_WriteMultiple32(struct ata_Unit *unit, ULONG block,
1866     ULONG count, APTR buffer, ULONG *act)
1867 {
1868     ata_CommandBlock acb =
1869     {
1870         ATA_WRITE_MULTIPLE,
1871         0,
1872         unit->au_Drive->id_RWMultipleSize & 0xff,
1873         0,
1874         block,
1875         count,
1876         buffer,
1877         count << unit->au_SectorShift,
1878         0,
1879         CM_PIOWrite,
1880         CT_LBA28
1881     };
1882     BYTE err;
1883
1884     D(bug("[ATA%02ld] ata_WriteMultiple32()\n", unit->au_UnitNum));
1885
1886     *act = 0;
1887     if (0 != (err = ata_exec_blk(unit, &acb)))
1888         return err;
1889
1890     *act = count << unit->au_SectorShift;
1891     return 0;
1892 }
1893
1894 static BYTE ata_WriteDMA32(struct ata_Unit *unit, ULONG block,
1895     ULONG count, APTR buffer, ULONG *act)
1896 {
1897     ata_CommandBlock acb =
1898     {
1899         ATA_WRITE_DMA,
1900         0,
1901         1,
1902         0,
1903         block,
1904         count,
1905         buffer,
1906         count << unit->au_SectorShift,
1907         0,
1908         CM_DMAWrite,
1909         CT_LBA28
1910     };
1911     BYTE err;
1912
1913     D(bug("[ATA%02ld] ata_WriteDMA32()\n", unit->au_UnitNum));
1914
1915     *act = 0;
1916     if (0 != (err = ata_exec_blk(unit, &acb)))
1917         return err;
1918
1919     *act = count << unit->au_SectorShift;
1920     return 0;
1921 }
1922
1923 /*
1924  * ata write64 commands
1925  */
1926 static BYTE ata_WriteSector64(struct ata_Unit *unit, UQUAD block,
1927     ULONG count, APTR buffer, ULONG *act)
1928 {
1929     ata_CommandBlock acb =
1930     {
1931         ATA_WRITE64,
1932         0,
1933         1,
1934         0,
1935         block,
1936         count,
1937         buffer,
1938         count << unit->au_SectorShift,
1939         0,
1940         CM_PIOWrite,
1941         CT_LBA48
1942     };
1943     BYTE err;
1944
1945     D(bug("[ATA%02ld] ata_WriteSector64()\n", unit->au_UnitNum));
1946
1947     *act = 0;
1948     if (0 != (err = ata_exec_blk(unit, &acb)))
1949         return err;
1950
1951     *act = count << unit->au_SectorShift;
1952     return 0;
1953 }
1954
1955 static BYTE ata_WriteMultiple64(struct ata_Unit *unit, UQUAD block,
1956     ULONG count, APTR buffer, ULONG *act)
1957 {
1958     ata_CommandBlock acb =
1959     {
1960         ATA_WRITE_MULTIPLE64,
1961         0,
1962         unit->au_Drive->id_RWMultipleSize & 0xff,
1963         0,
1964         block,
1965         count,
1966         buffer,
1967         count << unit->au_SectorShift,
1968         0,
1969         CM_PIOWrite,
1970         CT_LBA48
1971     };
1972     BYTE err;
1973
1974     D(bug("[ATA%02ld] ata_WriteMultiple64()\n", unit->au_UnitNum));
1975
1976     *act = 0;
1977     if (0 != (err = ata_exec_blk(unit, &acb)))
1978         return err;
1979
1980     *act = count << unit->au_SectorShift;
1981     return 0;
1982 }
1983
1984 static BYTE ata_WriteDMA64(struct ata_Unit *unit, UQUAD block,
1985     ULONG count, APTR buffer, ULONG *act)
1986 {
1987     ata_CommandBlock acb =
1988     {
1989         ATA_WRITE_DMA64,
1990         0,
1991         1,
1992         0,
1993         block,
1994         count,
1995         buffer,
1996         count << unit->au_SectorShift,
1997         0,
1998         CM_DMAWrite,
1999         CT_LBA48
2000     };
2001     BYTE err;
2002
2003     D(bug("[ATA%02ld] ata_WriteDMA64()\n", unit->au_UnitNum));
2004
2005     *act = 0;
2006     if (0 != (err = ata_exec_blk(unit, &acb)))
2007         return err;
2008
2009     *act = count << unit->au_SectorShift;
2010     return 0;
2011 }
2012
2013 /*
2014  * ata miscellaneous commands
2015  */
2016 static BYTE ata_Eject(struct ata_Unit *unit)
2017 {
2018     ata_CommandBlock acb =
2019     {
2020         ATA_MEDIA_EJECT,
2021         0,
2022         0,
2023         0,
2024         0,
2025         0,
2026         0,
2027         0,
2028         0,
2029         CM_NoData,
2030         CT_NoBlock
2031     };
2032
2033     D(bug("[ATA%02ld] ata_Eject()\n", unit->au_UnitNum));
2034
2035     return ata_exec_cmd(unit, &acb);
2036 }
2037
2038 /*
2039  * atapi commands
2040  */
2041 int atapi_TestUnitOK(struct ata_Unit *unit)
2042 {
2043     UBYTE cmd[6] = {
2044         0
2045     };
2046     UBYTE sense[16] = {
2047         0
2048     };
2049     struct SCSICmd sc = {
2050        0
2051     };
2052
2053     D(bug("[ATA%02ld] atapi_TestUnitOK()\n", unit->au_UnitNum));
2054
2055     sc.scsi_Command = (void*) &cmd;
2056     sc.scsi_CmdLength = sizeof(cmd);
2057     sc.scsi_SenseData = (void*)&sense;
2058     sc.scsi_SenseLength = sizeof(sense);
2059     sc.scsi_Flags = SCSIF_AUTOSENSE;
2060
2061     DATAPI(bug("[ATA%02ld] atapi_TestUnitOK: Testing Unit Ready sense...\n", unit->au_UnitNum));
2062     unit->au_DirectSCSI(unit, &sc);
2063     unit->au_SenseKey = sense[2];
2064
2065     /*
2066      * we may have just lost the disc...?
2067      */
2068     /*
2069      * per MMC, drives are expected to return 02-3a-0# status, when disc is not present
2070      * that would translate into following code:
2071      *    int p1 = ((sense[2] == 2) && (sense[12] == 0x3a)) ? 1 : 0;
2072      * unfortunately, it's what MMC says, not what vendors code.
2073      */
2074     int p1 = (sense[2] == 2) ? 1 : 0;
2075     int p2 = (0 != (AF_DiscPresent & unit->au_Flags)) ? 1 : 0;
2076
2077     if (p1 == p2)
2078     {
2079         //unit->au_Flags ^= AF_DiscPresent;
2080         if (p1 == 0)
2081             unit->au_Flags |= AF_DiscPresent;
2082         else
2083             unit->au_Flags &= ~AF_DiscPresent;
2084
2085         unit->au_Flags |= AF_DiscChanged;
2086     }
2087
2088     DATAPI(bug("[ATA%02ld] atapi_TestUnitOK: Test Unit Ready sense: %02lx, Media %s\n", unit->au_UnitNum, sense[2], unit->au_Flags & AF_DiscPresent ? "PRESENT" : "ABSENT"));
2089     return sense[2];
2090 }
2091
2092 static BYTE atapi_Read(struct ata_Unit *unit, ULONG block, ULONG count,
2093     APTR buffer, ULONG *act)
2094 {
2095     UBYTE cmd[] = {
2096        SCSI_READ10, 0, block>>24, block>>16, block>>8, block, 0, count>>8, count, 0
2097     };
2098     struct SCSICmd sc = {
2099        0
2100     };
2101
2102     D(bug("[ATA%02ld] atapi_Read()\n", unit->au_UnitNum));
2103
2104     sc.scsi_Command = (void*) &cmd;
2105     sc.scsi_CmdLength = sizeof(cmd);
2106     sc.scsi_Data = buffer;
2107     sc.scsi_Length = count << unit->au_SectorShift;
2108     sc.scsi_Flags = SCSIF_READ;
2109
2110     return unit->au_DirectSCSI(unit, &sc);
2111 }
2112
2113 static BYTE atapi_Write(struct ata_Unit *unit, ULONG block, ULONG count,
2114     APTR buffer, ULONG *act)
2115 {
2116     UBYTE cmd[] = {
2117        SCSI_WRITE10, 0, block>>24, block>>16, block>>8, block, 0, count>>8, count, 0
2118     };
2119     struct SCSICmd sc = {
2120        0
2121     };
2122
2123     D(bug("[ATA%02ld] atapi_Write()\n", unit->au_UnitNum));
2124
2125     sc.scsi_Command = (void*) &cmd;
2126     sc.scsi_CmdLength = sizeof(cmd);
2127     sc.scsi_Data = buffer;
2128     sc.scsi_Length = count << unit->au_SectorShift;
2129     sc.scsi_Flags = SCSIF_WRITE;
2130
2131     return unit->au_DirectSCSI(unit, &sc);
2132 }
2133
2134 static BYTE atapi_Eject(struct ata_Unit *unit)
2135 {
2136     struct atapi_StartStop cmd = {
2137         command: SCSI_STARTSTOP,
2138         immediate: 1,
2139         flags: ATAPI_SS_EJECT,
2140     };
2141
2142     struct SCSICmd sc = {
2143        0
2144     };
2145
2146     D(bug("[ATA%02ld] atapi_Eject()\n", unit->au_UnitNum));
2147
2148     sc.scsi_Command = (void*) &cmd;
2149     sc.scsi_CmdLength = sizeof(cmd);
2150     sc.scsi_Flags = SCSIF_READ;
2151
2152     return unit->au_DirectSCSI(unit, &sc);
2153 }
2154
2155 ULONG atapi_RequestSense(struct ata_Unit* unit, UBYTE* sense, ULONG senselen)
2156 {
2157     UBYTE cmd[] = {
2158        3, 0, 0, 0, senselen & 0xfe, 0
2159     };
2160     struct SCSICmd sc = {
2161        0
2162     };
2163
2164     D(bug("[ATA%02ld] atapi_RequestSense()\n", unit->au_UnitNum));
2165
2166     if ((senselen == 0) || (sense == 0))
2167     {
2168        return 0;
2169     }
2170     sc.scsi_Data = (void*)sense;
2171     sc.scsi_Length = senselen & 0xfe;
2172     sc.scsi_Command = (void*)&cmd;
2173     sc.scsi_CmdLength = 6;
2174     sc.scsi_Flags = SCSIF_READ;
2175
2176     unit->au_DirectSCSI(unit, &sc);
2177
2178     DATAPI(dump(sense, senselen));
2179     DATAPI(bug("[SENSE] atapi_RequestSense: sensed data: %lx %lx %lx\n", sense[2]&0xf, sense[12], sense[13]));
2180     return ((sense[2]&0xf)<<16) | (sense[12]<<8) | (sense[13]);
2181 }
2182
2183 ULONG ata_ReadSignature(struct ata_Bus *bus, int unit, BOOL *DiagExecuted)
2184 {
2185     ULONG port = bus->ab_Port;
2186     UBYTE tmp1, tmp2;
2187
2188     D(bug("[ATA  ] ata_ReadSignature(%02ld)\n", unit));
2189
2190     BUS_OUT(DEVHEAD_VAL | (unit << 4), ata_DevHead, port);
2191     ata_WaitNano(400, bus->ab_Base);
2192     //ata_WaitTO(bus->ab_Timer, 0, 1, 0);
2193
2194     DINIT(bug("[ATA  ] ata_ReadSignature: Status %02lx Device %02lx\n",
2195     ata_ReadStatus(bus), BUS_IN(ata_DevHead, port)));
2196
2197     /* Ok, ATA/ATAPI device. Get detailed signature */
2198     DINIT(bug("[ATA  ] ata_ReadSignature: ATA[PI] device present. Attempting to detect specific subtype\n"));
2199
2200     tmp1 = BUS_IN(ata_LBAMid, port);
2201     tmp2 = BUS_IN(ata_LBAHigh, port);
2202
2203     DINIT(bug("[ATA  ] ata_ReadSignature: Subtype check returned %02lx:%02lx (%04lx)\n", tmp1, tmp2, (tmp1 << 8) | tmp2));
2204
2205     switch ((tmp1 << 8) | tmp2)
2206     {
2207         case 0x14eb:
2208             DINIT(bug("[ATA  ] ata_ReadSignature: Found signature for ATAPI device\n"));
2209             return DEV_ATAPI;
2210
2211         case 0x3cc3:
2212             DINIT(bug("[ATA  ] ata_ReadSignature: Found signature for SATA device\n"));
2213             return DEV_SATA;
2214
2215         case 0x6996:
2216             DINIT(bug("[ATA  ] ata_ReadSignature: Found signature for SATAPI device\n"));
2217             return DEV_SATAPI;
2218
2219         default:
2220             if (0 == (ata_ReadStatus(bus) & 0xfe)) {
2221                 DINIT(bug("[ATA  ] ata_ReadSignature: Found NONE\n"));
2222                 return DEV_NONE;
2223             }
2224             /* ATA_EXECUTE_DIAG is executed by both devices, do it only once */
2225             if (!*DiagExecuted)
2226             {
2227                 DINIT(bug("[ATA  ] ata_ReadSignature: ATA_EXECUTE_DIAG\n"));
2228                 BUS_OUT(ATA_EXECUTE_DIAG, ata_Command, port);
2229                 *DiagExecuted = TRUE;
2230             }
2231
2232             ata_WaitTO(bus->ab_Timer, 0, 2000, 0);
2233             while (ata_ReadStatus(bus) & ATAF_BUSY)
2234                 ata_WaitNano(400, bus->ab_Base);
2235                 //ata_WaitTO(bus->ab_Timer, 0, 1, 0);
2236
2237             DINIT(bug("[ATA  ] ata_ReadSignature: ATAF_BUSY wait finished\n"));
2238
2239             BUS_OUT(DEVHEAD_VAL | (unit << 4), ata_DevHead, port);
2240             do
2241             {
2242                 ata_WaitNano(400, bus->ab_Base);
2243                 //ata_WaitTO(unit->au_Bus->ab_Timer, 0, 1, 0);
2244             }
2245             while (0 != (ATAF_BUSY & ata_ReadStatus(bus)));
2246             DINIT(bug("[ATA  ] ata_ReadSignature: Further validating ATA signature: %lx & 0x7f = 1, %lx & 0x10 = unit\n", BUS_IN(ata_Error, port), BUS_IN(ata_DevHead, port)));
2247
2248             if ((BUS_IN(ata_Error, port) & 0x7f) == 1)
2249             {
2250                 DINIT(bug("[ATA  ] ata_ReadSignature: Found *valid* signature for ATA device\n"));
2251                 /* this might still be an (S)ATAPI device, but we correct that in ata_Identify */
2252                 return DEV_ATA;
2253             }
2254             DERROR(bug("[ATA  ] ata_ReadSignature: Found signature for ATA "
2255                 "device, but further validation failed\n"));
2256             return DEV_NONE;
2257     }
2258 }
2259
2260 void ata_ResetBus(struct ata_Bus *bus)
2261 {
2262     ULONG alt = bus->ab_Alt;
2263     ULONG port = bus->ab_Port;
2264     ULONG TimeOut;
2265     BOOL  DiagExecuted = FALSE;
2266
2267     /* Set and then reset the soft reset bit in the Device Control
2268      * register.  This causes device 0 be selected */
2269     DINIT(bug("[ATA  ] ata_ResetBus(%d)\n", bus->ab_BusNum));
2270     BUS_OUT(DEVHEAD_VAL | (0 << 4), ata_DevHead, port);    /* Select it never the less */
2271     ata_WaitNano(400, bus->ab_Base);
2272     //ata_WaitTO(bus->ab_Timer, 0, 1, 0);
2273
2274     BUS_OUT(0x04 | 0x02, ata_AltControl, alt);
2275     ata_WaitTO(bus->ab_Timer, 0, 10, 0);    /* sleep 10us; min: 5us */
2276     BUS_OUT(0x02, ata_AltControl, alt);
2277     ata_WaitTO(bus->ab_Timer, 0, 20000, 0); /* sleep 20ms; min: 2ms */
2278
2279     /* If there is a device 0, wait for device 0 to clear BSY */
2280     if (DEV_NONE != bus->ab_Dev[0]) {
2281         DINIT(bug("[ATA%02ld] ata_ResetBus: Wait for Device to clear BSY\n",
2282             ((bus->ab_BusNum << 1 ) + 0)));
2283         TimeOut = 1000;     /* Timeout 1s (1ms x 1000) */
2284         while ( 1 ) {
2285             if ((ata_ReadStatus(bus) & ATAF_BUSY) == 0)
2286                 break;
2287             ata_WaitTO(bus->ab_Timer, 0, 1000, 0);
2288             if (!(--TimeOut)) {
2289                 DINIT(bug("[ATA%02ld] ata_ResetBus: Device Timed Out!\n",
2290                     ((bus->ab_BusNum << 1 ) + 0)));
2291                 bus->ab_Dev[0] = DEV_NONE;
2292                 break;
2293             }
2294         }
2295         DINIT(bug("[ATA%02ld] ata_ResetBus: Wait left after %d ms\n",
2296             ((bus->ab_BusNum << 1 ) + 0), (1000 - TimeOut)));
2297     }
2298
2299     /* If there is a device 1, wait some time until device 1 allows
2300      * register access, but fail only if BSY isn't cleared */
2301     if (DEV_NONE != bus->ab_Dev[1]) {
2302         DINIT(bug("[ATA  ] ata_ResetBus: Wait DEV1 to allow access\n"));
2303         BUS_OUT(DEVHEAD_VAL | (1 << 4), ata_DevHead, port);
2304         ata_WaitNano(400, bus->ab_Base);
2305         //ata_WaitTO(bus->ab_Timer, 0, 1, 0);
2306
2307         TimeOut = 50;     /* Timeout 50ms (1ms x 50) */
2308         while ( 1 ) {
2309             if ( (BUS_IN(ata_Count, port) == 0x01) && (BUS_IN(ata_LBALow, port) == 0x01) )
2310                 break;
2311             ata_WaitTO(bus->ab_Timer, 0, 1000, 0);
2312             if (!(--TimeOut)) {
2313                 DINIT(bug("[ATA  ] ata_ResetBus: DEV1 1/2 TimeOut!\n"));
2314                 break;
2315             }
2316         }
2317         DINIT(bug("[ATA  ] ata_ResetBus: DEV1 1/2 Wait left after %d ms\n",
2318             (1000 - TimeOut)));
2319
2320         if (DEV_NONE != bus->ab_Dev[1]) {
2321             DINIT(bug("[ATA%02ld] ata_ResetBus: Wait for Device to clear BSY\n",
2322                 ((bus->ab_BusNum << 1 ) + 1)));
2323             TimeOut = 1000;     /* Timeout 1s (1ms x 1000) */
2324             while ( 1 ) {
2325                 if ((ata_ReadStatus(bus) & ATAF_BUSY) == 0)
2326                     break;
2327                 ata_WaitTO(bus->ab_Timer, 0, 1000, 0);
2328                 if (!(--TimeOut)) {
2329                     DINIT(bug("[ATA%02ld] ata_ResetBus: Device Timed Out!\n",
2330                         ((bus->ab_BusNum << 1 ) + 1)));
2331                     bus->ab_Dev[1] = DEV_NONE;
2332                     break;
2333                 }
2334             }
2335             DINIT(bug("[ATA%02ld] ata_ResetBus: Wait left after %d ms\n",
2336                 ((bus->ab_BusNum << 1 ) + 1), 1000 - TimeOut));
2337         }
2338     }
2339
2340     if (DEV_NONE != bus->ab_Dev[0])
2341         bus->ab_Dev[0] = ata_ReadSignature(bus, 0, &DiagExecuted);
2342     if (DEV_NONE != bus->ab_Dev[1])
2343         bus->ab_Dev[1] = ata_ReadSignature(bus, 1, &DiagExecuted);
2344 }
2345
2346 void ata_InitBus(struct ata_Bus *bus)
2347 {
2348     ULONG port = bus->ab_Port;
2349     UBYTE tmp1, tmp2;
2350     UWORD i;
2351
2352     /*
2353      * initialize timer for the sake of scanning
2354      */
2355     bus->ab_Timer = ata_OpenTimer(bus->ab_Base);
2356
2357     DINIT(bug("[ATA  ] ata_InitBus(%d)\n", bus->ab_BusNum));
2358
2359     bus->ab_Dev[0] = DEV_NONE;
2360     bus->ab_Dev[1] = DEV_NONE;
2361
2362     for (i = 0; i < MAX_BUSUNITS; i++)
2363     {
2364         /* Select device and disable IRQs */
2365         BUS_OUT(DEVHEAD_VAL | (i << 4), ata_DevHead, port);
2366         ata_WaitTO(bus->ab_Timer, 0, 100, 0);
2367         BUS_OUT(0x2, ata_AltControl, bus->ab_Alt);
2368
2369         /* Write some pattern to registers */
2370         BUS_OUT(0x55, ata_Count, port);
2371         BUS_OUT(0xaa, ata_LBALow, port);
2372         BUS_OUT(0xaa, ata_Count, port);
2373         BUS_OUT(0x55, ata_LBALow, port);
2374         BUS_OUT(0x55, ata_Count, port);
2375         BUS_OUT(0xaa, ata_LBALow, port);
2376
2377         tmp1 = BUS_IN(ata_Count, port);
2378         tmp2 = BUS_IN(ata_LBALow, port);
2379
2380         if ((tmp1 == 0x55) && (tmp2 == 0xaa))
2381             bus->ab_Dev[i] = DEV_UNKNOWN;
2382         DINIT(bug("[ATA%02ld] ata_InitBus: Device type = %x\n",
2383             (bus->ab_BusNum << 1 ) + i, bus->ab_Dev[i]));
2384     }
2385
2386     ata_ResetBus(bus);
2387     ata_CloseTimer(bus->ab_Timer);
2388     DINIT(bug("[ATA  ] ata_InitBus: Finished\n"));
2389 }
2390
2391 /*
2392  * not really sure what this is meant to be - TO BE REPLACED
2393  */
2394 static const ULONG ErrorMap[] = {
2395     CDERR_NotSpecified,
2396     CDERR_NoSecHdr,
2397     CDERR_NoDisk,
2398     CDERR_NoSecHdr,
2399     CDERR_NoSecHdr,
2400     CDERR_NOCMD,
2401     CDERR_NoDisk,
2402     CDERR_WriteProt,
2403     CDERR_NotSpecified,
2404     CDERR_NotSpecified,
2405     CDERR_NotSpecified,
2406     CDERR_ABORTED,
2407     CDERR_NotSpecified,
2408     CDERR_NotSpecified,
2409     CDERR_NoSecHdr,
2410     CDERR_NotSpecified,
2411 };
2412
2413 static BYTE atapi_EndCmd(struct ata_Unit *unit)
2414 {
2415     UBYTE status;
2416
2417     DATAPI(bug("[ATA%02ld] atapi_EndCmd()\n", unit->au_UnitNum));
2418
2419     /*
2420      * read alternate status register (per specs)
2421      */
2422     status = ATA_IN(ata_AltStatus, unit->au_Bus->ab_Alt);
2423     DATAPI(bug("[ATA%02ld] atapi_EndCmd: Alternate status: %lx\n", unit->au_UnitNum, status));
2424
2425     status = ATA_IN(atapi_Status, unit->au_Bus->ab_Port);
2426
2427     DATAPI(bug("[ATA%02ld] atapi_EndCmd: Command complete. Status: %lx\n",
2428         unit->au_UnitNum, status));
2429
2430     if (!(status & ATAPIF_CHECK))
2431     {
2432         return 0;
2433     }
2434     else
2435     {
2436        status = ATA_IN(atapi_Error, unit->au_Bus->ab_Port);
2437        DATAPI(bug("[ATA%02ld] atapi_EndCmd: Error code 0x%lx\n", unit->au_UnitNum, status >> 4));
2438        return ErrorMap[status >> 4];
2439     }
2440 }
2441
2442 /*
2443  * vim: ts=4 et sw=4 fdm=marker fmr={,}
2444  */