arch/arm-raspi/kernel/kernel_startup.c

   1 /*
   2     Copyright � 2013-2015, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #define DEBUG 0
   7
   8 #include <aros/kernel.h>
   9 #include <aros/symbolsets.h>
  10
  11 #include <aros/arm/cpucontext.h>
  12
  13 #include <exec/memory.h>
  14 #include <exec/tasks.h>
  15 #include <exec/alerts.h>
  16 #include <exec/execbase.h>
  17 #include <asm/io.h>
  18 #include <proto/kernel.h>
  19 #include <proto/exec.h>
  20 #include <strings.h>
  21
  22 #include "exec_intern.h"
  23 #include "etask.h"
  24
  25 #include "kernel_intern.h"
  26 #include "kernel_debug.h"
  27 #include "kernel_fb.h"
  28 #include "kernel_romtags.h"
  29
  30 extern void krnCreateMemHeader(CONST_STRPTR name, BYTE pri, APTR start, IPTR size, ULONG flags);
  31
  32 void __attribute__((used)) kernel_cstart(struct TagItem *msg);
  33
  34 uint32_t stack[STACK_SIZE] __attribute__((used,aligned(16)));
  35 static uint32_t stack_super[STACK_SIZE] __attribute__((used,aligned(16)));
  36 static uint32_t stack_abort[STACK_SIZE] __attribute__((used,aligned(16)));
  37 static uint32_t stack_irq[STACK_SIZE] __attribute__((used,aligned(16)));
  38
  39 asm (
  40     ".section .aros.init,\"ax\"\n\t"
  41     ".globl start\n\t"
  42     ".type start,%function\n"
  43     "start:\n"
  44     "           push {r0}                    \n"
  45     "           bl      __clear_bss          \n"
  46     "           pop {r0}                     \n"
  47     "           cps     #0x1f                \n" /* system mode */
  48     "           ldr     sp, stack_end        \n"
  49     "           cps     #0x17                \n" /* abort mode */
  50     "           ldr     sp, stack_abort_end  \n"
  51     "           cps     #0x12                \n" /* IRQ mode */
  52     "           ldr     sp, stack_irq_end    \n"
  53     "           cps     #0x13                \n" /* SVC (supervisor) mode */
  54     "           ldr     sp, stack_super_end  \n"
  55     "           b       kernel_cstart        \n"
  56
  57     ".string \"Native/CORE v3 (" __DATE__ ")\"" "\n\t\n\t"
  58 );
  59
  60 static uint32_t * const stack_end __attribute__((used, section(".aros.init"))) = &stack[STACK_SIZE - sizeof(IPTR)];
  61 static uint32_t * const stack_super_end __attribute__((used, section(".aros.init"))) = &stack_super[STACK_SIZE - sizeof(IPTR)];
  62 static uint32_t * const stack_abort_end __attribute__((used, section(".aros.init"))) = &stack_abort[STACK_SIZE - sizeof(IPTR)];
  63 static uint32_t * const stack_irq_end __attribute__((used, section(".aros.init"))) = &stack_irq[STACK_SIZE - sizeof(IPTR)];
  64
  65 __attribute__((section(".data"))) struct ExecBase *SysBase = NULL;
  66
  67 extern struct TagItem *BootMsg;
  68
  69 static void __attribute__((used)) __clear_bss(struct TagItem *msg)
  70 {
  71     struct KernelBSS *bss = (struct KernelBSS *)krnGetTagData(KRN_KernelBss, 0, msg);
  72     register unsigned int dest;
  73     unsigned int length;
  74
  75     if (bss)
  76     {
  77         while (bss->addr && bss->len)
  78         {
  79             dest = bss->addr;
  80             length = bss->len;
  81
  82             // If the start address is unaligned, fill in the first 1-3 bytes until it is
  83             while((dest & 3) && length)
  84             {
  85                 *((unsigned char *)dest) = 0;
  86                 dest++;
  87                 length--;
  88             }
  89
  90             // Fill in the remaining 32-bit word-aligned memory locations
  91             while(length & 0xfffffffc)
  92             {
  93                 *((unsigned int *)dest) = 0;
  94                 dest += 4;
  95                 length -= 4;
  96             }
  97
  98             // Deal with the remaining 1-3 bytes, if any
  99             while(length)
 100             {
 101                 dest++;
 102                 length--;
 103                 *((unsigned char *)dest) = 0;
 104             }
 105             bss++;
 106         }
 107     }
 108 }
 109
 110 uint32_t __arm_periiobase = 0;
 111
 112 void __attribute__((used)) kernel_cstart(struct TagItem *msg)
 113 {
 114     UWORD *ranges[3];
 115     struct MinList memList;
 116     struct MemHeader *mh;
 117     struct MemChunk *mc;
 118     long unsigned int memlower = 0, memupper = 0, protlower = 0, protupper = 0;
 119     unsigned int delay;
 120     BootMsg = msg;
 121     register unsigned int fpuflags;
 122     uint32_t tmp;
 123
 124     /* Guess the cpu type and adjust __arm_periiobase accordingly */
 125     asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r" (tmp));
 126     if ((tmp & 0xfff0) == 0xc070) /* armv7, also RaspberryPi 2 */
 127     {
 128         __arm_periiobase = BCM2836_PERIPHYSBASE;
 129
 130         /* Power LED back on */
 131         *(volatile unsigned int *)GPSET1 = (1 << (35-32)); // Power LED ON
 132     }
 133     else
 134     {
 135         __arm_periiobase = BCM2835_PERIPHYSBASE;
 136         /* Need to detect the plus board here in order to control LEDs properly */
 137
 138         *(volatile unsigned int *)GPCLR0 = (1 << 16); // Activity LED ON
 139     }
 140
 141     /* NB: the bootstrap has conveniently setup the framebuffer
 142             and initialised the serial port and led for us */
 143
 144
 145     core_SetupMMU(msg);
 146
 147     for (delay = 0; delay < 100000; delay++) asm volatile ("mov r0, r0\n");
 148
 149     *(volatile unsigned int *)GPSET0 = (1 << 16); // LED OFF
 150
 151     /* Enable Vector Floating Point Calculations */
 152     asm volatile("mrc p15,0,%[fpuflags],c1,c0,2\n" : [fpuflags] "=r" (fpuflags));   // Read Access Control Register
 153     fpuflags |= (VFPSingle | VFPDouble);                                            // Enable Single & Double Precision
 154     asm volatile("mcr p15,0,%[fpuflags],c1,c0,2\n" : : [fpuflags] "r" (fpuflags)); // Set Access Control Register
 155     asm volatile(
 156         "       mov %[fpuflags],%[vfpenable]    \n"                                 // Enable VFP
 157         "       fmxr fpexc,%[fpuflags]          \n"
 158          : [fpuflags] "=r" (fpuflags) : [vfpenable] "I" (VFPEnable));
 159
 160     for (delay = 0; delay < 100000; delay++) asm volatile ("mov r0, r0\n");
 161
 162     *(volatile unsigned int *)GPCLR0 = (1 << 16); // LED ON
 163
 164     while(msg->ti_Tag != TAG_DONE)
 165     {
 166         switch (msg->ti_Tag)
 167         {
 168         case KRN_FuncPutC:
 169             _KrnPutC = msg->ti_Data;
 170             _KrnPutC(0xFF); // Clear the display
 171             break;
 172         case KRN_MEMLower:
 173             memlower = msg->ti_Data;
 174             break;
 175         case KRN_MEMUpper:
 176             memupper = msg->ti_Data;
 177             break;
 178         case KRN_ProtAreaStart:
 179             protlower = msg->ti_Data;
 180             break;
 181         case KRN_ProtAreaEnd:
 182             protupper = msg->ti_Data;
 183             break;
 184         case KRN_KernelBase:
 185             /*
 186              * KRN_KernelBase is actually a border between read-only
 187              * (code) and read-write (data) sections of the kickstart.
 188              * read-write section goes to lower addresses from this one,
 189              * so we align it upwards in order not to make part of RW data
 190              * read-only.
 191              */
 192 //            addr = AROS_ROUNDUP2(msg->ti_Data, PAGE_SIZE);
 193             break;
 194         }
 195         msg++;
 196     }
 197     msg = BootMsg;
 198
 199     D(bug("[KRN] AROS Raspberry Pi Kernel built on %s\n", __DATE__));
 200
 201     D(bug("[KRN] Entered kernel_cstart @ 0x%p, BootMsg @ %p\n", kernel_cstart, BootMsg));
 202
 203     D(
 204         if (_KrnPutC)
 205         {
 206             bug("[KRN] Using boostrap PutC implementation @ %p\n", _KrnPutC);
 207         }
 208     )
 209
 210     core_SetupIntr();
 211
 212     *(volatile unsigned int *)GPSET0 = 1<<16; // LED OFF
 213     for (delay = 0; delay < 1500; delay++) asm volatile("mov r0, r0\n");
 214     *(volatile unsigned int *)GPCLR0 = 1<<16; // LED ON
 215
 216     NEWLIST(&memList);
 217
 218     mh = (struct MemHeader *)memlower;
 219     krnCreateMemHeader("System Memory", 0, mh, protlower - (long unsigned int)mh, MEMF_FAST | MEMF_PUBLIC | MEMF_KICK | MEMF_LOCAL);
 220
 221     mc = (struct MemChunk *)((protupper + MEMCHUNK_TOTAL-1) & ~(MEMCHUNK_TOTAL-1));
 222     mc->mc_Bytes = memupper - (long unsigned int)mc;
 223     mc->mc_Next = NULL;
 224
 225     if (mh->mh_First->mc_Next == NULL)
 226     {
 227         mh->mh_First->mc_Next = mc;
 228         mh->mh_Upper = memupper;
 229         mh->mh_Free += mc->mc_Bytes;
 230     }
 231
 232     ranges[0] = (UWORD *)krnGetTagData(KRN_KernelLowest, 0, msg);
 233     ranges[1] = (UWORD *)krnGetTagData(KRN_KernelHighest, 0, msg);
 234     ranges[2] = (UWORD *)-1;
 235
 236     D(bug("[KRN] Preparing ExecBase (memheader @ 0x%p)\n", mh));
 237     krnPrepareExecBase(ranges, mh, BootMsg);
 238
 239     /*
 240      * Make kickstart code area read-only.
 241      * We do it only after ExecBase creation because SysBase pointer is put
 242      * into .rodata. This way we prevent it from ocassional modification by buggy software.
 243      */
 244 //    core_ProtKernelArea(addr, kick_highest - addr, 1, 0, 1);
 245
 246     D(bug("[KRN] InitCode(RTF_SINGLETASK) ... \n"));
 247     InitCode(RTF_SINGLETASK, 0);
 248
 249     D(bug("[KRN] InitCode(RTF_COLDSTART) ...\n"));
 250
 251     asm("cps %[mode_user]\n" : : [mode_user] "I" (CPUMODE_USER)); /* switch to user mode */
 252
 253     InitCode(RTF_COLDSTART, 0);
 254
 255     /* The above should not return */
 256     krnPanic(KernelBase, "System Boot Failed!");
 257 }