arch/arm-raspi/processor/processor_init.c

   1 /*
   2     Copyright © 2013, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #define DEBUG 1
   7 #include <aros/debug.h>
   8
   9 #include <proto/exec.h>
  10 #include <proto/kernel.h>
  11 #include <aros/symbolsets.h>
  12
  13 #include <resources/processor.h>
  14
  15 #include "processor_intern.h"
  16 #include "processor_arch_intern.h"
  17
  18 LONG Processor_Init(struct ProcessorBase * ProcessorBase)
  19 {
  20     struct ARMProcessorInformation **sysprocs;
  21     unsigned int i;
  22
  23     D(bug("[processor.ARM] :%s()\n", __PRETTY_FUNCTION__));
  24
  25     sysprocs = AllocVec(ProcessorBase->cpucount * sizeof(APTR), MEMF_ANY | MEMF_CLEAR);
  26     if (sysprocs == NULL)
  27         return FALSE;
  28
  29     for (i = 0; i < ProcessorBase->cpucount; i++)
  30     {
  31         sysprocs[i] = AllocMem(sizeof(struct ARMProcessorInformation), MEMF_CLEAR);
  32         if (!sysprocs[i])
  33             return FALSE;
  34     }
  35
  36     ProcessorBase->Private1 = sysprocs;
  37
  38     /* Boot CPU is number 0. Fill in its data. */
  39     ReadProcessorInformation(sysprocs[0]);
  40
  41     if (sysprocs[0]->Family >= CPUFAMILY_ARM_3)
  42     {
  43         int armvers = 3;
  44
  45         if ((sysprocs[0]->Family & 0xF) == 0)
  46             armvers = 7;
  47         else if ((sysprocs[0]->Family & 0x7) == 0x7)
  48             armvers = 6;
  49         else if ((sysprocs[0]->Family & 0x7) > 2)
  50             armvers = 5;
  51         else if ((sysprocs[0]->Family & 0x7) > 1)
  52             armvers = 4;
  53
  54         bug("[processor.ARM] %s ARMv%d Processor Core\n", sysprocs[0]->VendorID, armvers);
  55     }
  56     else
  57     {
  58         bug("[processor.ARM] %s ARM Processor core\n", sysprocs[0]->VendorID);
  59     }
  60     bug("[processor.ARM] Cache Info:\n");
  61     bug("[processor.ARM]   L1 Data   : %dKb\n", sysprocs[0]->L1DataCacheSize);
  62     bug("[processor.ARM]   L1 Instr. : %dKb\n", sysprocs[0]->L1InstructionCacheSize);
  63
  64     return TRUE;
  65 }
  66
  67 ADD2INITLIB(Processor_Init, 1);