silence debug unless it has been requested
[AROS.git] / arch / .unmaintained / dummy / cacheclearu.c
blob97cf8e252a5a885b32725f1c49310581a004b404
1 |*****************************************************************************
3 | NAME
5 | __AROS_LH0(void, CacheClearU,
7 | LOCATION
8 | struct ExecBase *, SysBase, 106, Exec)
10 | FUNCTION
11 | Flushes the contents of all CPU chaches in a simple way.
13 | INPUTS
15 | RESULT
17 | NOTES
19 | EXAMPLE
21 | BUGS
23 | SEE ALSO
25 | INTERNALS
27 | HISTORY
29 |******************************************************************************
31 Supervisor = -0x1e
33 | Simple 68000s have no chaches
34 .globl _Exec_CacheClearU
35 _Exec_CacheClearU:
36 rts
38 | Is this the same routine for 20?
39 .globl _Exec_CacheClearU_30
40 _Exec_CacheClearU_30:
41 | Do the real work in supervisor mode
42 | Preserve a5 in a1 (faster than stack space)
43 movel a5,a1
44 leal cacheclearusup,a5
45 jsr a6@(Supervisor)
46 movel a1,a5
47 rts
49 cacheclearusup:
50 | Set CD and CI bit in cacr
51 movec cacr,d0
52 orw #0x0808,d0
53 movec d0,cacr
54 rte