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[AROS.git] / compiler / include / hardware / mmc.h
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1 /*
2 Copyright © 2013, The AROS Development Team. All rights reserved.
3 $Id$
4 */
6 #ifndef _MMC_H
7 #define _MMC_H
9 #define MMC_STATUS_MASK ~(0x0206BF7F)
10 #define MMC_STATUS_APP_CMD (1 << 5)
11 #define MMC_STATUS_SWITCH_ERR (1 << 7)
12 #define MMC_STATUS_RDY_FOR_DATA (1 << 8)
13 #define MMC_STATUS_STATE_MASK (0xF << 9)
14 #define MMC_STATUS_STATE_IDLE (0 << 9)
15 #define MMC_STATUS_STATE_READY (1 << 9)
16 #define MMC_STATUS_STATE_IDENT (2 << 9)
17 #define MMC_STATUS_STATE_STBY (3 << 9)
18 #define MMC_STATUS_STATE_TRAN (4 << 9)
19 #define MMC_STATUS_STATE_DATA (5 << 9)
20 #define MMC_STATUS_STATE_RCV (6 << 9)
21 #define MMC_STATUS_STATE_PRG (7 << 9)
22 #define MMC_STATUS_STATE_DIS (8 << 9)
23 #define MMC_STATUS_ERASE_RESET (1 << 13)
24 #define MMC_STATUS_WP_ERASE_SKIP (1 << 15)
25 #define MMC_STATUS_CIDCSD_OVERWRITE (1 << 16)
26 #define MMC_STATUS_OVERRUN (1 << 17)
27 #define MMC_STATUS_UNDERRUN (1 << 18)
28 #define MMC_STATUS_ERROR (1 << 19)
29 #define MMC_STATUS_CC_ERROR (1 << 20)
30 #define MMC_STATUS_CARD_ECC_FAILED (1 << 21)
31 #define MMC_STATUS_ILLEGAL_COMMAND (1 << 22)
32 #define MMC_STATUS_COM_CRC_ERROR (1 << 23)
33 #define MMC_STATUS_UN_LOCK_FAILED (1 << 24)
34 #define MMC_STATUS_CARD_IS_LOCKED (1 << 25)
35 #define MMC_STATUS_WP_VIOLATION (1 << 26)
36 #define MMC_STATUS_ERASE_PARAM (1 << 27)
37 #define MMC_STATUS_ERASE_SEQ_ERROR (1 << 28)
38 #define MMC_STATUS_BLOCK_LEN_ERROR (1 << 29)
39 #define MMC_STATUS_ADDRESS_MISALIGN (1 << 30)
40 #define MMC_STATUS_ADDR_OUT_OR_RANGE (1 << 31)
42 /* MMC Command Responses */
44 #define MMC_RSP_PRESENT (1 << 0)
45 #define MMC_RSP_136 (1 << 1)
46 #define MMC_RSP_CRC (1 << 2)
47 #define MMC_RSP_BUSY (1 << 3)
48 #define MMC_RSP_OPCODE (1 << 4)
50 #define MMC_RSP_NONE (0)
51 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
52 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
53 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_136)
54 #define MMC_RSP_R3 (MMC_RSP_PRESENT)
55 #define MMC_RSP_R4 (MMC_RSP_PRESENT)
56 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
57 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
58 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
60 /* MMC Data Command Attributes */
62 #define MMC_DATA_WRITE (1 << 8)
63 #define MMC_DATA_READ (1 << 9)
64 #define MMC_DATA_STREAM (1 << 10)
66 /* MMC Commands */
68 #define MMC_CMD_GO_IDLE_STATE 0
69 #define MMC_CMD_SEND_OP_COND 1
70 #define MMC_CMD_ALL_SEND_CID 2
71 #define MMC_CMD_SET_RELATIVE_ADDR 3
72 #define MMC_CMD_SET_DSR 4
73 #define MMC_CMD_SWITCH 6
74 #define MMC_CMD_SELECT_CARD 7
75 #define MMC_CMD_SEND_EXT_CSD 8
76 #define MMC_CMD_SEND_CSD 9
77 #define MMC_CMD_SEND_CID 10
78 #define MMC_CMD_STOP_TRANSMISSION 12
79 #define MMC_CMD_SEND_STATUS 13
80 #define MMC_CMD_SET_BLOCKLEN 16
81 #define MMC_CMD_READ_SINGLE_BLOCK 17
82 #define MMC_CMD_READ_MULTIPLE_BLOCK 18
83 #define MMC_CMD_WRITE_SINGLE_BLOCK 24
84 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
85 #define MMC_CMD_ERASE_GROUP_START 35
86 #define MMC_CMD_ERASE_GROUP_END 36
87 #define MMC_CMD_ERASE 38
88 #define MMC_CMD_APP_CMD 55
89 #define MMC_CMD_SPI_READ_OCR 58
90 #define MMC_CMD_SPI_CRC_ON_OFF 59
92 /* MMC Operating Voltages */
94 #define MMC_VDD_165_195 0x00000080
95 #define MMC_VDD_200_210 0x00000100
96 #define MMC_VDD_210_220 0x00000200
97 #define MMC_VDD_220_230 0x00000400
98 #define MMC_VDD_230_240 0x00000800
99 #define MMC_VDD_240_250 0x00001000
100 #define MMC_VDD_250_260 0x00002000
101 #define MMC_VDD_260_270 0x00004000
102 #define MMC_VDD_270_280 0x00008000
103 #define MMC_VDD_280_290 0x00010000
104 #define MMC_VDD_290_300 0x00020000
105 #define MMC_VDD_300_310 0x00040000
106 #define MMC_VDD_310_320 0x00080000
107 #define MMC_VDD_320_330 0x00100000
108 #define MMC_VDD_330_340 0x00200000
109 #define MMC_VDD_340_350 0x00400000
110 #define MMC_VDD_350_360 0x00800000
112 /* Ext_CSD */
113 #define EXT_CSD_HS_TIMING 185
114 #define EXT_CSD_CMD_SET_NORMAL (1<<0)
116 #define MMC_HS_TIMING 0x00000100
117 #define MMC_HS_52MHZ 0x2
119 /* Switch command operations */
120 #define MMC_SWITCH_CHNG_CMDSET 0x00
121 #define MMC_SWITCH_SET_MASKBITS 0x01
122 #define MMC_SWITCH_CLEAR_MASKBITS 0x02
123 #define MMC_SWITCH_WRITE_BYTE 0x03
125 #endif /* _MMC_H */