arch/all-pc/hidds/pcipc/pciconf2.c

   1 /*
   2     Copyright © 2004-2016, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: PCI configuration mechanism 2 access functions
   6     Lang: English
   7 */
   8
   9 #include <aros/debug.h>
  10 #include <asm/io.h>
  11 #include <proto/exec.h>
  12
  13 #include "pci.h"
  14
  15 #ifdef LEGACY_SUPPORT
  16
  17 #define CFG2ADD(dev,reg)    \
  18     (0xc000 | ((dev)<<8) | ((reg)&~3))
  19
  20 static ULONG ReadConfig2Long(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg)
  21 {
  22     ULONG temp;
  23
  24     if (dev < 16)
  25     {
  26         Disable();
  27
  28         outb(0xf0|(sub<<1),PCI_AddressPort);
  29         outb(bus,PCI_ForwardPort);
  30         temp=inl(CFG2ADD(dev, reg));
  31         outb(0,PCI_AddressPort);
  32
  33         Enable();
  34         return temp;
  35     }
  36     else
  37         return 0xffffffff;
  38 }
  39
  40 static void WriteConfig2Long(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, ULONG val)
  41 {
  42     if (dev < 16)
  43     {
  44         Disable();
  45         outb(0xf0|(sub<<1),PCI_CSEPort);
  46         outb(bus,PCI_ForwardPort);
  47         outl(val,CFG2ADD(dev, reg));
  48         outb(0,PCI_AddressPort);
  49         Enable();
  50     }
  51 }
  52
  53 static inline BOOL SanityCheck(struct pcipc_staticdata *psd)
  54 {
  55     UWORD temp;
  56
  57     /* Check if the bus 0 is not empty */
  58     temp = ReadConfigWord(psd, 0, 0, 0, PCICS_PRODUCT);
  59     if ((temp != 0x0000) && (temp != 0xFFFF))
  60         return TRUE;
  61
  62     D(bug("[PCI.PC] Sanity check failed\n"));
  63     return FALSE;
  64 }
  65
  66 static BOOL PCIPC_ProbeMech1Conf(struct pcipc_staticdata *psd)
  67 {
  68     ULONG temp = inl(PCI_AddressPort);
  69     ULONG val;
  70
  71     outl(0x80000000, PCI_AddressPort);
  72     val = inl(PCI_AddressPort);
  73     outl(temp, PCI_AddressPort);
  74
  75     if (val == 0x80000000)
  76     {
  77         D(bug("[PCI.PC] Configuration mechanism 1 detected\n"));
  78
  79         if (SanityCheck(psd))
  80         {
  81             /* Successfully detected exit */
  82             return TRUE;
  83         }
  84     }
  85
  86     return FALSE;
  87 }
  88
  89 void PCIPC_ProbeConfMech(struct pcipc_staticdata *psd)
  90 {
  91     /*
  92      * All newer boards support atleast mechanism 1.
  93      * We probe for it first, because on some machines (e.g. MacMini), PCI_MechSelect is
  94      * used by the chipset as a reset register (and perhaps some other proprietary control).
  95      * Writing 0x01 to it makes the machine's cold reboot mechanism stop working.
  96      */
  97     if (PCIPC_ProbeMech1Conf(psd))
  98         return;
  99
 100     /*
 101      * There's no Mechanism 1.
 102      * Perhaps it's Intel Neptune or alike board. We can try to switch it to Mech1.
 103      */
 104     outb(0x01, PCI_MechSelect);
 105     if (PCIPC_ProbeMech1Conf(psd))
 106         return;
 107
 108     /* Completely no support. Try mechanism 2. */
 109     outb(0x00, PCI_MechSelect);
 110     outb(0x00, PCI_CSEPort);
 111     outb(0x00, PCI_ForwardPort);
 112
 113     if ((inb(PCI_CSEPort) == 0x00) && (inb(PCI_ForwardPort) == 0x00))
 114     {
 115         D(bug("[PCI.PC] configuration mechanism 2 detected\n"));
 116
 117         psd->ReadConfigLong  = ReadConfig2Long;
 118         psd->WriteConfigLong = WriteConfig2Long;
 119
 120         if (SanityCheck(psd))
 121         {
 122             /* Confirmed */
 123             return;
 124         }
 125     }
 126
 127     /*
 128      * Newer systems may have empty bus 0. In this case SanityCheck() will fail. We
 129      * assume configuration type 1 for such systems.
 130      * Probably SanityCheck() should be revised or removed at all.
 131      */
 132     D(bug("[PCI.PC] Failing back to configuration mechanism 1\n"));
 133
 134     psd->ReadConfigLong  = ReadConfig1Long;
 135     psd->WriteConfigLong = WriteConfig1Long;
 136 }
 137
 138 #endif