arch/arm-raspi/kernel/platform_init.c

   1 /*
   2     Copyright © 2013-2015, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #define DEBUG 0
   7
   8 #include <aros/kernel.h>
   9 #include <aros/symbolsets.h>
  10 #include <exec/memory.h>
  11 #include <exec/tasks.h>
  12 #include <exec/alerts.h>
  13 #include <exec/execbase.h>
  14 #include <asm/io.h>
  15 #include <proto/kernel.h>
  16 #include <proto/exec.h>
  17 #include <strings.h>
  18
  19 #include "etask.h"
  20
  21 #include "kernel_intern.h"
  22 #include "kernel_arch.h"
  23 #include "kernel_romtags.h"
  24
  25 void *(*__AllocMem)();
  26
  27 #define ExecAllocMem(bytesize, requirements)        \
  28 AROS_CALL2(void *, __AllocMem,                      \
  29                 AROS_LCA(ULONG, byteSize,     D0),                      \
  30                 AROS_LCA(ULONG, requirements, D1),                      \
  31                 struct ExecBase *, SysBase)
  32
  33 AROS_LH2(APTR, AllocMem,
  34         AROS_LHA(ULONG, byteSize,     D0),
  35         AROS_LHA(ULONG, requirements, D1),
  36         struct ExecBase *, SysBase, 33, Kernel)
  37 {
  38     AROS_LIBFUNC_INIT
  39
  40     if (requirements & MEMF_CHIP)
  41     {
  42         DALLOCMEM(bug("[Kernel] AllocMem: Ignoring MEMF_CHIP flag\n"));
  43         requirements &= ~MEMF_CHIP;
  44     }
  45     return ExecAllocMem(bytesize, requirements);
  46
  47     AROS_LIBFUNC_EXIT
  48 }
  49
  50 static int PlatformPostInit(struct KernelBase *KernelBase)
  51 {
  52     UBYTE *ptr;
  53     D(bug("[Kernel] PlatformPostInit()\n"));
  54
  55 #if (1)
  56     // TODO:
  57     // How to identify broadcom IP's?
  58     // Expose this as a seprate subsystem (like PCI?)
  59     D(bug("[Kernel] Integrated Peripherals -:\n"));
  60     for (ptr = ARM_PERIIOBASE; ptr < (ARM_PERIIOBASE + ARM_PERIIOSIZE); ptr += ARM_PRIMECELLPERISIZE)
  61     {
  62         unsigned int perihreg = (*(volatile unsigned int *)(ptr + 0xFF0) & 0xFF) | (*(volatile unsigned int *)(ptr + 0xFF4) & 0xFF) << 8 | (*(volatile unsigned int *)(ptr + 0xFF8) & 0xFF) << 16 | (*(volatile unsigned int *)(ptr + 0xFFC) & 0xFF) << 24;
  63         if (perihreg == ARM_PRIMECELLID)
  64         {
  65             perihreg = (*(volatile unsigned int *)(ptr + 0xFE0) & 0xFF) | (*(volatile unsigned int *)(ptr + 0xFE4) & 0xFF) << 8 | (*(volatile unsigned int *)(ptr + 0xFE8) & 0xFF) << 16 | (*(volatile unsigned int *)(ptr + 0xFEC) & 0xFF) << 24;
  66             unsigned int manu = (perihreg & (0x7F << 12)) >> 12;
  67             unsigned int prod = (perihreg & 0xFFF);
  68             unsigned int rev = (perihreg & (0xF << 20)) >> 20;
  69             unsigned int config = (perihreg & (0x7F << 24)) >> 24;
  70             D(bug("[Kernel]           0x%p: manu %x, prod %x, rev %d, config %d\n", ptr, manu, prod, rev, config));
  71         }
  72 /*        else
  73         {
  74             if (perihreg)
  75             {
  76                 D(bug("[Kernel] PlatformPostInit:           0x%p: PrimeCellID != %08x\n", ptr, perihreg));
  77             }
  78         }*/
  79     }
  80 #endif
  81
  82     D(bug("[Kernel] PlatformPostInit: Patching in our AllocMem to ignore MEMF_CHIP..\n"));
  83
  84     __AllocMem = SetFunction(SysBase, -33*LIB_VECTSIZE, AROS_SLIB_ENTRY(AllocMem, Kernel, 33));
  85
  86     D(bug("[Kernel] PlatformPostInit: Registering Heartbeat timer..\n"));
  87
  88     KrnAddSysTimerHandler(KernelBase);
  89
  90     D(bug("[Kernel] PlatformPostInit: Done..\n"));
  91
  92     return TRUE;
  93 }
  94
  95 ADD2INITLIB(PlatformPostInit, 0)
  96
  97 struct KernelBase *getKernelBase()
  98 {
  99     return (struct KernelBase *)KernelBase;
 100 }