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[AROS.git] / arch / arm-raspi / include / hardware / usb2otg.h
blob766f7eec61d83e2a87a4b70ebdcf7e9f285ea61e
1 /*
2 Copyright © 2013, The AROS Development Team. All rights reserved.
3 $Id$
4 */
6 #ifndef USB2OTG_H
7 #define USB2OTG_H
9 /** Maximum number of Periodic FIFOs */
11 #define PERIFIFO_MAX 15 // Max no. of Periodic FIFO's
12 #define TXFIFO_MAX 15 // Max no. of Tx FIFO's
13 #define EPSCHANS_MAX 16 // Max no. of Endpoints/Host Chan's
15 #define USB2OTG_BASE (ARM_PERIIOBASE + 0x980000)
17 #define USB2OTG_OTGCTRL (USB2OTG_BASE + 0x0000)
18 #define USB2OTG_OTGINTR (USB2OTG_BASE + 0x0004)
19 #define USB2OTG_AHB (USB2OTG_BASE + 0x0008)
20 #define USB2OTG_USB (USB2OTG_BASE + 0x000c)
21 #define USB2OTG_RESET (USB2OTG_BASE + 0x0010)
22 #define USB2OTG_INTR (USB2OTG_BASE + 0x0014)
23 #define USB2OTG_INTRMASK (USB2OTG_BASE + 0x0018)
24 #define USB2OTG_RCVPEEK (USB2OTG_BASE + 0x001c)
25 #define USB2OTG_RCVPOP (USB2OTG_BASE + 0x0020)
26 #define USB2OTG_RCVSIZE (USB2OTG_BASE + 0x0024)
27 #define USB2OTG_NONPERIFIFOSIZE (USB2OTG_BASE + 0x0028)
28 #define USB2OTG_NONPERIFIFOSTATUS (USB2OTG_BASE + 0x002c)
29 #define USB2OTG_I2CCTRL (USB2OTG_BASE + 0x0030)
30 #define USB2OTG_PHYVENDCTRL (USB2OTG_BASE + 0x0034)
31 #define USB2OTG_GPIO (USB2OTG_BASE + 0x0038)
32 #define USB2OTG_USERID (USB2OTG_BASE + 0x003c)
33 #define USB2OTG_VENDORID (USB2OTG_BASE + 0x0040)
34 #define USB2OTG_HARDWARE (USB2OTG_BASE + 0x0044)
35 #define USB2OTG_HARDWARE2 (USB2OTG_BASE + 0x0048)
36 #define USB2OTG_HARDWARE3 (USB2OTG_BASE + 0x004c)
37 #define USB2OTG_HARDWARE4 (USB2OTG_BASE + 0x0050)
38 #define USB2OTG_LPMCONFIG (USB2OTG_BASE + 0x0054)
39 #define USB2OTG_MDIOCTRL (USB2OTG_BASE + 0x0080)
40 #define USB2OTG_MDIOGEN (USB2OTG_BASE + 0x0084)
41 #define USB2OTG_MDIOREAD USB2OTG_MDIOGEN
42 #define USB2OTG_MDIOWRITE USB2OTG_MDIOGEN
43 #define USB2OTG_MISCCTRL (USB2OTG_BASE + 0x0088)
44 #define USB2OTG_PERIFIFOSIZE (USB2OTG_BASE + 0x0100)
45 #define USB2OTG_PERIFIFOBASE (USB2OTG_BASE + 0x0104)
47 #define USB2OTG_HOSTCFG (USB2OTG_BASE + 0x0400)
48 #define USB2OTG_HOSTFRAMEINTERV (USB2OTG_BASE + 0x0404)
49 #define USB2OTG_HOSTFRAMENO (USB2OTG_BASE + 0x0408)
50 #define USB2OTG_HOSTFIFOSTATUS (USB2OTG_BASE + 0x0410)
51 #define USB2OTG_HOSTINTR (USB2OTG_BASE + 0x0414)
52 #define USB2OTG_HOSTINTRMASK (USB2OTG_BASE + 0x0418)
53 #define USB2OTG_HOSTFRAMELST (USB2OTG_BASE + 0x041c)
54 #define USB2OTG_HOSTPORT (USB2OTG_BASE + 0x0440)
56 #define USB2OTG_HOSTPORT_PRTCONNSTS (1 << 0)
57 #define USB2OTG_HOSTPORT_PRTCONNDET (1 << 1)
58 #define USB2OTG_HOSTPORT_PRTENA (1 << 2)
59 #define USB2OTG_HOSTPORT_PRTENCHNG (1 << 3)
60 #define USB2OTG_HOSTPORT_PRTOVRCURRACT (1 << 4)
61 #define USB2OTG_HOSTPORT_PRTOVRCURRCHNG (1 << 5)
62 #define USB2OTG_HOSTPORT_PRTRES (1 << 6)
63 #define USB2OTG_HOSTPORT_PRTSUSP (1 << 7)
64 #define USB2OTG_HOSTPORT_PRTRST (1 << 8)
65 #define USB2OTG_HOSTPORT_RESERVED9 (1 << 9)
66 #define USB2OTG_HOSTPORT_PRTLNSTS (1 << 10)
67 #define USB2OTG_HOSTPORT_PRTPWR (1 << 12)
68 #define USB2OTG_HOSTPORT_PRTTSTCTL (1 << 13)
69 #define USB2OTG_HOSTPORT_PRTSPD_HIGH (0 << 17)
70 #define USB2OTG_HOSTPORT_PRTSPD_FULL (1 << 17)
71 #define USB2OTG_HOSTPORT_PRTSPD_LOW (2 << 17)
73 #define USB2OTG_HOST_CHANBASE (USB2OTG_BASE + 0x0500)
74 #define USB2OTG_HOSTCHAN_CHARBASE (0x00)
75 #define USB2OTG_HOSTCHAN_SPLITCTRL (0x04)
76 #define USB2OTG_HOSTCHAN_INTR (0x08)
77 #define USB2OTG_HOSTCHAN_INTRMASK (0x0c)
78 #define USB2OTG_HOSTCHAN_TRANSSIZE (0x10)
79 #define USB2OTG_HOSTCHAN_DMAADDR (0x14)
80 #define USB2OTG_HOSTCHAN_DMABUFF (0x1c)
81 #define USB2OTG_HOST_CHANREGSIZE (0x20)
83 #define USB2OTG_HOSTCHAR_MAXPACKETSIZE 0
84 #define USB2OTG_HOSTCHAR_EPNO 11
85 #define USB2OTG_HOSTCHAR_EPDIR 15
86 #define USB2OTG_HOSTCHAR_DISABLE 30
87 #define USB2OTG_HOSTCHAR_ENABLE 31
89 #define USB2OTG_DEVCFG (USB2OTG_BASE + 0x0800)
90 #define USB2OTG_DEVCTRL (USB2OTG_BASE + 0x0804)
91 #define USB2OTG_DEVSTATUS (USB2OTG_BASE + 0x0808)
92 #define USB2OTG_DEVINEPMASK (USB2OTG_BASE + 0x0810)
93 #define USB2OTG_DEVOUTEPMASK (USB2OTG_BASE + 0x0814)
94 #define USB2OTG_DEVINTR (USB2OTG_BASE + 0x0818)
95 #define USB2OTG_DEVINTRMASK (USB2OTG_BASE + 0x081c)
96 #define USB2OTG_DEVINTQRR1 (USB2OTG_BASE + 0x0820)
97 #define USB2OTG_DEVINTQRR2 (USB2OTG_BASE + 0x0824)
98 #define USB2OTG_DEVVBUSDIS (USB2OTG_BASE + 0x0828)
99 #define USB2OTG_DEVVBUSPULSE (USB2OTG_BASE + 0x082c)
100 #define USB2OTG_DEVINTQ_THRESHCTRL (USB2OTG_BASE + 0x0830)
101 #define USB2OTG_DEVINTQ_FIFOEMASK (USB2OTG_BASE + 0x0834)
102 #define USB2OTG_DEVEACHINT (USB2OTG_BASE + 0x0838)
103 #define USB2OTG_DEVEACHINTMSK (USB2OTG_BASE + 0x083c)
106 #define USB2OTG_DEV_INEP_BASE (USB2OTG_BASE + 0x0900)
107 #define USB2OTG_DEV_INEP_DIEPCTL (0x00)
108 #define USB2OTG_DEV_INEP_DIEPINT (0x08)
109 #define USB2OTG_DEV_INEP_DIEPTSIZ (0x10)
110 #define USB2OTG_DEV_INEP_DIEPDMA (0x14)
111 #define USB2OTG_DEV_INEP_DTXFSTS (0x18)
112 #define USB2OTG_DEV_INEP_DIEPDMAB (0x1c)
114 #define USB2OTG_DEV_OUTEP_BASE (USB2OTG_BASE + 0x0B00)
115 #define USB2OTG_DEV_OUTEP_DOEPCTL (0x00)
116 #define USB2OTG_DEV_OUTEP_DOEPFN (0x04)
117 #define USB2OTG_DEV_OUTEP_DOEPINT (0x08)
118 #define USB2OTG_DEV_OUTEP_DOEPTSIZ (0x10)
119 #define USB2OTG_DEV_OUTEP_DOEPDMA (0x14)
120 #define USB2OTG_DEV_OUTEP_DOEPDMAB (0x1c)
122 #define USB2OTG_DEV_EPSIZE (0x20)
124 #define USB2OTG_POWER (USB2OTG_BASE + 0x0e00)
126 #define USB2OTG_FIFOBASE (USB2OTG_BASE + 0x1000)
127 #define USB2OTG_FIFOSIZE 0x1000
129 /* Bits for USB2OTG_OTGCTRL */
130 #define USB2OTG_OTGCTRL_SESREQSCS (1 << 0)
131 #define USB2OTG_OTGCTRL_SESREQ (1 << 1)
132 #define USB2OTG_OTGCTRL_VBVALIDOVEN (1 << 2)
133 #define USB2OTG_OTGCTRL_VBVALIDOVVAL (1 << 3)
134 #define USB2OTG_OTGCTRL_AVALIDOVEN (1 << 4)
135 #define USB2OTG_OTGCTRL_AVALIDOVVAL (1 << 5)
136 #define USB2OTG_OTGCTRL_BVALIDOVEN (1 << 6)
137 #define USB2OTG_OTGCTRL_BVALIDOVVAL (1 << 7)
138 #define USB2OTG_OTGCTRL_HSTNEGSCS (1 << 8)
139 #define USB2OTG_OTGCTRL_HNPREQ (1 << 9)
140 #define USB2OTG_OTGCTRL_HOSTSETHNPENABLE (1 << 10)
141 #define USB2OTG_OTGCTRL_DEVHNPEN (1 << 11)
142 #define USB2OTG_OTGCTRL_CONIDSTS (1 << 16)
143 #define USB2OTG_OTGCTRL_DBNCTIME (1 << 17)
144 #define USB2OTG_OTGCTRL_ASESSIONVALID (1 << 18)
145 #define USB2OTG_OTGCTRL_BSESSIONVALID (1 << 19)
146 #define USB2OTG_OTGCTRL_OTGVERSION (1 << 20)
147 #define USB2OTG_OTGCTRL_MULTVALIDBC (1 << 22)
148 #define USB2OTG_OTGCTRL_CHIRPEN (1 << 27)
150 /* Bits in USB2OTG_OTGINTR */
151 #define USB2OTG_OTGINTR_SESSENDDETECTED (1 << 2)
152 #define USB2OTG_OTGINTR_SESSRQSTSUCCESSSTATUSCHANGE (1 << 8)
153 #define USB2OTG_OTGINTR_HOSTNEGSUCCESSSTATUSCHANGE (1 << 9)
154 #define USB2OTG_OTGINTR_HOSTNEGDETECTED (1 << 17)
155 #define USB2OTG_OTGINTR_ADEVICETIMEOUTCHANGE (1 << 18)
156 #define USB2OTG_OTGINTR_DEBOUNCEDONE (1 << 19)
158 /* Bits in USB2OTG_AHB */
159 #define USB2OTG_AHB_INTENABLE (1 << 0)
160 #define USB2OTG_AHB_AXIBURSTLENGTH (1 << 1)
161 #define USB2OTG_AHB_WAITFORAXIWRITES (1 << 4)
162 #define USB2OTG_AHB_DMAENABLE (1 << 5)
163 #define USB2OTG_AHB_TRANSFEREMPTYLEVEL (1 << 7)
164 #define USB2OTG_AHB_PERIODICTRANSFEREMPTYLEVEL (1 << 8)
165 #define USB2OTG_AHB_REMMEMSUPP (1 << 21)
166 #define USB2OTG_AHB_NOTIALLDMAWRIT (1 << 22)
167 #define USB2OTG_AHB_DMAREMAINDERMODE 23
168 #define USB2OTG_AHB_DMAREMAINDERMODE_INCR (0 << 23)
169 #define USB2OTG_AHB_DMAREMAINDERMODE_SINGLE (1 << 23)
171 /* Bits in USB2OTG_USB */
172 #define USB2OTG_USB_TOUTCAL (1 << 0)
173 #define USB2OTG_USB_PHYINTERFACE (1 << 3)
174 #define USB2OTG_USB_MODESELECT 4
175 #define USB2OTG_USB_MODESELECT_ULPI (0 << USB2OTG_USB_MODESELECT)
176 #define USB2OTG_USB_MODESELECT_UTMI (1 << USB2OTG_USB_MODESELECT)
177 #define USB2OTG_USB_FSINTF (1 << 5)
178 #define USB2OTG_USB_PHYSEL (1 << 6)
179 #define USB2OTG_USB_DDRSEL (1 << 7)
180 #define USB2OTG_USB_SRPCAPABLE (1 << 8)
181 #define USB2OTG_USB_HNPCAPABLE (1 << 9)
182 #define USB2OTG_USB_USBTRDTIM(x) (x << 10)
183 #define USB2OTG_USB_PHY_LPM_CLK_SEL (1 << 15)
184 #define USB2OTG_USB_OTGUTMIFSSEL (1 << 16)
185 #define USB2OTG_USB_ULPIFSLS (1 << 17)
186 #define USB2OTG_USB_ULPI_AUTO_RES (1 << 18)
187 #define USB2OTG_USB_ULPI_CLK_SUS_M (1 << 19)
188 #define USB2OTG_USB_ULPIDRIVEEXTERNALVBUS (1 << 20)
189 #define USB2OTG_USB_ULPI_INT_VBUS_INDICATOR (1 << 21)
190 #define USB2OTG_USB_TSDLINEPULSEENABLE (1 << 22)
191 #define USB2OTG_USB_INDICATOR_COMPLEMENT (1 << 23)
192 #define USB2OTG_USB_INDICATOR_PASS_THROUGH (1 << 24)
193 #define USB2OTG_USB_ULPI_INT_PROT_DIS (1 << 25)
194 #define USB2OTG_USB_IC_USB_CAPABLE (1 << 26)
195 #define USB2OTG_USB_IC_TRAFFIC_PULL_REMOVE (1 << 27)
196 #define USB2OTG_USB_TX_END_DELAY (1 << 28)
197 #define USB2OTG_USB_FORCE_HOST_MODE (1 << 29)
198 #define USB2OTG_USB_FORCE_DEV_MODE (1 << 30)
200 #define USB2OTG_RESET_CORESOFT (1 << 0)
201 #define USB2OTG_RESET_HCLKSOFT (1 << 1)
202 #define USB2OTG_RESET_HOSTFRAMECNTR (1 << 2)
203 #define USB2OTG_RESET_INTOKENQUEUEFLUSH (1 << 3)
204 #define USB2OTG_RESET_RXFIFOFLUSH (1 << 4)
205 #define USB2OTG_RESET_TXFIFOFLUSH (1 << 5)
207 /* Bits in USB2OTG_I2CCTRL */
208 #define USB2OTG_I2CCTRL_READWRITEDATA (1 << 0)
209 #define USB2OTG_I2CCTRL_REGISTERADDRESS (1 << 8)
210 #define USB2OTG_I2CCTRL_ADDRESS (1 << 16)
211 #define USB2OTG_I2CCTRL_I2CENABLE (1 << 23)
212 #define USB2OTG_I2CCTRL_ACKNOWLEDGE (1 << 24)
213 #define USB2OTG_I2CCTRL_I2CSUSPENDCONTROL (1 << 25)
214 #define USB2OTG_I2CCTRL_I2CDEVICEADDRESS (1 << 26)
215 #define USB2OTG_I2CCTRL_READWRITE (1 << 30)
216 #define USB2OTG_I2CCTRL_BSYDNE (1 << 31)
218 /* Bits in USB2OTG_LPMCONFIG */
219 #define USB2OTG_LPMCONFIG_LOWPOWERMODECAPABLE (1 << 0)
220 #define USB2OTG_LPMCONFIG_APPLICATIONRESPONSE (1 << 1)
221 #define USB2OTG_LPMCONFIG_HOSTINITIATEDRESUMEDURATION (1 << 2)
222 #define USB2OTG_LPMCONFIG_REMOTEWAKEUPENABLED (1 << 6)
223 #define USB2OTG_LPMCONFIG_UTMISLEEPENABLED (1 << 7)
224 #define USB2OTG_LPMCONFIG_HOSTINITRESDURATIONTHRESHOLD (1 << 8)
225 #define USB2OTG_LPMCONFIG_LOWPOWERMODERESPONSE (1 << 13)
226 #define USB2OTG_LPMCONFIG_PORTSLEEPSTATUS (1 << 15)
227 #define USB2OTG_LPMCONFIG_SLEEPSTATERESUMEOK (1 << 16)
228 #define USB2OTG_LPMCONFIG_LOWPOWERMODECHANNELINDEX (1 << 17)
229 #define USB2OTG_LPMCONFIG_RETRYCOUNT (1 << 21)
230 #define USB2OTG_LPMCONFIG_SENDLOWPOWERMODE (1 << 24)
231 #define USB2OTG_LPMCONFIG_RETRYCOUNTSTATUS (1 << 25)
232 #define USB2OTG_LPMCONFIG_HSICCONNECT (1 << 30)
233 #define USB2OTG_LPMCONFIG_INVERSESELECTHSIC (1 << 31)
235 /* Bits in USB2OTG_MDIOSTRL */
236 #define USB2OTG_MDIOCTRL_READ (1 << 0)
237 #define USB2OTG_MDIOCTRL_CLOCKRATIO (1 << 16)
238 #define USB2OTG_MDIOCTRL_FREERUN (1 << 20)
239 #define USB2OTG_MDIOCTRL_BITHASHENABLE (1 << 21)
240 #define USB2OTG_MDIOCTRL_MDCWRITE (1 << 22)
241 #define USB2OTG_MDIOCTRL_MDOWRITE (1 << 23)
242 #define USB2OTG_MDIOCTRL_BUSY (1 << 31)
244 /* Bits in USB2OTG_MISCCTRL */
245 #define USB2OTG_MISCCTRL_SESSIONEND (1 << 0)
246 #define USB2OTG_MISCCTRL_VBUSVALID (1 << 1)
247 #define USB2OTG_MISCCTRL_BSESSIONVALID (1 << 2)
248 #define USB2OTG_MISCCTRL_ASESSIONVALID (1 << 3)
249 #define USB2OTG_MISCCTRL_DISCHARGEVBUS (1 << 4)
250 #define USB2OTG_MISCCTRL_CHARGEVBUS (1 << 5)
251 #define USB2OTG_MISCCTRL_DRIVEVBUS (1 << 6)
252 #define USB2OTG_MISCCTRL_DISABLEDRIVING (1 << 7)
253 #define USB2OTG_MISCCTRL_VBUSIRQENABLED (1 << 8)
254 #define USB2OTG_MISCCTRL_VBUSIRQ (1 << 9)
255 #define USB2OTG_MISCCTRL_AXIPRIORITYLEVEL (1 << 16)
257 #define USB2OTG_USBOTGMODE (0 << 0)
258 #define USB2OTG_USBHOSTMODE (1 << 0)
259 #define USB2OTG_USBDEVICEMODE (1 << 1)
261 /* Bits in USB2OTG_INTR */
262 #define USB2OTG_INTRCORE_CURRENTMODE (1 << 0)
263 #define USB2OTG_INTRCORE_MODEMISMATCH (1 << 1)
264 #define USB2OTG_INTRCORE_OTG (1 << 2)
265 #define USB2OTG_INTRCORE_DMASTARTOFFRAME (1 << 3)
266 #define USB2OTG_INTRCORE_RECEIVESTATUSLEVEL (1 << 4)
267 #define USB2OTG_INTRCORE_NPTRANSMITFIFOEMPTY (1 << 5)
268 #define USB2OTG_INTRCORE_GINNAKEFF (1 << 6)
269 #define USB2OTG_INTRCORE_GOUTNAKEFF (1 << 7)
270 #define USB2OTG_INTRCORE_ULPICK (1 << 8)
271 #define USB2OTG_INTRCORE_I2C (1 << 9)
272 #define USB2OTG_INTRCORE_EARLYSUSPEND (1 << 10)
273 #define USB2OTG_INTRCORE_USBSUSPEND (1 << 11)
274 #define USB2OTG_INTRCORE_USBRESET (1 << 12)
275 #define USB2OTG_INTRCORE_ENUMERATIONDONE (1 << 13)
276 #define USB2OTG_INTRCORE_ISOCHRONOUSOUTDROP (1 << 14)
277 #define USB2OTG_INTRCORE_EOPFRAME (1 << 15)
278 #define USB2OTG_INTRCORE_RESTOREDONE (1 << 16)
279 #define USB2OTG_INTRCORE_ENDPOINTMISMATCH (1 << 17)
280 #define USB2OTG_INTRCORE_INENDPOINT (1 << 18)
281 #define USB2OTG_INTRCORE_OUTENDPOINT (1 << 19)
282 #define USB2OTG_INTRCORE_INCOMPLETEISOCHRONOUSIN (1 << 20)
283 #define USB2OTG_INTRCORE_INCOMPLETEISOCHRONOUSOUT (1 << 21)
284 #define USB2OTG_INTRCORE_FETSETUP (1 << 22)
285 #define USB2OTG_INTRCORE_RESETDETECT (1 << 23)
286 #define USB2OTG_INTRCORE_PORT (1 << 24)
287 #define USB2OTG_INTRCORE_HOSTCHANNEL (1 << 25)
288 #define USB2OTG_INTRCORE_HPTRANSMITFIFOEMPTY (1 << 26)
289 #define USB2OTG_INTRCORE_LPMTRANSRCVD (1 << 27)
290 #define USB2OTG_INTRCORE_CONNECTIONIDSTATUSCHANGE (1 << 28)
291 #define USB2OTG_INTRCORE_DISCONNECT (1 << 29)
292 #define USB2OTG_INTRCORE_SESSIONREQUEST (1 << 30)
293 #define USB2OTG_INTRCORE_WAKEUP (1 << 31)
295 /* Channel Interrupt bits */
296 #define USB2OTG_INTRCHAN_TRANSFERCOMPLETE (1 << 0)
297 #define USB2OTG_INTRCHAN_HALT (1 << 1)
298 #define USB2OTG_INTRCHAN_AHBERROR (1 << 2)
299 #define USB2OTG_INTRCHAN_STALL (1 << 3)
300 #define USB2OTG_INTRCHAN_NEGATIVEACKNOWLEDGE (1 << 4)
301 #define USB2OTG_INTRCHAN_ACKNOWLEDGE (1 << 5)
302 #define USB2OTG_INTRCHAN_NOTREADY (1 << 6)
303 #define USB2OTG_INTRCHAN_TRANSACTIONERROR (1 << 7)
304 #define USB2OTG_INTRCHAN_BABBLEERROR (1 << 8)
305 #define USB2OTG_INTRCHAN_FRAMEOVERRUN (1 << 9)
306 #define USB2OTG_INTRCHAN_DATATOGGLEERROR (1 << 10)
307 #define USB2OTG_INTRCHAN_BUFFERNOTAVAILABLE (1 << 11)
308 #define USB2OTG_INTRCHAN_EXCESSIVETRANSMISSION (1 << 12)
309 #define USB2OTG_INTRCHAN_FRAMELISTROLLOVER (1 << 13)
311 /* Bits in the power register */
312 #define USB2OTG_POWER_STOPPCLOCK (1 << 0)
313 #define USB2OTG_POWER_GATEHCLOCK (1 << 1)
314 #define USB2OTG_POWER_POWERCLAMP (1 << 2)
315 #define USB2OTG_POWER_POWERDOWNMODULES (1 << 3)
316 #define USB2OTG_POWER_PHYSUSPENDED (1 << 4)
317 #define USB2OTG_POWER_ENABLESLEEPCLOCKGATING (1 << 5)
318 #define USB2OTG_POWER_PHYSLEEPING (1 << 6)
319 #define USB2OTG_POWER_DEEPSLEEP (1 << 7)
321 #endif /* USB2OTG_H */