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Fixed warnings in AHI code (Part 2).
[AROS.git] / workbench / devs / AHI / Drivers / Envy24HT / misc.c
blob19672069d46704dacebd6a3bbf317858e3f9077b
1 /*
2 Copyright © 2005-2013, Davy Wentzler. All rights reserved.
3 $Id$
4 */
5
6 #include <exec/memory.h>
7 #include <proto/expansion.h>
8
9 #include <proto/dos.h>
10 #include "pci_wrapper.h"
11
12 #ifdef __amigaos4__
13 #include "library_card.h"
14 #elif __MORPHOS__
15 #include "library_mos.h"
16 #else
17 #include "library.h"
18 #endif
19 #include "regs.h"
20 #include "interrupt.h"
21 #include "misc.h"
22 #include "ak4114.h"
23 #include "DriverData.h"
24 #include "Revo51.h"
25
26
27 /* Global in Card.c */
28 extern const UWORD InputBits[];
29 extern struct DOSIFace *IDOS;
30 extern struct MMUIFace* IMMU;
31
32 struct Device *TimerBase = NULL;
33 struct timerequest *TimerIO = NULL;
34 struct MsgPort *replymp = NULL;
35 unsigned long Dirs[7] = {0x005FFFFF, 0x005FFFFF, 0x001EFFF7, 0x004000FA, 0x004000FA, 0x007FFF9F, 0x00FFFFFF};
36
37 /* Public functions in main.c */
38 int card_init(struct CardData *card);
39 void card_cleanup(struct CardData *card);
40 int aureon_ac97_init(struct CardData *card, unsigned long base);
41 void AddResetHandler(struct CardData *card);
42
43 #ifdef __MORPHOS__
44 extern struct DriverBase* AHIsubBase;
45 #endif
46
47 static unsigned char inits_ak4358[] = {
48 0x01, 0x02, /* 1: reset + soft mute */
49
50 0x00, 0x87, // I2S + unreset (used to be 0F)
51
52 0x01, 0x01, // unreset + soft mute off
53 0x02, 0x4F, /* 2: DA's power up, normal speed, RSTN#=0 */
54 0x03, 0x01, /* 3: de-emphasis 44.1 */
55
56 0x04, 0xFF, /* 4: LOUT1 volume (PCM) */
57 0x05, 0xFF, /* 5: ROUT1 volume */
58
59 0x06, 0x00, /* 6: LOUT2 volume (analogue in monitor, doesn't work) */
60 0x07, 0x00, /* 7: ROUT2 volume */
61
62 0x08, 0xFF, /* 8: LOUT3 volume (dig out monitor, use it as analogue out) */
63 0x09, 0xFF, /* 9: ROUT3 volume */
64
65 0x0a, 0x00, /* a: DATT speed=0, ignore DZF */
66
67 0x0b, 0xFF, /* b: LOUT4 volume */
68 0x0c, 0xFF, /* c: ROUT4 volume */
69
70 0x0d, 0xFF, // DFZ
71 0x0E, 0x00,
72 0x0F, 0x00,
73 0xff, 0xff
74 };
75
76 void revo_i2s_mclk_changed(struct CardData *card)
77 {
78 /* assert PRST# to converters; MT05 bit 7 */
79 OUTBYTE(card->mtbase + MT_AC97_CMD_STATUS, INBYTE(card->mtbase + MT_AC97_CMD_STATUS) | 0x80);
80 MicroDelay(5);
81 /* deassert PRST# */
82 OUTBYTE(card->mtbase + MT_AC97_CMD_STATUS, INBYTE(card->mtbase + MT_AC97_CMD_STATUS) & ~0x80);
83 }
84
85
86 void ClearMask8(struct CardData *card, unsigned long base, unsigned char reg, unsigned char mask)
87 {
88 UBYTE tmp;
89
90 tmp = INBYTE(base + reg);
91 tmp &= ~mask;
92 OUTBYTE(base + reg, tmp);
93 }
94
95
96 void WriteMask8(struct CardData *card, unsigned long base, unsigned char reg, unsigned char mask)
97 {
98 UBYTE tmp;
99
100 tmp = INBYTE(base + reg);
101 tmp |= mask;
102 OUTBYTE(base + reg, tmp);
103 }
104
105
106 void WritePartialMask(struct CardData *card, unsigned long base, unsigned char reg, unsigned long shift, unsigned long mask, unsigned long val)
107 {
108 ULONG tmp;
109
110 tmp = INLONG(base + reg);
111 tmp &= ~(mask << shift);
112 tmp |= val << shift;
113 OUTLONG(base + reg, tmp);
114 }
115
116
117 void SetGPIOData(struct CardData *card, unsigned long base, unsigned long data)
118 {
119 OUTWORD(base + CCS_GPIO_DATA, data & 0xFFFF);
120 OUTBYTE(base + CCS_GPIO_DATA2, (data & (0xFF0000)) >> 16);
121 INWORD(base + CCS_GPIO_DATA); /* dummy read for pci-posting */
122 }
123
124 void SetGPIOMask(struct CardData *card, unsigned long base, unsigned long data)
125 {
126 OUTWORD(base + CCS_GPIO_MASK, data & 0xFFFF);
127 OUTBYTE(base + CCS_GPIO_MASK2, (data & (0xFF0000)) >> 16);
128 INWORD(base + CCS_GPIO_MASK); /* dummy read for pci-posting */
129 }
130
131
132 void SaveGPIO(struct PCIDevice *dev, struct CardData* card)
133 {
134 card->SavedDir = INLONG(card->iobase + CCS_GPIO_DIR) & 0x7FFFFF;
135 card->SavedMask = INWORD(card->iobase + CCS_GPIO_MASK);
136 }
137
138
139 void RestoreGPIO(struct PCIDevice *dev, struct CardData* card)
140 {
141 OUTLONG(card->iobase + CCS_GPIO_DIR, card->SavedDir);
142 OUTWORD(card->iobase + CCS_GPIO_MASK, card->SavedMask);
143 }
144
145
146 unsigned long GetGPIOData(struct CardData *card, unsigned long base)
147 {
148 unsigned long data;
149
150 data = (unsigned long) INBYTE(base + CCS_GPIO_DATA2);
151 data = (data << 16) | INWORD(base + CCS_GPIO_DATA);
152 return data;
153 }
154
155
156 void SetGPIODir(struct PCIDevice *dev, struct CardData* card, unsigned long data)
157 {
158 OUTLONG(card->iobase + CCS_GPIO_DIR, data);
159 INWORD(card->iobase + CCS_GPIO_DIR);
160 }
161
162
163 unsigned char ReadI2C(struct PCIDevice *dev, struct CardData *card, unsigned char addr)
164 {
165 unsigned char val;
166 int counter = 0;
167
168 MicroDelay(1);
169 OUTBYTE(card->iobase + CCS_I2C_ADDR, addr);
170 OUTBYTE(card->iobase + CCS_I2C_DEV_ADDRESS, 0xA0);
171
172 while ((INBYTE(card->iobase + CCS_I2C_STATUS) & CCS_I2C_BUSY) && counter < 10000)
173 {
174 MicroDelay(1);
175 counter++;
176 }
177
178 if (counter == 10000)
179 {
180 bug("Error reading from I2C\n");
181 }
182
183 val = INBYTE(card->iobase + CCS_I2C_DATA);
184
185 return val;
186 }
187
188
189 void WriteI2C(struct PCIDevice *dev, struct CardData *card, unsigned chip_address, unsigned char reg, unsigned char data)
190 {
191 int counter = 0;
192
193 while ((INBYTE(card->iobase + CCS_I2C_STATUS) & CCS_I2C_BUSY) && counter < 10000)
194 {
195 MicroDelay(1);
196 counter++;
197 }
198
199 if (counter == 10000)
200 {
201 bug("Error reading from I2C (for write)\n");
202 }
203 counter = 0;
204
205 OUTBYTE(card->iobase + CCS_I2C_ADDR, reg);
206 OUTBYTE(card->iobase + CCS_I2C_DATA, data);
207
208 while ((INBYTE(card->iobase + CCS_I2C_STATUS) & CCS_I2C_BUSY) && counter < 10000)
209 {
210 counter++;
211 }
212
213 if (counter == 10000)
214 {
215 bug("Error reading from I2C (for write 2)\n");
216 }
217
218 OUTBYTE(card->iobase + CCS_I2C_DEV_ADDRESS, chip_address | CCS_ADDRESS_WRITE);
219 }
220
221
222 void update_spdif_bits(struct CardData *card, unsigned short val)
223 {
224 unsigned char cbit, disabled;
225
226 cbit = INBYTE(card->iobase + CCS_SPDIF_CONFIG); // get S/PDIF status
227 disabled = cbit & ~CCS_SPDIF_INTEGRATED; // status without enabled bit set
228
229 if (cbit != disabled) // it was enabled
230 OUTBYTE(card->iobase + CCS_SPDIF_CONFIG, disabled); // so, disable it
231
232 OUTWORD(card->mtbase + MT_SPDIF_TRANSMIT, val); // now we can safely write to the SPDIF control reg
233
234 if (cbit != disabled)
235 OUTBYTE(card->iobase + CCS_SPDIF_CONFIG, cbit); // restore
236
237 OUTWORD(card->mtbase + MT_SPDIF_TRANSMIT, val); // twice???
238 }
239
240
241 void update_spdif_rate(struct CardData *card, unsigned short rate)
242 {
243 unsigned short val, nval;
244
245 nval = val = INWORD(card->mtbase + MT_SPDIF_TRANSMIT);
246 nval &= ~(7 << 12);
247 switch (rate) {
248 case 44100: break;
249 case 48000: nval |= 2 << 12; break;
250 case 32000: nval |= 3 << 12; break;
251 }
252 if (val != nval)
253 update_spdif_bits(card, nval);
254 }
255
256
257 static void aureon_spi_write(struct CardData *card, unsigned long base, unsigned int cs, unsigned int data, int bits)
258 {
259 unsigned int tmp;
260 int i;
261
262 tmp = GetGPIOData(card, base);
263
264 if (card->SubType == PHASE28)
265 SetGPIOMask(card, base, ~(AUREON_WM_RW|AUREON_WM_DATA|AUREON_WM_CLK|AUREON_WM_CS));
266 else
267 SetGPIOMask(card, base, ~(AUREON_WM_RW|AUREON_WM_DATA|AUREON_WM_CLK|AUREON_WM_CS | AUREON_CS8415_CS));
268
269 SetGPIOMask(card, base, 0);
270
271 tmp |= AUREON_WM_RW;
272 tmp &= ~cs;
273 SetGPIOData(card, base, tmp); // set CS low
274 MicroDelay(1);
275
276
277 for (i = bits - 1; i >= 0; i--) {
278 tmp &= ~AUREON_WM_CLK;
279 SetGPIOData(card, base, tmp);
280 MicroDelay(1);
281 if (data & (1 << i))
282 tmp |= AUREON_WM_DATA;
283 else
284 tmp &= ~AUREON_WM_DATA;
285 SetGPIOData(card, base, tmp);
286 MicroDelay(1);
287 tmp |= AUREON_WM_CLK;
288 SetGPIOData(card, base, tmp);
289 MicroDelay(1);
290 }
291
292 tmp &= ~AUREON_WM_CLK;
293 tmp |= cs;
294 SetGPIOData(card, base, tmp);
295 MicroDelay(1);
296 tmp |= AUREON_WM_CLK;
297 SetGPIOData(card, base, tmp);
298 MicroDelay(1);
299 }
300
301
302 static void aureon_ac97_write(struct CardData *card, unsigned long base, unsigned short reg, unsigned short val)
303 {
304 unsigned int tmp;
305
306 /* Send address to XILINX chip */
307 tmp = (GetGPIOData(card, base) & ~0xFF) | (reg & 0x7F);
308 SetGPIOData(card, base, tmp);
309 MicroDelay(10);
310 tmp |= AUREON_AC97_ADDR;
311 SetGPIOData(card, base, tmp);
312 MicroDelay(10);
313 tmp &= ~AUREON_AC97_ADDR;
314 SetGPIOData(card, base, tmp);
315 MicroDelay(10);
316
317 /* Send low-order byte to XILINX chip */
318 tmp &= ~AUREON_AC97_DATA_MASK;
319 tmp |= val & AUREON_AC97_DATA_MASK;
320 SetGPIOData(card, base, tmp);
321 MicroDelay(10);
322 tmp |= AUREON_AC97_DATA_LOW;
323 SetGPIOData(card, base, tmp);
324 MicroDelay(10);
325 tmp &= ~AUREON_AC97_DATA_LOW;
326 SetGPIOData(card, base, tmp);
327 MicroDelay(10);
328
329 /* Send high-order byte to XILINX chip */
330 tmp &= ~AUREON_AC97_DATA_MASK;
331 tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
332
333 SetGPIOData(card, base, tmp);
334 MicroDelay(10);
335 tmp |= AUREON_AC97_DATA_HIGH;
336 SetGPIOData(card, base, tmp);
337 MicroDelay(10);
338 tmp &= ~AUREON_AC97_DATA_HIGH;
339 SetGPIOData(card, base, tmp);
340 MicroDelay(10);
341
342 /* Instruct XILINX chip to parse the data to the STAC9744 chip */
343 tmp |= AUREON_AC97_COMMIT;
344 SetGPIOData(card, base, tmp);
345 MicroDelay(10);
346 tmp &= ~AUREON_AC97_COMMIT;
347 SetGPIOData(card, base, tmp);
348 MicroDelay(10);
349 }
350
351
352 int aureon_ac97_init(struct CardData *card, unsigned long base)
353 {
354 int i;
355 static unsigned short ac97_defaults[] = {
356 AC97_RESET, 0x6940,
357 AC97_MASTER_VOL_STEREO, 0x0101, // 0dB atten., no mute, may not exceed 0101!!!
358 AC97_AUXOUT_VOL, 0x8808,
359 AC97_MASTER_VOL_MONO, 0x8000,
360 AC97_PHONE_VOL, 0x8008, // mute
361 AC97_MIC_VOL, 0x8008,
362 AC97_LINEIN_VOL, 0x8808,
363 AC97_CD_VOL, 0x0808,
364 AC97_VIDEO_VOL, 0x8808,
365 AC97_AUX_VOL, 0x8808,
366 AC97_PCMOUT_VOL, 0x8808,
367 //0x1C, 0x8000,
368 //0x26, 0x000F,
369 //0x28, 0x0201,
370 0x2C, 0xAC44,
371 0x32, 0xAC44,
372 //0x7C, 0x8384,
373 //0x7E, 0x7644,
374 (unsigned short)-1
375 };
376 unsigned int tmp;
377
378 /* Cold reset */
379 tmp = (GetGPIOData(card, base) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
380
381 SetGPIOData(card, base, tmp);
382 MicroDelay(3);
383
384 tmp &= ~AUREON_AC97_RESET;
385 SetGPIOData(card, base, tmp);
386 MicroDelay(3);
387
388 tmp |= AUREON_AC97_RESET;
389 SetGPIOData(card, base, tmp);
390 MicroDelay(3);
391
392 for (i=0; ac97_defaults[i] != (unsigned short)-1; i+=2)
393 aureon_ac97_write(card, base, ac97_defaults[i], ac97_defaults[i+1]);
394
395 return 0;
396 }
397
398
399
400
401 void wm_put(struct CardData *card, unsigned long base, unsigned short reg, unsigned short val)
402 {
403 aureon_spi_write(card, base, AUREON_WM_CS, (reg << 9) | (val & 0x1ff), 16);
404 }
405
406
407
408 BOOL SetupTimerDevice()
409 {
410 return TRUE;
411 }
412
413
414
415 void MicroDelay(unsigned int val)
416 {
417 replymp = (struct MsgPort *) CREATEPORT( NULL, 0 );
418 if( !replymp )
419 {
420 DEBUGPRINTF("Could not create the reply port!\n" );
421 return;
422 }
423
424 TimerIO = (struct timerequest *) CREATEIOREQUEST( replymp, sizeof( struct timerequest) );
425
426 if( TimerIO == NULL)
427 {
428 DEBUGPRINTF( "Out of memory.\n" );
429 return;
430 }
431
432 if( OPENDEVICE( "timer.device", UNIT_MICROHZ, (struct IORequest *) TimerIO, 0) != 0 )
433 {
434 DEBUGPRINTF( "Unable to open 'timer.device'.\n" );
435 return;
436 }
437 else
438 {
439
440 TimerBase = (struct Device *) TimerIO->tr_node.io_Device;
441 }
442
443 if (TimerIO)
444 {
445
446 TimerIO->tr_node.io_Command = TR_ADDREQUEST; /* Add a request. */
447 TimerIO->tr_time.tv_secs = 0; /* 0 seconds. */
448 TimerIO->tr_time.tv_micro = val; /* 'val' micro seconds. */
449 DOIO( (struct IORequest *) TimerIO );
450 CLOSEDEVICE( (struct IORequest *) TimerIO );
451 DELETEIOREQUEST( (struct IORequest *) TimerIO);
452 TimerIO = NULL;
453 }
454
455 if( replymp )
456 {
457 DELETEPORT(replymp);
458 }
459 }
460
461
462 void CleanUpTimerDevice()
463 {
464
465 }
466
467 #ifdef __MORPHOS__
468 INTGW( static, void, playbackinterrupt, PlaybackInterrupt );
469 INTGW( static, void, recordinterrupt, RecordInterrupt );
470 INTGW( static, ULONG, cardinterrupt, CardInterrupt );
471 #endif
472
473 /******************************************************************************
474 ** DriverData allocation ******************************************************
475 ******************************************************************************/
476
477 // This code used to be in _AHIsub_AllocAudio(), but since we're now
478 // handling CAMD support too, it needs to be done at driver loading
479 // time.
480
481 struct CardData* AllocDriverData(struct PCIDevice *dev, struct DriverBase* AHIsubBase)
482 {
483 struct CardData* card;
484 UWORD command_word;
485
486 card = ALLOCVEC( sizeof( *card ), MEMF_PUBLIC | MEMF_CLEAR );
487
488 if( card == NULL )
489 {
490 Req( "Unable to allocate driver structure." );
491 return NULL;
492 }
493
494 card->ahisubbase = AHIsubBase;
495
496 card->interrupt.is_Node.ln_Type = IRQTYPE;
497 card->interrupt.is_Node.ln_Pri = 0;
498 card->interrupt.is_Node.ln_Name = (STRPTR) LibName;
499 #ifndef __MORPHOS__
500 card->interrupt.is_Code = (void(*)(void)) CardInterrupt;
501 #else
502 card->interrupt.is_Code = (void(*)(void)) &cardinterrupt;
503 #endif
504 card->interrupt.is_Data = (APTR) card;
505
506 card->playback_interrupt.is_Node.ln_Type = IRQTYPE;
507 card->playback_interrupt.is_Node.ln_Pri = 0;
508 card->playback_interrupt.is_Node.ln_Name = (STRPTR) LibName;
509 #ifndef __MORPHOS__
510 card->playback_interrupt.is_Code = PlaybackInterrupt;
511 #else
512 card->playback_interrupt.is_Code = (void(*)(void)) &playbackinterrupt;
513 #endif
514 card->playback_interrupt.is_Data = (APTR) card;
515
516 card->record_interrupt.is_Node.ln_Type = IRQTYPE;
517 card->record_interrupt.is_Node.ln_Pri = 0;
518 card->record_interrupt.is_Node.ln_Name = (STRPTR) LibName;
519 #ifndef __MORPHOS__
520 card->record_interrupt.is_Code = RecordInterrupt;
521 #else
522 card->record_interrupt.is_Code = (void(*)(void)) &recordinterrupt;
523 #endif
524 card->record_interrupt.is_Data = (APTR) card;
525
526 card->pci_dev = dev;
527
528 command_word = READCONFIGWORD( PCI_COMMAND );
529 command_word |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY; // | PCI_COMMAND_MASTER;
530 WRITECONFIGWORD( PCI_COMMAND, command_word );
531
532
533 card->pci_master_enabled = TRUE;
534
535
536 card->iobase = (unsigned long)ahi_pci_get_base_address(0, dev);
537 card->mtbase = (unsigned long)ahi_pci_get_base_address(1, dev);
538 card->irq = ahi_pci_get_irq(dev);
539 card->chiprev = READCONFIGBYTE( PCI_REVISION_ID);
540 card->model = READCONFIGWORD( PCI_SUBSYSTEM_ID);
541 card->SavedMask = 0;
542
543 /*DEBUGPRINTF("---> chiprev = %u, model = %x, Vendor = %x\n", READCONFIGBYTE( PCI_REVISION_ID), READCONFIGWORD( PCI_SUBSYSTEM_ID),
544 READCONFIGWORD( PCI_SUBSYSTEM_VENDOR_ID));*/
545
546
547
548 if (SetupTimerDevice() == FALSE)
549 {
550 return NULL;
551 }
552
553 /* Initialize chip */
554 if( card_init( card ) < 0 )
555 {
556 DEBUGPRINTF("Unable to initialize Card subsystem.");
557 return NULL;
558 }
559
560
561 //DEBUGPRINTF("INTERRUPT %lu\n", dev->MapInterrupt());
562 ahi_pci_add_intserver(&card->interrupt, dev);
563 card->interrupt_added = TRUE;
564
565 card->card_initialized = TRUE;
566
567 if (card->SubType == REVO51)
568 {
569 card->input = 1; // line in
570 }
571 else
572 {
573 card->input = 0;
574 }
575 card->output = 0;
576 card->monitor_volume = 0;
577 card->input_gain = 0x10000;
578 card->output_volume = 0x10000;
579 card->input_is_24bits = FALSE;
580 card->playback_buffer = NULL;
581 card->current_bytesize = 0;
582
583 //SaveMixerState(card);
584
585 #ifdef __amigaos4__
586 AddResetHandler(card);
587 #endif
588
589 return card;
590 }
591
592
593 /******************************************************************************
594 ** DriverData deallocation ****************************************************
595 ******************************************************************************/
596
597 // And this code used to be in _AHIsub_FreeAudio().
598
599 void
600 FreeDriverData( struct CardData* card,
601 struct DriverBase* AHIsubBase )
602 {
603 if( card != NULL )
604 {
605 if( card->pci_dev != NULL )
606 {
607 if( card->card_initialized )
608 {
609 card_cleanup( card );
610 }
611
612 if( card->pci_master_enabled )
613 {
614 UWORD cmd;
615 struct PCIDevice * dev = card->pci_dev;
616 cmd = READCONFIGWORD( PCI_COMMAND );
617 cmd &= ~( PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER );
618 WRITECONFIGWORD( PCI_COMMAND, cmd );
619 }
620 }
621
622 if( card->interrupt_added )
623 {
624 ahi_pci_rem_intserver(&card->interrupt, card->pci_dev);
625 }
626
627 FREEVEC( card );
628 }
629
630 CleanUpTimerDevice();
631 }
632
633
634 static unsigned short wm_inits[] = {
635
636 0x18, 0x000, /* All power-up */
637
638 0x1b, 0x022, /* ADC Mux (AIN1 = CD-in) */
639 0x1c, 0x00B, /* Output1 = DAC + Aux (= ac'97 mix), output2 = DAC */
640 0x1d, 0x009, /* Output3+4 = DAC */
641
642 0x16, 0x122, /* I2S, normal polarity, 24bit */
643 0x17, 0x022, /* 256fs, slave mode */
644
645 0x00, 0x17F, /* DAC1 analog mute */
646 0x01, 0x17F, /* DAC2 analog mute */
647 0x02, 0x17F, /* DAC3 analog mute */
648 0x03, 0x17F, /* DAC4 analog mute */
649 0x04, 0x7F, /* DAC5 analog mute */
650 0x05, 0x7F, /* DAC6 analog mute */
651 0x06, 0x7F, /* DAC7 analog mute */
652 0x07, 0x7F, /* DAC8 analog mute */
653 0x08, 0x17F, /* master analog mute */
654 0x09, 0x1ff, /* DAC1 digital full */
655 0x0a, 0x1ff, /* DAC2 digital full */
656 0x0b, 0xff, /* DAC3 digital full */
657 0x0c, 0xff, /* DAC4 digital full */
658 0x0d, 0xff, /* DAC5 digital full */
659 0x0e, 0xff, /* DAC6 digital full */
660 0x0f, 0xff, /* DAC7 digital full */
661 0x10, 0xff, /* DAC8 digital full */
662 0x11, 0x1ff, /* master digital full */
663 0x12, 0x000, /* phase normal */
664 0x13, 0x090, /* unmute DAC L/R */
665 0x14, 0x000, /* all unmute (bit 5 is rec enable) */
666 0x15, 0x000, /* no deemphasis, no ZFLG */
667 0x19, 0x0C, /* 0dB gain ADC/L */
668 0x1a, 0x0C /* 0dB gain ADC/R */
669 };
670
671 static unsigned short wm_inits_Phase28[] = {
672
673 0x18, 0x000, /* All power-up */
674
675 0x1b, 0x000, /* ADC Mux (AIN1 = Line-in, no other inputs are present) */
676 0x1c, 0x009, /* Output1 = DAC , Output2 = DAC */
677 0x1d, 0x009, /* Output3+4 = DAC */
678
679 0x16, 0x122, /* I2S, normal polarity, 24bit */
680 0x17, 0x022, /* 256fs, slave mode */
681
682 0x00, 0x000, /* DAC1 analog mute */
683 0x01, 0x000, /* DAC2 analog mute */
684 0x02, 0x7F, /* DAC3 analog mute */
685 0x03, 0x7F, /* DAC4 analog mute */
686 0x04, 0x7F, /* DAC5 analog mute */
687 0x05, 0x7F, /* DAC6 analog mute */
688 0x06, 0x7F, /* DAC7 analog mute */
689 0x07, 0x7F, /* DAC8 analog mute */
690 0x08, 0x17F, /* master analog mute */
691 0x09, 0xff, /* DAC1 digital full */
692 0x0a, 0xff, /* DAC2 digital full */
693 0x0b, 0xff, /* DAC3 digital full */
694 0x0c, 0xff, /* DAC4 digital full */
695 0x0d, 0xff, /* DAC5 digital full */
696 0x0e, 0xff, /* DAC6 digital full */
697 0x0f, 0xff, /* DAC7 digital full */
698 0x10, 0xff, /* DAC8 digital full */
699 0x11, 0x1ff, /* master digital full */
700 0x12, 0x000, /* phase normal */
701 0x13, 0x090, /* unmute DAC L/R */
702 0x14, 0x000, /* all unmute (bit 5 is rec enable) */
703 0x15, 0x000, /* no deemphasis, no ZFLG */
704 0x19, 0x0C, /* 0dB gain ADC/L */
705 0x1a, 0x0C /* 0dB gain ADC/R */
706 };
707
708 static unsigned short cs_inits[] = {
709 0x0441, /* RUN */
710 0x0180, /* no mute */
711 0x0201, /* */
712 0x0605, /* master, 16-bit slave, 24bit */
713 };
714
715
716 int card_init(struct CardData *card)
717 {
718 struct PCIDevice *dev = (struct PCIDevice *) card->pci_dev;
719 int i;
720 unsigned int tmp;
721
722 OUTBYTE(card->mtbase + MT_AC97_CMD_STATUS, MT_AC97_RESET); // tbd
723 MicroDelay(5);
724 OUTBYTE(card->mtbase + MT_AC97_CMD_STATUS, 0x00); // tbd
725
726 //DEBUGPRINTF("Envy24HT: card_init %lx\n", card);
727
728 OUTBYTE(card->iobase + CCS_POWER_DOWN, 0); // power up the whole thing
729
730 // reset
731 OUTBYTE(card->mtbase + CCS_CTRL, CCS_RESET_ALL);
732 MicroDelay(100);
733 ClearMask8(card, card->mtbase, CCS_CTRL, CCS_RESET_ALL);
734 MicroDelay(100);
735
736 //DEBUGPRINTF("Envy24HT: reading eeprom\n");
737 if ((INBYTE(card->iobase + CCS_I2C_STATUS) & CCS_I2C_EPROM) != 0)
738 {
739 unsigned long subvendor = 0;
740
741 subvendor =
742 (ReadI2C(dev, card, 0x00) << 0) |
743 (ReadI2C(dev, card, 0x01) << 8) |
744 (ReadI2C(dev, card, 0x02) << 16) |
745 (ReadI2C(dev, card, 0x03) << 24);
746
747 switch (subvendor)
748 {
749 case SUBVENDOR_AUREON_SKY: card->SubType = AUREON_SKY;
750 break;
751
752 case SUBVENDOR_AUREON_SPACE: card->SubType = AUREON_SPACE;
753 break;
754
755 case SUBVENDOR_PHASE28: card->SubType = PHASE28;
756 break;
757
758 case SUBVENDOR_MAUDIO_REVOLUTION51: card->SubType = REVO51;
759 break;
760
761 case SUBVENDOR_MAUDIO_REVOLUTION71: card->SubType = REVO71;
762 break;
763
764 case SUBVENDOR_JULIA: card->SubType = JULIA;
765 break;
766
767 case SUBVENDOR_PHASE22: card->SubType = PHASE22;
768 break;
769
770 default:
771 card->SubType = AUREON_SKY;
772 }
773
774 DEBUGPRINTF("subvendor = %lx, Type = %d\n", subvendor, card->SubType);
775 }
776
777
778 if (card->SubType == PHASE22)
779 {
780 OUTBYTE(card->iobase + CCS_SYSTEM_CONFIG, 0x28);
781 OUTBYTE(card->iobase + CCS_ACLINK_CONFIG, 0x80); // AC-link
782 OUTBYTE(card->iobase + CCS_I2S_FEATURES, 0x70); // I2S
783 OUTBYTE(card->iobase + CCS_SPDIF_CONFIG, 0xC3); // S/PDIF
784 }
785 else
786 {
787 if (card->SubType == PHASE28)
788 OUTBYTE(card->iobase + CCS_SYSTEM_CONFIG, 0x2B); // MIDI, ADC+SPDIF IN, 4 DACS
789 else if (card->SubType == AUREON_SPACE)
790 OUTBYTE(card->iobase + CCS_SYSTEM_CONFIG, 0x0B); // ADC+SPDIF IN, 4 DACS
791 else if (card->SubType == REVO71)
792 OUTBYTE(card->iobase + CCS_SYSTEM_CONFIG, 0x43); // XIN1 + ADC + 4 DACS
793 else if (card->SubType == REVO51)
794 OUTBYTE(card->iobase + CCS_SYSTEM_CONFIG, 0x42);
795 else if (card->SubType == JULIA)
796 OUTBYTE(card->iobase + CCS_SYSTEM_CONFIG, 0x20); // MIDI + ADC + DAC
797 else if (card->SubType == AUREON_SKY)
798 OUTBYTE(card->iobase + CCS_SYSTEM_CONFIG, 0x0A); // ADC+SPDIF IN, 3 DACS
799
800 OUTBYTE(card->iobase + CCS_ACLINK_CONFIG, CCS_ACLINK_I2S); // I2S in split mode
801
802 if (card->SubType == JULIA)
803 OUTBYTE(card->iobase + CCS_I2S_FEATURES, CCS_I2S_96KHZ | CCS_I2S_24BIT | CCS_I2S_192KHZ);
804 else
805 OUTBYTE(card->iobase + CCS_I2S_FEATURES, CCS_I2S_VOLMUTE | CCS_I2S_96KHZ | CCS_I2S_24BIT | CCS_I2S_192KHZ);
806
807 if (card->SubType == REVO71 || card->SubType == REVO51)
808 OUTBYTE(card->iobase + CCS_SPDIF_CONFIG, CCS_SPDIF_INTEGRATED | CCS_SPDIF_INTERNAL_OUT | CCS_SPDIF_EXTERNAL_OUT);
809 else
810 OUTBYTE(card->iobase + CCS_SPDIF_CONFIG, CCS_SPDIF_INTEGRATED | CCS_SPDIF_INTERNAL_OUT | CCS_SPDIF_IN_PRESENT | CCS_SPDIF_EXTERNAL_OUT);
811 }
812
813
814 card->SavedDir = Dirs[card->SubType];
815 OUTBYTE(card->mtbase + MT_INTR_MASK, MT_DMA_FIFO_MASK);
816
817 if (card->SubType == REVO71)
818 SetGPIOMask(card, card->iobase, 0x00BFFF85);
819 else if (card->SubType == REVO51)
820 SetGPIOMask(card, card->iobase, 0x00BFFF05);
821 else
822 SetGPIOMask(card, card->iobase, 0x00000000);
823
824 OUTLONG(card->iobase + CCS_GPIO_DIR, Dirs[card->SubType]); // input/output
825 INWORD(card->iobase + CCS_GPIO_DIR);
826
827 if (card->SubType == REVO71 || card->SubType == REVO51) {
828 OUTWORD(card->iobase + CCS_GPIO_DATA, 0x0072);
829 OUTBYTE(card->iobase + CCS_GPIO_DATA2, 0x00);
830 }
831 else if (card->SubType == JULIA) {
832 OUTWORD(card->iobase + CCS_GPIO_DATA, 0x3819);
833 }
834 else {
835 OUTWORD(card->iobase + CCS_GPIO_DATA, 0x0000);
836 if (card->SubType != PHASE22)
837 OUTBYTE(card->iobase + CCS_GPIO_DATA2, 0x00);
838 }
839 INWORD(card->iobase + CCS_GPIO_DATA);
840
841 //SaveGPIO(dev, card);
842
843 if (card->SubType == REVO71 || card->SubType == REVO51)
844 OUTBYTE(card->mtbase + MT_I2S_FORMAT, 0x08);
845 else
846 OUTBYTE(card->mtbase + MT_I2S_FORMAT, 0);
847
848 if (card->SubType == AUREON_SKY || card->SubType == AUREON_SPACE || card->SubType == PHASE28)
849 {
850 if (card->SubType == AUREON_SKY || card->SubType == AUREON_SPACE)
851 {
852 aureon_ac97_init(card, card->iobase);
853 SetGPIOMask(card, card->iobase, ~(AUREON_WM_RESET | AUREON_WM_CS | AUREON_CS8415_CS));
854 }
855 else if (card->SubType == PHASE28)
856 SetGPIOMask(card, card->iobase, ~(AUREON_WM_RESET | AUREON_WM_CS));
857
858
859 tmp = GetGPIOData(card, card->iobase);
860 tmp &= ~AUREON_WM_RESET;
861 SetGPIOData(card, card->iobase, tmp);
862 MicroDelay(1);
863
864 if (card->SubType != PHASE28)
865 tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
866 else
867 tmp |= AUREON_WM_CS;
868
869 SetGPIOData(card, card->iobase, tmp);
870 MicroDelay(1);
871 tmp |= AUREON_WM_RESET;
872 SetGPIOData(card, card->iobase, tmp);
873 MicroDelay(1);
874
875 if (card->SubType != PHASE28)
876 {
877 /* initialize WM8770 codec */
878 for (i = 0; i < 60; i += 2)
879 {
880 wm_put(card, card->iobase, wm_inits[i], wm_inits[i+1]);
881 }
882
883 /* initialize CS8415A codec */
884 for (i = 0; i < 4; i++)
885 aureon_spi_write(card, card->iobase, AUREON_CS8415_CS, cs_inits[i] | 0x200000, 24);
886 }
887 else
888 {
889 /* initialize WM8770 codec */
890 for (i = 0; i < 60; i += 2)
891 {
892 wm_put(card, card->iobase, wm_inits_Phase28[i], wm_inits_Phase28[i+1]);
893 }
894 }
895 }
896 else if (card->SubType == REVO51)
897 {
898 card->RevoFrontCodec = ALLOCVEC(sizeof(struct akm_codec), MEMF_ANY);
899 card->RevoFrontCodec->caddr = 2;
900 card->RevoFrontCodec->cif = 0;
901 card->RevoFrontCodec->datamask = REVO_CDOUT;
902 card->RevoFrontCodec->clockmask = REVO_CCLK;
903 card->RevoFrontCodec->csmask = REVO_CS0 | REVO_CS1;
904 card->RevoFrontCodec->csaddr = REVO_CS1;
905 card->RevoFrontCodec->csnone = REVO_CS0 | REVO_CS1;
906 card->RevoFrontCodec->addflags = REVO_CCLK;
907 card->RevoFrontCodec->type = AKM4358;
908 card->RevoFrontCodec->totalmask = 0;
909 card->RevoFrontCodec->newflag = 1;
910
911
912 card->RevoSurroundCodec = NULL;
913
914 card->RevoRecCodec = ALLOCVEC(sizeof(struct akm_codec), MEMF_ANY);
915 card->RevoRecCodec->caddr = 2;
916 card->RevoRecCodec->csmask = REVO_CS0 | REVO_CS1;
917 card->RevoRecCodec->clockmask = REVO_CCLK;
918 card->RevoRecCodec->datamask = REVO_CDOUT;
919 card->RevoRecCodec->type = AKM5365;
920 card->RevoRecCodec->cif = 0;
921 card->RevoRecCodec->addflags = REVO_CCLK;
922 card->RevoRecCodec->csaddr = REVO_CS0;
923 card->RevoRecCodec->csnone = REVO_CS0 | REVO_CS1;
924 card->RevoRecCodec->totalmask = 0;
925 card->RevoRecCodec->newflag = 1;
926
927 OUTBYTE(card->mtbase + MT_SAMPLERATE, 8);
928
929 {
930 unsigned int tmp = GetGPIOData(card, card->iobase);
931 tmp &= ~REVO_MUTE; // mute
932 SetGPIOData(card, card->iobase, tmp);
933 }
934
935 Init_akm4xxx(card, card->RevoFrontCodec);
936
937 {
938 unsigned int tmp = GetGPIOData(card, card->iobase);
939 tmp |= REVO_MUTE; // unmute
940 SetGPIOData(card, card->iobase, tmp);
941 }
942
943 // Has to be after mute, otherwise the mask is changed in Revo51_Init() which enables the mute mask bit...
944 Revo51_Init(card); // I2C
945 }
946 else if (card->SubType == REVO71)
947 {
948 card->RevoFrontCodec = ALLOCVEC(sizeof(struct akm_codec), MEMF_ANY);
949 card->RevoFrontCodec->caddr = 1;
950 card->RevoFrontCodec->csmask = REVO_CS1;
951 card->RevoFrontCodec->clockmask = REVO_CCLK;
952 card->RevoFrontCodec->datamask = REVO_CDOUT;
953 card->RevoFrontCodec->type = AKM4381;
954 card->RevoFrontCodec->cif = 0;
955 card->RevoFrontCodec->addflags = 0; //REVO_CCLK;?
956
957 card->RevoSurroundCodec = ALLOCVEC(sizeof(struct akm_codec), MEMF_ANY);
958 card->RevoSurroundCodec->caddr = 3;
959 card->RevoSurroundCodec->csmask = REVO_CS2;
960 card->RevoSurroundCodec->clockmask = REVO_CCLK;
961 card->RevoSurroundCodec->datamask = REVO_CDOUT;
962 card->RevoSurroundCodec->type = AKM4355;
963 card->RevoSurroundCodec->cif = 0;
964 card->RevoSurroundCodec->addflags = 0; //REVO_CCLK;?
965
966 OUTBYTE(card->mtbase + MT_SAMPLERATE, 8);
967
968 {
969 unsigned int tmp = GetGPIOData(card, card->iobase);
970 tmp &= ~REVO_MUTE; // mute
971 SetGPIOData(card, card->iobase, tmp);
972 }
973
974 Init_akm4xxx(card, card->RevoFrontCodec);
975 Init_akm4xxx(card, card->RevoSurroundCodec);
976 //revo_i2s_mclk_changed(card);
977
978 {
979 unsigned int tmp = GetGPIOData(card, card->iobase);
980 tmp |= REVO_MUTE; // unmute
981 SetGPIOData(card, card->iobase, tmp);
982 }
983 }
984
985 else if (card->SubType == JULIA)
986 {
987 unsigned char *ptr, reg, data;
988
989
990
991 static unsigned char inits_ak4114[] = {
992 0x00, 0x00, // power down & reset
993 0x00, 0x0F, // power on
994 0x01, 0x70, // I2S
995 0x02, 0x80, // TX1 output enable
996 0x03, 0x49, // 1024 LRCK + transmit data
997 0x04, 0x00, // no mask
998 0x05, 0x00, // no mask
999 0x0D, 0x41, //
1000 0x0E, 0x02,
1001 0x0F, 0x2C,
1002 0x10, 0x00,
1003 0x11, 0x00,
1004 0xff, 0xff
1005 };
1006
1007 ptr = inits_ak4358;
1008 while (*ptr != 0xff) {
1009 reg = *ptr++;
1010 data = *ptr++;
1011 WriteI2C(dev, card, AK4358_ADDR, reg, data);
1012 MicroDelay(5);
1013 }
1014
1015 ptr = inits_ak4114;
1016 while (*ptr != 0xff) {
1017 reg = *ptr++;
1018 data = *ptr++;
1019 WriteI2C(dev, card, AK4114_ADDR, reg, data);
1020 MicroDelay(100);
1021 }
1022
1023 OUTBYTE(card->mtbase + MT_SAMPLERATE, MT_SPDIF_MASTER);
1024 OUTLONG(card->mtbase + 0x2C, 0x300200); // route
1025 }
1026 else if (card->SubType == PHASE22)
1027 {
1028 card->RevoFrontCodec = ALLOCVEC(sizeof(struct akm_codec), MEMF_ANY);
1029 card->RevoFrontCodec->caddr = 2;
1030 card->RevoFrontCodec->csmask = 1 << 10;
1031 card->RevoFrontCodec->clockmask = 1 << 5;
1032 card->RevoFrontCodec->datamask = 1 << 4;
1033 card->RevoFrontCodec->type = AKM4524;
1034 card->RevoFrontCodec->cif = 1;
1035 card->RevoFrontCodec->addflags = 1 << 3;
1036
1037 Init_akm4xxx(card, card->RevoFrontCodec);
1038 }
1039
1040 //RestoreGPIO(dev, card);
1041
1042 ClearMask8(card, card->iobase, CCS_INTR_MASK, CCS_INTR_PLAYREC); // enable
1043
1044 // Enter SPI mode for CS8415A digital receiver
1045 /*SetGPIOMask(card, card->iobase, ~(AUREON_CS8415_CS));
1046 tmp |= AUREON_CS8415_CS;
1047 SetGPIOData(card, card->iobase, tmp); // set CS high
1048 MicroDelay(1);
1049
1050 tmp &= ~AUREON_CS8415_CS;
1051 SetGPIOData(card, card->iobase, tmp); // set CS low
1052 MicroDelay(1);*/
1053
1054 // WritePartialMask(card, card->mtbase, 0x2C, 8, 7, 6); // this line is to route the s/pdif input to the left
1055 // analogue output for testing purposes
1056
1057 return 0;
1058 }
1059
1060
1061 void card_cleanup(struct CardData *card)
1062 {
1063 }
1064
1065
1066
1067 /******************************************************************************
1068 ** Misc. **********************************************************************
1069 ******************************************************************************/
1070
1071 void
1072 SaveMixerState( struct CardData* card )
1073 {
1074 }
1075
1076
1077 void
1078 RestoreMixerState( struct CardData* card )
1079 {
1080 }
1081
1082 void
1083 UpdateMonitorMixer( struct CardData* card )
1084 {
1085 }
1086
1087
1088 Fixed
1089 Linear2MixerGain( Fixed linear,
1090 UWORD* bits )
1091 {
1092 static const Fixed gain[ 256 ] =
1093 {
1094 0x0, // -127.5 dB
1095 0x0, // -127.0 dB
1096 0x0, // -126.5 dB
1097 0x0, // -126.0 dB
1098 0x0, // -125.5 dB
1099 0x0, // -125.0 dB
1100 0x0, // -124.5 dB
1101 0x0, // -124.0 dB
1102 0x0, // -123.5 dB
1103 0x0, // -123.0 dB
1104 0x0, // -122.5 dB
1105 0x0, // -122.0 dB
1106 0x0, // -121.5 dB
1107 0x0, // -121.0 dB
1108 0x0, // -120.5 dB
1109 0x0, // -120.0 dB
1110 0x0, // -119.5 dB
1111 0x0, // -119.0 dB
1112 0x0, // -118.5 dB
1113 0x0, // -118.0 dB
1114 0x0, // -117.5 dB
1115 0x0, // -117.0 dB
1116 0x0, // -116.5 dB
1117 0x0, // -116.0 dB
1118 0x0, // -115.5 dB
1119 0x0, // -115.0 dB
1120 0x0, // -114.5 dB
1121 0x0, // -114.0 dB
1122 0x0, // -113.5 dB
1123 0x0, // -113.0 dB
1124 0x0, // -112.5 dB
1125 0x0, // -112.0 dB
1126 0x0, // -111.5 dB
1127 0x0, // -111.0 dB
1128 0x0, // -110.5 dB
1129 0x0, // -110.0 dB
1130 0x0, // -109.5 dB
1131 0x0, // -109.0 dB
1132 0x0, // -108.5 dB
1133 0x0, // -108.0 dB
1134 0x0, // -107.5 dB
1135 0x0, // -107.0 dB
1136 0x0, // -106.5 dB
1137 0x0, // -106.0 dB
1138 0x0, // -105.5 dB
1139 0x0, // -105.0 dB
1140 0x0, // -104.5 dB
1141 0x0, // -104.0 dB
1142 0x0, // -103.5 dB
1143 0x0, // -103.0 dB
1144 0x0, // -102.5 dB
1145 0x0, // -102.0 dB
1146 0x0, // -101.5 dB
1147 0x0, // -101.0 dB
1148 0x0, // -100.5 dB
1149 0x0, // -100.0 dB
1150 0x0, // -99.5 dB
1151 0x0, // -99.0 dB
1152 0x0, // -98.5 dB
1153 0x0, // -98.0 dB
1154 0x0, // -97.5 dB
1155 0x0, // -97.0 dB
1156 0x0, // -96.5 dB
1157 0x1, // -96.0 dB
1158 0x1, // -95.5 dB
1159 0x1, // -95.0 dB
1160 0x1, // -94.5 dB
1161 0x1, // -94.0 dB
1162 0x1, // -93.5 dB
1163 0x1, // -93.0 dB
1164 0x1, // -92.5 dB
1165 0x1, // -92.0 dB
1166 0x1, // -91.5 dB
1167 0x1, // -91.0 dB
1168 0x1, // -90.5 dB
1169 0x2, // -90.0 dB
1170 0x2, // -89.5 dB
1171 0x2, // -89.0 dB
1172 0x2, // -88.5 dB
1173 0x2, // -88.0 dB
1174 0x2, // -87.5 dB
1175 0x2, // -87.0 dB
1176 0x3, // -86.5 dB
1177 0x3, // -86.0 dB
1178 0x3, // -85.5 dB
1179 0x3, // -85.0 dB
1180 0x3, // -84.5 dB
1181 0x4, // -84.0 dB
1182 0x4, // -83.5 dB
1183 0x4, // -83.0 dB
1184 0x4, // -82.5 dB
1185 0x5, // -82.0 dB
1186 0x5, // -81.5 dB
1187 0x5, // -81.0 dB
1188 0x6, // -80.5 dB
1189 0x6, // -80.0 dB
1190 0x6, // -79.5 dB
1191 0x7, // -79.0 dB
1192 0x7, // -78.5 dB
1193 0x8, // -78.0 dB
1194 0x8, // -77.5 dB
1195 0x9, // -77.0 dB
1196 0x9, // -76.5 dB
1197 0xa, // -76.0 dB
1198 0xb, // -75.5 dB
1199 0xb, // -75.0 dB
1200 0xc, // -74.5 dB
1201 0xd, // -74.0 dB
1202 0xd, // -73.5 dB
1203 0xe, // -73.0 dB
1204 0xf, // -72.5 dB
1205 0x10, // -72.0 dB
1206 0x11, // -71.5 dB
1207 0x12, // -71.0 dB
1208 0x13, // -70.5 dB
1209 0x14, // -70.0 dB
1210 0x15, // -69.5 dB
1211 0x17, // -69.0 dB
1212 0x18, // -68.5 dB
1213 0x1a, // -68.0 dB
1214 0x1b, // -67.5 dB
1215 0x1d, // -67.0 dB
1216 0x1f, // -66.5 dB
1217 0x20, // -66.0 dB
1218 0x22, // -65.5 dB
1219 0x24, // -65.0 dB
1220 0x27, // -64.5 dB
1221 0x29, // -64.0 dB
1222 0x2b, // -63.5 dB
1223 0x2e, // -63.0 dB
1224 0x31, // -62.5 dB
1225 0x34, // -62.0 dB
1226 0x37, // -61.5 dB
1227 0x3a, // -61.0 dB
1228 0x3d, // -60.5 dB
1229 0x41, // -60.0 dB
1230 0x45, // -59.5 dB
1231 0x49, // -59.0 dB
1232 0x4d, // -58.5 dB
1233 0x52, // -58.0 dB
1234 0x57, // -57.5 dB
1235 0x5c, // -57.0 dB
1236 0x62, // -56.5 dB
1237 0x67, // -56.0 dB
1238 0x6e, // -55.5 dB
1239 0x74, // -55.0 dB
1240 0x7b, // -54.5 dB
1241 0x82, // -54.0 dB
1242 0x8a, // -53.5 dB
1243 0x92, // -53.0 dB
1244 0x9b, // -52.5 dB
1245 0xa4, // -52.0 dB
1246 0xae, // -51.5 dB
1247 0xb8, // -51.0 dB
1248 0xc3, // -50.5 dB
1249 0xcf, // -50.0 dB
1250 0xdb, // -49.5 dB
1251 0xe8, // -49.0 dB
1252 0xf6, // -48.5 dB
1253 0x104, // -48.0 dB
1254 0x114, // -47.5 dB
1255 0x124, // -47.0 dB
1256 0x136, // -46.5 dB
1257 0x148, // -46.0 dB
1258 0x15b, // -45.5 dB
1259 0x170, // -45.0 dB
1260 0x186, // -44.5 dB
1261 0x19d, // -44.0 dB
1262 0x1b6, // -43.5 dB
1263 0x1cf, // -43.0 dB
1264 0x1eb, // -42.5 dB
1265 0x208, // -42.0 dB
1266 0x227, // -41.5 dB
1267 0x248, // -41.0 dB
1268 0x26a, // -40.5 dB
1269 0x28f, // -40.0 dB
1270 0x2b6, // -39.5 dB
1271 0x2df, // -39.0 dB
1272 0x30a, // -38.5 dB
1273 0x339, // -38.0 dB
1274 0x369, // -37.5 dB
1275 0x39d, // -37.0 dB
1276 0x3d4, // -36.5 dB
1277 0x40e, // -36.0 dB
1278 0x44c, // -35.5 dB
1279 0x48d, // -35.0 dB
1280 0x4d2, // -34.5 dB
1281 0x51b, // -34.0 dB
1282 0x569, // -33.5 dB
1283 0x5bb, // -33.0 dB
1284 0x612, // -32.5 dB
1285 0x66e, // -32.0 dB
1286 0x6cf, // -31.5 dB
1287 0x737, // -31.0 dB
1288 0x7a4, // -30.5 dB
1289 0x818, // -30.0 dB
1290 0x893, // -29.5 dB
1291 0x915, // -29.0 dB
1292 0x99f, // -28.5 dB
1293 0xa31, // -28.0 dB
1294 0xacb, // -27.5 dB
1295 0xb6f, // -27.0 dB
1296 0xc1c, // -26.5 dB
1297 0xcd4, // -26.0 dB
1298 0xd97, // -25.5 dB
1299 0xe65, // -25.0 dB
1300 0xf3f, // -24.5 dB
1301 0x1027, // -24.0 dB
1302 0x111c, // -23.5 dB
1303 0x121f, // -23.0 dB
1304 0x1332, // -22.5 dB
1305 0x1455, // -22.0 dB
1306 0x158a, // -21.5 dB
1307 0x16d0, // -21.0 dB
1308 0x182a, // -20.5 dB
1309 0x1999, // -20.0 dB
1310 0x1b1d, // -19.5 dB
1311 0x1cb9, // -19.0 dB
1312 0x1e6c, // -18.5 dB
1313 0x203a, // -18.0 dB
1314 0x2223, // -17.5 dB
1315 0x2429, // -17.0 dB
1316 0x264d, // -16.5 dB
1317 0x2892, // -16.0 dB
1318 0x2afa, // -15.5 dB
1319 0x2d86, // -15.0 dB
1320 0x3038, // -14.5 dB
1321 0x3314, // -14.0 dB
1322 0x361a, // -13.5 dB
1323 0x394f, // -13.0 dB
1324 0x3cb5, // -12.5 dB
1325 0x404d, // -12.0 dB
1326 0x441d, // -11.5 dB
1327 0x4826, // -11.0 dB
1328 0x4c6d, // -10.5 dB
1329 0x50f4, // -10.0 dB
1330 0x55c0, // -9.5 dB
1331 0x5ad5, // -9.0 dB
1332 0x6036, // -8.5 dB
1333 0x65ea, // -8.0 dB
1334 0x6bf4, // -7.5 dB
1335 0x7259, // -7.0 dB
1336 0x7920, // -6.5 dB
1337 0x804d, // -6.0 dB
1338 0x87e8, // -5.5 dB
1339 0x8ff5, // -5.0 dB
1340 0x987d, // -4.5 dB
1341 0xa186, // -4.0 dB
1342 0xab18, // -3.5 dB
1343 0xb53b, // -3.0 dB
1344 0xbff9, // -2.5 dB
1345 0xcb59, // -2.0 dB
1346 0xd765, // -1.5 dB
1347 0xe429, // -1.0 dB
1348 0xf1ad, // -0.5 dB
1349 0x10000, // 0.0 dB
1350 };
1351
1352 int v = 0;
1353
1354 while( linear > gain[ v ] && v < 255)
1355 {
1356 ++v;
1357 }
1358
1359 *bits = v;
1360
1361 return gain[ v ];
1362 }
1363
1364
1365 Fixed
1366 Linear2AKMGain( Fixed linear,
1367 UWORD* bits )
1368 {
1369 static const Fixed gain[ 101 ] =
1370 {
1371 0x0, // -100 dB
1372 0x0, // -99 dB
1373 0x0, // -98 dB
1374 0x0, // -97 dB
1375 0x1, // -96 dB
1376 0x1, // -95 dB
1377 0x1, // -94 dB
1378 0x1, // -93 dB
1379 0x1, // -92 dB
1380 0x1, // -91 dB
1381 0x2, // -90 dB
1382 0x2, // -89 dB
1383 0x2, // -88 dB
1384 0x2, // -87 dB
1385 0x3, // -86 dB
1386 0x3, // -85 dB
1387 0x4, // -84 dB
1388 0x4, // -83 dB
1389 0x5, // -82 dB
1390 0x5, // -81 dB
1391 0x6, // -80 dB
1392 0x7, // -79 dB
1393 0x8, // -78 dB
1394 0x9, // -77 dB
1395 0xa, // -76 dB
1396 0xb, // -75 dB
1397 0xd, // -74 dB
1398 0xe, // -73 dB
1399 0x10, // -72 dB
1400 0x12, // -71 dB
1401 0x14, // -70 dB
1402 0x17, // -69 dB
1403 0x1a, // -68 dB
1404 0x1d, // -67 dB
1405 0x20, // -66 dB
1406 0x24, // -65 dB
1407 0x29, // -64 dB
1408 0x2e, // -63 dB
1409 0x34, // -62 dB
1410 0x3a, // -61 dB
1411 0x41, // -60 dB
1412 0x49, // -59 dB
1413 0x52, // -58 dB
1414 0x5c, // -57 dB
1415 0x67, // -56 dB
1416 0x74, // -55 dB
1417 0x82, // -54 dB
1418 0x92, // -53 dB
1419 0xa4, // -52 dB
1420 0xb8, // -51 dB
1421 0xcf, // -50 dB
1422 0xe8, // -49 dB
1423 0x104, // -48 dB
1424 0x124, // -47 dB
1425 0x148, // -46 dB
1426 0x170, // -45 dB
1427 0x19d, // -44 dB
1428 0x1cf, // -43 dB
1429 0x208, // -42 dB
1430 0x248, // -41 dB
1431 0x28f, // -40 dB
1432 0x2df, // -39 dB
1433 0x339, // -38 dB
1434 0x39d, // -37 dB
1435 0x40e, // -36 dB
1436 0x48d, // -35 dB
1437 0x51b, // -34 dB
1438 0x5bb, // -33 dB
1439 0x66e, // -32 dB
1440 0x737, // -31 dB
1441 0x818, // -30 dB
1442 0x915, // -29 dB
1443 0xa31, // -28 dB
1444 0xb6f, // -27 dB
1445 0xcd4, // -26 dB
1446 0xe65, // -25 dB
1447 0x1027, // -24 dB
1448 0x121f, // -23 dB
1449 0x1455, // -22 dB
1450 0x16d0, // -21 dB
1451 0x1999, // -20 dB
1452 0x1cb9, // -19 dB
1453 0x203a, // -18 dB
1454 0x2429, // -17 dB
1455 0x2892, // -16 dB
1456 0x2d86, // -15 dB
1457 0x3314, // -14 dB
1458 0x394f, // -13 dB
1459 0x404d, // -12 dB
1460 0x4826, // -11 dB
1461 0x50f4, // -10 dB
1462 0x5ad5, // -9 dB
1463 0x65ea, // -8 dB
1464 0x7259, // -7 dB
1465 0x804d, // -6 dB
1466 0x8ff5, // -5 dB
1467 0xa186, // -4 dB
1468 0xb53b, // -3 dB
1469 0xcb59, // -2 dB
1470 0xe429, // -1 dB
1471 0x10000, // 0 dB
1472
1473 };
1474
1475 int v = 0;
1476
1477 while( linear > gain[ v ] && v < 100)
1478 {
1479 ++v;
1480 }
1481
1482 *bits = v + 0x9B;
1483
1484 return gain[ v ];
1485 }
1486
1487
1488
1489 Fixed
1490 Linear2RecordGain( Fixed linear,
1491 UWORD* bits )
1492 {
1493 static const Fixed gain[ 32 ] =
1494 {
1495 0x404d, // -12 dB
1496 0x4826, // -11 dB
1497 0x50f4, // -10 dB
1498 0x5ad5, // -9 dB
1499 0x65ea, // -8 dB
1500 0x7259, // -7 dB
1501 0x804d, // -6 dB
1502 0x8ff5, // -5 dB
1503 0xa186, // -4 dB
1504 0xb53b, // -3 dB
1505 0xcb59, // -2 dB
1506 0xe429, // -1 dB
1507 0x10000, // 0 dB
1508 0x11f3c, // 1 dB
1509 0x14248, // 2 dB
1510 0x1699c, // 3 dB
1511 0x195bb, // 4 dB
1512 0x1c73d, // 5 dB
1513 0x1fec9, // 6 dB
1514 0x23d1c, // 7 dB
1515 0x2830a, // 8 dB
1516 0x2d181, // 9 dB
1517 0x3298b, // 10 dB
1518 0x38c52, // 11 dB
1519 0x3fb27, // 12 dB
1520 0x47782, // 13 dB
1521 0x5030a, // 14 dB
1522 0x59f98, // 15 dB
1523 0x64f40, // 16 dB
1524 0x71457, // 17 dB
1525 0x7f17a, // 18 dB
1526 0x8e99a, // 19 dB
1527 };
1528
1529 int v = 0;
1530
1531 while( linear > gain[ v ] && v < 32)
1532 {
1533 ++v;
1534 }
1535
1536 *bits = v;
1537
1538 return gain[ v ];
1539 }
1540
1541
1542 ULONG
1543 SamplerateToLinearPitch( ULONG samplingrate )
1544 {
1545 samplingrate = (samplingrate << 8) / 375;
1546 return (samplingrate >> 1) + (samplingrate & 1);
1547 }
1548
1549
1550 #define CACHELINE_SIZE 4096
1551
1552 void *pci_alloc_consistent(size_t size, APTR *NonAlignedAddress, unsigned int boundary)
1553 {
1554 #ifdef __amigaos4__
1555 void* address;
1556 unsigned long a;
1557
1558 if (IExec->OpenResource("newmemory.resource"))
1559 {
1560 address = ALLOCVECTags(size, AVT_Type, MEMF_SHARED, AVT_Contiguous, TRUE, AVT_Lock, TRUE,
1561 AVT_PhysicalAlignment, 32, AVT_Clear, 0, TAG_DONE);
1562 }
1563 else
1564 {
1565 address = ALLOCVEC( size + CACHELINE_SIZE, MEMF_PUBLIC | MEMF_CLEAR);
1566
1567 if( address != NULL )
1568 {
1569 a = (unsigned long) address;
1570 a = (a + CACHELINE_SIZE - 1) & ~(CACHELINE_SIZE - 1);
1571 address = (void *) a;
1572 }
1573 }
1574
1575 *NonAlignedAddress = address;
1576
1577 return address;
1578 #else
1579 void* address;
1580 unsigned long a;
1581
1582 #ifdef __MORPHOS__
1583 //address = AllocVecDMA(size + boundary, MEMF_PUBLIC | MEMF_CLEAR);
1584 #if 0
1585 address = AllocVec(size + CACHELINE_SIZE - 1, MEMF_PUBLIC & ~MEMF_CLEAR);
1586 Forbid();
1587 FreeMem(address, size + CACHELINE_SIZE - 1);
1588 address = AllocAbs(size, (void*) ((ULONG) (address + CACHELINE_SIZE - 1) & ~(CACHELINE_SIZE-1) ) );
1589 Permit();
1590 #endif
1591 address = AllocVecDMA(size, MEMF_PUBLIC | MEMF_CLEAR);
1592 *NonAlignedAddress = address;
1593
1594 memset(address, 0, size);
1595
1596 return address;
1597
1598 #else
1599 address = AllocVec(size + boundary, MEMF_PUBLIC | MEMF_CLEAR);
1600
1601 if (address != NULL)
1602 {
1603 a = (unsigned long) address;
1604 a = (a + boundary - 1) & ~(boundary - 1);
1605 address = (void *) a;
1606 }
1607
1608 if (NonAlignedAddress)
1609 {
1610 *NonAlignedAddress = address;
1611 }
1612
1613 return address;
1614 #endif
1615 #endif
1616 }
1617
1618
1619 void pci_free_consistent(void* addr)
1620 {
1621 #ifdef __MORPHOS__
1622 FreeVecDMA(addr);
1623 #else
1624 FREEVEC( addr );
1625 #endif
1626 }
1627
1628 #ifdef __amigaos4__
1629 static ULONG ResetHandler(struct ExceptionContext *ctx, struct ExecBase *pExecBase, struct CardData *card)
1630 {
1631 struct PCIDevice *dev = card->pci_dev;
1632
1633 ClearMask8(card, card->mtbase, MT_DMA_CONTROL, MT_PDMA0_START | MT_PDMA4_START | MT_RDMA0_MASK | MT_RDMA1_MASK);
1634 WriteMask8(card, card->mtbase, MT_INTR_MASK, MT_DMA_FIFO_MASK | MT_PDMA0_MASK | MT_RDMA0_MASK | MT_RDMA1_MASK);
1635
1636 return 0UL;
1637 }
1638
1639 void AddResetHandler(struct CardData *card)
1640 {
1641 static struct Interrupt interrupt;
1642
1643 interrupt.is_Code = (void (*)())ResetHandler;
1644 interrupt.is_Data = (APTR) card;
1645 interrupt.is_Node.ln_Pri = 0;
1646 interrupt.is_Node.ln_Type = NT_EXTINTERRUPT;
1647 interrupt.is_Node.ln_Name = "reset handler";
1648
1649 IExec->AddResetCallback( &interrupt );
1650 }
1651 #endif
1652
1653
1654
1655 #if 0
1656 if ((INBYTE(card->iobase + CCS_I2C_STATUS) & CCS_I2C_EPROM) == 0)
1657 {
1658 DEBUGPRINTF("No EEPROM found!\n");
1659 }
1660 else
1661 {
1662 DEBUGPRINTF("EEPROM found!\n");
1663 }
1664
1665
1666 /*OUTBYTE(card->iobase + CCS_I2C_DATA, 0x11);
1667 OUTBYTE(card->iobase + CCS_I2C_ADDR, 0);
1668
1669 while (INBYTE(card->iobase + CCS_I2C_STATUS) & CCS_I2C_BUSY)
1670 {
1671 }
1672 OUTBYTE(card->iobase + CCS_I2C_DEV_ADDRESS, 0xA0);
1673 DELAY(1);*/
1674
1675 for (i = 0; i < 6; i++)
1676 {
1677 OUTBYTE(card->iobase + CCS_I2C_ADDR, i);
1678
1679 while (INBYTE(card->iobase + CCS_I2C_STATUS) & CCS_I2C_BUSY)
1680 {
1681 }
1682
1683 OUTBYTE(card->iobase + CCS_I2C_DEV_ADDRESS, 0xA0);
1684
1685 while (INBYTE(card->iobase + CCS_I2C_STATUS) & CCS_I2C_BUSY)
1686 {
1687 }
1688
1689
1690 DEBUGPRINTF("%d = %x\n",i, INBYTE(card->iobase + CCS_I2C_DATA));
1691 DELAY(1);
1692 }
1693 #endif
Mirror of AROS' svn.