rom/isapnp/pnpisa.h

   1 /* $Id$ */
   2
   3 /*
   4      ISA-PnP -- A Plug And Play ISA software layer for AmigaOS.
   5      Copyright (C) 2001 Martin Blom <martin@blom.org>
   6
   7      This library is free software; you can redistribute it and/or
   8      modify it under the terms of the GNU Library General Public
   9      License as published by the Free Software Foundation; either
  10      version 2 of the License, or (at your option) any later version.
  11
  12      This library is distributed in the hope that it will be useful,
  13      but WITHOUT ANY WARRANTY; without even the implied warranty of
  14      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15      Library General Public License for more details.
  16
  17      You should have received a copy of the GNU Library General Public
  18      License along with this library; if not, write to the
  19      Free Software Foundation, Inc., 59 Temple Place - Suite 330, Cambridge,
  20      MA 02139, USA.
  21 */
  22
  23 #ifndef ISA_PNP_isapnp_h
  24 #define ISA_PNP_isapnp_h
  25
  26 /* Definitions from Plug and Play ISA Specification Version 1.0a
  27    (May 5, 1994). 32 bit memory space configuration registers omitted. */
  28
  29
  30 /* The ISA ports */
  31
  32 #define PNPISA_ADDRESS    0x0279
  33 #define PNPISA_WRITE_DATA 0x0a79
  34
  35
  36 /* PNPISA_ADDRESS initiation key */
  37
  38 #define PNPISA_INITIATION_KEY \
  39   0x6A, 0xB5, 0xDA, 0xED, 0xF6, 0xFB, 0x7D, 0xBE, \
  40   0xDF, 0x6F, 0x37, 0x1B, 0x0D, 0x86, 0xC3, 0x61, \
  41   0xB0, 0x58, 0x2C, 0x16, 0x8B, 0x45, 0xA2, 0xD1, \
  42   0xE8, 0x74, 0x3A, 0x9D, 0xCE, 0xE7, 0x73, 0x39
  43
  44 #define PNPISA_LFSR( old, bit ) \
  45  ( ( (old) >> 1 ) | ( ( ( (old) ^ ( (old) >> 1 ) ^ (bit) ) & 1 ) << 7 ) )
  46
  47
  48 /* PNPISA_ADDRESS values */
  49
  50 #define PNPISA_REG_SET_RD_DATA_PORT                  0x00
  51 #define PNPISA_REG_SERIAL_ISOLATION                  0x01
  52 #define PNPISA_REG_CONFIG_CONTROL                    0x02
  53 #define PNPISA_REG_WAKE                              0x03
  54 #define PNPISA_REG_RESOURCE_DATA                     0x04
  55 #define PNPISA_REG_STATUS                            0x05
  56 #define PNPISA_REG_CARD_SELECT_NUMBER                0x06
  57 #define PNPISA_REG_LOGICAL_DEVICE_NUMBER             0x07
  58
  59
  60 #define PNPISA_REG_ACTIVATE                          0x30
  61 #define PNPISA_REG_IO_RANGE_CHECK                    0x31
  62
  63
  64 #define PNPISA_REG_MEMORY_BASE_ADDRESS_HIGH_0        0x40
  65 #define PNPISA_REG_MEMORY_BASE_ADDRESS_LOW_0         0x41
  66 #define PNPISA_REG_MEMORY_CONTROL_0                  0x42
  67 #define PNPISA_REG_MEMORY_UPPER_HIGH_0               0x43
  68 #define PNPISA_REG_MEMORY_UPPER_LOW_0                0x44
  69
  70 #define PNPISA_REG_MEMORY_BASE_ADDRESS_HIGH_1        0x48
  71 #define PNPISA_REG_MEMORY_BASE_ADDRESS_LOW_1         0x49
  72 #define PNPISA_REG_MEMORY_CONTROL_1                  0x4a
  73 #define PNPISA_REG_MEMORY_UPPER_HIGH_1               0x4b
  74 #define PNPISA_REG_MEMORY_UPPER_LOW_1                0x4c
  75
  76 #define PNPISA_REG_MEMORY_BASE_ADDRESS_HIGH_2        0x50
  77 #define PNPISA_REG_MEMORY_BASE_ADDRESS_LOW_2         0x51
  78 #define PNPISA_REG_MEMORY_CONTROL_2                  0x52
  79 #define PNPISA_REG_MEMORY_UPPER_HIGH_2               0x53
  80 #define PNPISA_REG_MEMORY_UPPER_LOW_2                0x54
  81
  82 #define PNPISA_REG_MEMORY_BASE_ADDRESS_HIGH_3        0x58
  83 #define PNPISA_REG_MEMORY_BASE_ADDRESS_LOW_3         0x59
  84 #define PNPISA_REG_MEMORY_CONTROL_3                  0x5a
  85 #define PNPISA_REG_MEMORY_UPPER_HIGH_3               0x5b
  86 #define PNPISA_REG_MEMORY_UPPER_LOW_3                0x5c
  87
  88
  89 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_HIGH_0       0x60
  90 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_LOW_0        0x61
  91
  92 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_HIGH_1       0x62
  93 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_LOW_1        0x63
  94
  95 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_HIGH_2       0x64
  96 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_LOW_2        0x65
  97
  98 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_HIGH_3       0x66
  99 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_LOW_3        0x67
 100
 101 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_HIGH_4       0x68
 102 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_LOW_4        0x69
 103
 104 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_HIGH_5       0x6a
 105 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_LOW_5        0x6b
 106
 107 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_HIGH_6       0x6c
 108 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_LOW_6        0x6d
 109
 110 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_HIGH_7       0x6e
 111 #define PNPISA_REG_IO_PORT_BASE_ADDRESS_LOW_7        0x6f
 112
 113
 114 #define PNPISA_REG_INTERRUPT_REQUEST_LEVEL_SELECT_0  0x70
 115 #define PNPISA_REG_INTERRUPT_REQUEST_TYPE_SELECT_0   0x71
 116
 117 #define PNPISA_REG_INTERRUPT_REQUEST_LEVEL_SELECT_1  0x72
 118 #define PNPISA_REG_INTERRUPT_REQUEST_TYPE_SELECT_1   0x73
 119
 120
 121 #define PNPISA_REG_DMA_CHANNEL_SELECT_0              0x74
 122 #define PNPISA_REG_DMA_CHANNEL_SELECT_1              0x75
 123
 124
 125 /* Bit masks for PNPISA_REG_CONFIG_CONTROL */
 126
 127 #define PNPISA_CCF_RESET        0x01
 128 #define PNPISA_CCF_WAIT_FOR_KEY 0x02
 129 #define PNPISA_CCF_RESET_CSN    0x04
 130 #define PNPISA_CCB_RESET        0
 131 #define PNPISA_CCB_WAIT_FOR_KEY 1
 132 #define PNPISA_CCB_RESET_CSN    2
 133
 134
 135 /* Bit masks for PNPISA_REG_STATUS */
 136
 137 #define PNPISA_SF_AVAILABLE     0x01
 138 #define PNPISA_SB_AVAILABLE     0
 139
 140
 141 /* Bit masks for PNPISA_REG_RESOURCE_DATA and more */
 142
 143 #define PNPISA_RDF_LARGE        0x80
 144 #define PNPISA_RDB_LARGE        7
 145
 146 #define PNPISA_RD_SMALL_ITEM_NAME( x ) ( ( (x) >> 3 ) & 0x0f )
 147 #define PNPISA_RD_SMALL_LENGTH( x )    ( (x) & 0x07 )
 148
 149 #define PNPISA_RD_LARGE_ITEM_NAME( x ) ( ( (x) & 0x7f ) | 0x80 )
 150
 151
 152 #define PNPISA_RDN_PNP_VERSION          0x1
 153 #define PNPISA_RDN_LOGICAL_DEVICE_ID    0x2
 154 #define PNPISA_RDN_COMPATIBLE_DEVICE_ID 0x3
 155 #define PNPISA_RDN_IRQ_FORMAT           0x4
 156 #define PNPISA_RDN_DMA_FORMAT           0x5
 157 #define PNPISA_RDN_START_DF             0x6
 158 #define PNPISA_RDN_END_DF               0x7
 159 #define PNPISA_RDN_IO_PORT              0x8
 160 #define PNPISA_RDN_FIXED_IO_PORT        0x9
 161 #define PNPISA_RDN_SMALL_VENDOR         0xe
 162 #define PNPISA_RDN_END_TAG              0xf
 163
 164 #define PNPISA_RDN_MEMORY_RANGE         0x81
 165 #define PNPISA_RDN_ANSI_IDENTIFIER      0x82
 166 #define PNPISA_RDN_UC_IDENTIFIER        0x83
 167 #define PNPISA_RDN_LARGE_VENDOR         0x84
 168
 169
 170 #endif /* ISA_PNP_isapnp_private_h */