arch/arm-raspi/include/hardware/usb2otg.h

   1 /*
   2     Copyright © 2013, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #ifndef USB2OTG_H
   7 #define USB2OTG_H
   8
   9 /** Maximum number of Periodic FIFOs */
  10
  11 #define PERIFIFO_MAX                                    15                      // Max no. of Periodic FIFO's
  12 #define TXFIFO_MAX                                      15                      // Max no. of Tx FIFO's
  13 #define EPSCHANS_MAX                                    16                      // Max no. of Endpoints/Host Chan's
  14
  15 #define USB2OTG_BASE                                    (BCM_PHYSBASE + 0x980000)
  16
  17 #define USB2OTG_OTGCTRL                                 (USB2OTG_BASE + 0x0000)
  18 #define USB2OTG_OTGINTR                                 (USB2OTG_BASE + 0x0004)
  19 #define USB2OTG_AHB                                     (USB2OTG_BASE + 0x0008)
  20 #define USB2OTG_USB                                     (USB2OTG_BASE + 0x000c)
  21 #define USB2OTG_RESET                                   (USB2OTG_BASE + 0x0010)
  22 #define USB2OTG_INTR                                    (USB2OTG_BASE + 0x0014)
  23 #define USB2OTG_INTRMASK                                (USB2OTG_BASE + 0x0018)
  24 #define USB2OTG_RCVPEEK                                 (USB2OTG_BASE + 0x001c)
  25 #define USB2OTG_RCVPOP                                  (USB2OTG_BASE + 0x0020)
  26 #define USB2OTG_RCVSIZE                                 (USB2OTG_BASE + 0x0024)
  27 #define USB2OTG_NONPERIFIFOSIZE                         (USB2OTG_BASE + 0x0028)
  28 #define USB2OTG_NONPERIFIFOSTATUS                       (USB2OTG_BASE + 0x002c)
  29 #define USB2OTG_I2CCTRL                                 (USB2OTG_BASE + 0x0030)
  30 #define USB2OTG_PHYVENDCTRL                             (USB2OTG_BASE + 0x0034)
  31 #define USB2OTG_GPIO                                    (USB2OTG_BASE + 0x0038)
  32 #define USB2OTG_USERID                                  (USB2OTG_BASE + 0x003c)
  33 #define USB2OTG_VENDORID                                (USB2OTG_BASE + 0x0040)
  34 #define USB2OTG_HARDWARE                                (USB2OTG_BASE + 0x0044)
  35 #define USB2OTG_LPMCONFIG                               (USB2OTG_BASE + 0x0048)
  36 #define USB2OTG_MDIOCTRL                                (USB2OTG_BASE + 0x0080)
  37 #define USB2OTG_MDIOGEN                                 (USB2OTG_BASE + 0x0084)
  38 #define USB2OTG_MDIOREAD                                USB2OTG_MDIOGEN
  39 #define USB2OTG_MDIOWRITE                               USB2OTG_MDIOGEN
  40 #define USB2OTG_MISCCTRL                                (USB2OTG_BASE + 0x0088)
  41 #define USB2OTG_PERIFIFOSIZE                            (USB2OTG_BASE + 0x0100)
  42 #define USB2OTG_PERIFIFOBASE                            (USB2OTG_BASE + 0x0104)
  43
  44 #define USB2OTG_HOSTCFG                                 (USB2OTG_BASE + 0x0400)
  45 #define USB2OTG_HOSTFRAMEINTERV                         (USB2OTG_BASE + 0x0404)
  46 #define USB2OTG_HOSTFRAMENO                             (USB2OTG_BASE + 0x0408)
  47 #define USB2OTG_HOSTFIFOSTATUS                          (USB2OTG_BASE + 0x0410)
  48 #define USB2OTG_HOSTINTR                                (USB2OTG_BASE + 0x0414)
  49 #define USB2OTG_HOSTINTRMASK                            (USB2OTG_BASE + 0x0418)
  50 #define USB2OTG_HOSTFRAMELST                            (USB2OTG_BASE + 0x041c)
  51 #define USB2OTG_HOSTPORT                                (USB2OTG_BASE + 0x0440)
  52
  53 #define USB2OTG_HOSTPORT_PRTCONNSTS                     (1 << 0)
  54 #define USB2OTG_HOSTPORT_PRTCONNDET                     (1 << 1)
  55 #define USB2OTG_HOSTPORT_PRTENA                         (1 << 2)
  56 #define USB2OTG_HOSTPORT_PRTENCHNG                      (1 << 3)
  57 #define USB2OTG_HOSTPORT_PRTOVRCURRACT                  (1 << 4)
  58 #define USB2OTG_HOSTPORT_PRTOVRCURRCHNG                 (1 << 5)
  59 #define USB2OTG_HOSTPORT_PRTRES                         (1 << 6)
  60 #define USB2OTG_HOSTPORT_PRTSUSP                        (1 << 7)
  61 #define USB2OTG_HOSTPORT_PRTRST                         (1 << 8)
  62 #define USB2OTG_HOSTPORT_RESERVED9                      (1 << 9)
  63 #define USB2OTG_HOSTPORT_PRTLNSTS                       (1 << 10)
  64 #define USB2OTG_HOSTPORT_PRTPWR                         (1 << 12)
  65 #define USB2OTG_HOSTPORT_PRTTSTCTL                      (1 << 13)
  66 #define USB2OTG_HOSTPORT_PRTSPD_HIGH                    (0 << 17)
  67 #define USB2OTG_HOSTPORT_PRTSPD_FULL                    (1 << 17)
  68 #define USB2OTG_HOSTPORT_PRTSPD_LOW                     (2 << 17)
  69
  70 #define USB2OTG_HOST_CHANBASE                           (USB2OTG_BASE + 0x0500)
  71 #define USB2OTG_HOSTCHAN_CHARBASE                       (0x00)
  72 #define USB2OTG_HOSTCHAN_SPLITCTRL                      (0x04)
  73 #define USB2OTG_HOSTCHAN_INTR                           (0x08)
  74 #define USB2OTG_HOSTCHAN_INTRMASK                       (0x0c)
  75 #define USB2OTG_HOSTCHAN_TRANSSIZE                      (0x10)
  76 #define USB2OTG_HOSTCHAN_DMAADDR                        (0x14)
  77 #define USB2OTG_HOSTCHAN_DMABUFF                        (0x1c)
  78 #define USB2OTG_HOST_CHANREGSIZE                        (0x20)
  79
  80 #define USB2OTG_DEVCFG                                  (USB2OTG_BASE + 0x0800)
  81 #define USB2OTG_DEVCTRL                                 (USB2OTG_BASE + 0x0804)
  82 #define USB2OTG_DEVSTATUS                               (USB2OTG_BASE + 0x0808)
  83 #define USB2OTG_DEVINEPMASK                             (USB2OTG_BASE + 0x0810)
  84 #define USB2OTG_DEVOUTEPMASK                            (USB2OTG_BASE + 0x0814)
  85 #define USB2OTG_DEVINTR                                 (USB2OTG_BASE + 0x0818)
  86 #define USB2OTG_DEVINTRMASK                             (USB2OTG_BASE + 0x081c)
  87 #define USB2OTG_DEVINTQRR1                              (USB2OTG_BASE + 0x0820)
  88 #define USB2OTG_DEVINTQRR2                              (USB2OTG_BASE + 0x0824)
  89 #define USB2OTG_DEVVBUSDIS                              (USB2OTG_BASE + 0x0828)
  90 #define USB2OTG_DEVVBUSPULSE                            (USB2OTG_BASE + 0x082c)
  91 #define USB2OTG_DEVINTQ_THRESHCTRL                      (USB2OTG_BASE + 0x0830)
  92 #define USB2OTG_DEVINTQ_FIFOEMASK                       (USB2OTG_BASE + 0x0834)
  93 #define USB2OTG_DEVEACHINT                              (USB2OTG_BASE + 0x0838)
  94 #define USB2OTG_DEVEACHINTMSK                           (USB2OTG_BASE + 0x083c)
  95
  96
  97 #define USB2OTG_DEV_INEP_BASE                           (USB2OTG_BASE + 0x0900)
  98 #define USB2OTG_DEV_INEP_DIEPCTL                        (0x00)
  99 #define USB2OTG_DEV_INEP_DIEPINT                        (0x08)
 100 #define USB2OTG_DEV_INEP_DIEPTSIZ                       (0x10)
 101 #define USB2OTG_DEV_INEP_DIEPDMA                        (0x14)
 102 #define USB2OTG_DEV_INEP_DTXFSTS                        (0x18)
 103 #define USB2OTG_DEV_INEP_DIEPDMAB                       (0x1c)
 104
 105 #define USB2OTG_DEV_OUTEP_BASE                          (USB2OTG_BASE + 0x0B00)
 106 #define USB2OTG_DEV_OUTEP_DOEPCTL                       (0x00)
 107 #define USB2OTG_DEV_OUTEP_DOEPFN                        (0x04)
 108 #define USB2OTG_DEV_OUTEP_DOEPINT                       (0x08)
 109 #define USB2OTG_DEV_OUTEP_DOEPTSIZ                      (0x10)
 110 #define USB2OTG_DEV_OUTEP_DOEPDMA                       (0x14)
 111 #define USB2OTG_DEV_OUTEP_DOEPDMAB                      (0x1c)
 112
 113 #define USB2OTG_DEV_EPSIZE                              (0x20)
 114
 115 #define USB2OTG_POWER                                   (USB2OTG_BASE + 0x0e00)
 116
 117 #define USB2OTG_FIFOBASE                                (USB2OTG_BASE + 0x1000)
 118 #define USB2OTG_FIFOSIZE                                0x1000
 119
 120 /* Bits for USB2OTG_OTGCTRL */
 121 #define USB2OTG_OTGCTRL_SESREQSCS                       (1 << 0)
 122 #define USB2OTG_OTGCTRL_SESREQ                          (1 << 1)
 123 #define USB2OTG_OTGCTRL_VBVALIDOVEN                     (1 << 2)
 124 #define USB2OTG_OTGCTRL_VBVALIDOVVAL                    (1 << 3)
 125 #define USB2OTG_OTGCTRL_AVALIDOVEN                      (1 << 4)
 126 #define USB2OTG_OTGCTRL_AVALIDOVVAL                     (1 << 5)
 127 #define USB2OTG_OTGCTRL_BVALIDOVEN                      (1 << 6)
 128 #define USB2OTG_OTGCTRL_BVALIDOVVAL                     (1 << 7)
 129 #define USB2OTG_OTGCTRL_HSTNEGSCS                       (1 << 8)
 130 #define USB2OTG_OTGCTRL_HNPREQ                          (1 << 9)
 131 #define USB2OTG_OTGCTRL_HOSTSETHNPENABLE                (1 << 10)
 132 #define USB2OTG_OTGCTRL_DEVHNPEN                        (1 << 11)
 133 #define USB2OTG_OTGCTRL_CONIDSTS                        (1 << 16)
 134 #define USB2OTG_OTGCTRL_DBNCTIME                        (1 << 17)
 135 #define USB2OTG_OTGCTRL_ASESSIONVALID                   (1 << 18)
 136 #define USB2OTG_OTGCTRL_BSESSIONVALID                   (1 << 19)
 137 #define USB2OTG_OTGCTRL_OTGVERSION                      (1 << 20)
 138 #define USB2OTG_OTGCTRL_MULTVALIDBC                     (1 << 22)
 139 #define USB2OTG_OTGCTRL_CHIRPEN                         (1 << 27)
 140
 141 /* Bits in USB2OTG_OTGINTR */
 142 #define USB2OTG_OTGINTR_SESSENDDETECTED                 (1 << 2)
 143 #define USB2OTG_OTGINTR_SESSRQSTSUCCESSSTATUSCHANGE     (1 << 8)
 144 #define USB2OTG_OTGINTR_HOSTNEGSUCCESSSTATUSCHANGE      (1 << 9)
 145 #define USB2OTG_OTGINTR_HOSTNEGDETECTED                 (1 << 17)
 146 #define USB2OTG_OTGINTR_ADEVICETIMEOUTCHANGE            (1 << 18)
 147 #define USB2OTG_OTGINTR_DEBOUNCEDONE                    (1 << 19)
 148
 149 /* Bits in USB2OTG_AHB */
 150 #define USB2OTG_AHB_INTENABLE                           (1 << 0)
 151 #define USB2OTG_AHB_AXIBURSTLENGTH                      (1 << 1)
 152 #define USB2OTG_AHB_WAITFORAXIWRITES                    (1 << 4)
 153 #define USB2OTG_AHB_DMAENABLE                           (1 << 5)
 154 #define USB2OTG_AHB_TRANSFEREMPTYLEVEL                  (1 << 7)
 155 #define USB2OTG_AHB_PERIODICTRANSFEREMPTYLEVEL          (1 << 8)
 156 #define USB2OTG_AHB_REMMEMSUPP                          (1 << 21)
 157 #define USB2OTG_AHB_NOTIALLDMAWRIT                      (1 << 22)
 158 #define USB2OTG_AHB_DMAREMAINDERMODE                    (1 << 23)
 159
 160 /* Bits in USB2OTG_USB */
 161 #define USB2OTG_USB_TOUTCAL                             (1 << 0)
 162 #define USB2OTG_USB_PHYINTERFACE                        (1 << 3)
 163 #define USB2OTG_USB_MODESELECT                          (1 << 4)
 164 #define USB2OTG_USB_FSINTF                              (1 << 5)
 165 #define USB2OTG_USB_PHYSEL                              (1 << 6)
 166 #define USB2OTG_USB_DDRSEL                              (1 << 7)
 167 #define USB2OTG_USB_SRPCAPABLE                          (1 << 8)
 168 #define USB2OTG_USB_HNPCAPABLE                          (1 << 9)
 169 #define USB2OTG_USB_USBTRDTIM                           (1 << 10)
 170 #define USB2OTG_USB_PHY_LPM_CLK_SEL                     (1 << 15)
 171 #define USB2OTG_USB_OTGUTMIFSSEL                        (1 << 16)
 172 #define USB2OTG_USB_ULPIFSLS                            (1 << 17)
 173 #define USB2OTG_USB_ULPI_AUTO_RES                       (1 << 18)
 174 #define USB2OTG_USB_ULPI_CLK_SUS_M                      (1 << 19)
 175 #define USB2OTG_USB_ULPIDRIVEEXTERNALVBUS               (1 << 20)
 176 #define USB2OTG_USB_ULPI_INT_VBUS_INDICATOR             (1 << 21)
 177 #define USB2OTG_USB_TSDLINEPULSEENABLE                  (1 << 22)
 178 #define USB2OTG_USB_INDICATOR_COMPLEMENT                (1 << 23)
 179 #define USB2OTG_USB_INDICATOR_PASS_THROUGH              (1 << 24)
 180 #define USB2OTG_USB_ULPI_INT_PROT_DIS                   (1 << 25)
 181 #define USB2OTG_USB_IC_USB_CAPABLE                      (1 << 26)
 182 #define USB2OTG_USB_IC_TRAFFIC_PULL_REMOVE              (1 << 27)
 183 #define USB2OTG_USB_TX_END_DELAY                        (1 << 28)
 184 #define USB2OTG_USB_FORCE_HOST_MODE                     (1 << 29)
 185 #define USB2OTG_USB_FORCE_DEV_MODE                      (1 << 30)
 186
 187 /* Bits in USB2OTG_I2CCTRL */
 188 #define USB2OTG_I2CCTRL_READWRITEDATA                   (1 << 0)
 189 #define USB2OTG_I2CCTRL_REGISTERADDRESS                 (1 << 8)
 190 #define USB2OTG_I2CCTRL_ADDRESS                         (1 << 16)
 191 #define USB2OTG_I2CCTRL_I2CENABLE                       (1 << 23)
 192 #define USB2OTG_I2CCTRL_ACKNOWLEDGE                     (1 << 24)
 193 #define USB2OTG_I2CCTRL_I2CSUSPENDCONTROL               (1 << 25)
 194 #define USB2OTG_I2CCTRL_I2CDEVICEADDRESS                (1 << 26)
 195 #define USB2OTG_I2CCTRL_READWRITE                       (1 << 30)
 196 #define USB2OTG_I2CCTRL_BSYDNE                          (1 << 31)
 197
 198 /* Bits in USB2OTG_LPMCONFIG */
 199 #define USB2OTG_LPMCONFIG_LOWPOWERMODECAPABLE           (1 << 0)
 200 #define USB2OTG_LPMCONFIG_APPLICATIONRESPONSE           (1 << 1)
 201 #define USB2OTG_LPMCONFIG_HOSTINITIATEDRESUMEDURATION   (1 << 2)
 202 #define USB2OTG_LPMCONFIG_REMOTEWAKEUPENABLED           (1 << 6)
 203 #define USB2OTG_LPMCONFIG_UTMISLEEPENABLED              (1 << 7)
 204 #define USB2OTG_LPMCONFIG_HOSTINITRESDURATIONTHRESHOLD  (1 << 8)
 205 #define USB2OTG_LPMCONFIG_LOWPOWERMODERESPONSE          (1 << 13)
 206 #define USB2OTG_LPMCONFIG_PORTSLEEPSTATUS               (1 << 15)
 207 #define USB2OTG_LPMCONFIG_SLEEPSTATERESUMEOK            (1 << 16)
 208 #define USB2OTG_LPMCONFIG_LOWPOWERMODECHANNELINDEX      (1 << 17)
 209 #define USB2OTG_LPMCONFIG_RETRYCOUNT                    (1 << 21)
 210 #define USB2OTG_LPMCONFIG_SENDLOWPOWERMODE              (1 << 24)
 211 #define USB2OTG_LPMCONFIG_RETRYCOUNTSTATUS              (1 << 25)
 212 #define USB2OTG_LPMCONFIG_HSICCONNECT                   (1 << 30)
 213 #define USB2OTG_LPMCONFIG_INVERSESELECTHSIC             (1 << 31)
 214
 215 /* Bits in USB2OTG_MDIOSTRL */
 216 #define USB2OTG_MDIOCTRL_READ                           (1 << 0)
 217 #define USB2OTG_MDIOCTRL_CLOCKRATIO                     (1 << 16)
 218 #define USB2OTG_MDIOCTRL_FREERUN                        (1 << 20)
 219 #define USB2OTG_MDIOCTRL_BITHASHENABLE                  (1 << 21)
 220 #define USB2OTG_MDIOCTRL_MDCWRITE                       (1 << 22)
 221 #define USB2OTG_MDIOCTRL_MDOWRITE                       (1 << 23)
 222 #define USB2OTG_MDIOCTRL_BUSY                           (1 << 31)
 223
 224 /* Bits in USB2OTG_MISCCTRL */
 225 #define USB2OTG_MISCCTRL_SESSIONEND                     (1 << 0)
 226 #define USB2OTG_MISCCTRL_VBUSVALID                      (1 << 1)
 227 #define USB2OTG_MISCCTRL_BSESSIONVALID                  (1 << 2)
 228 #define USB2OTG_MISCCTRL_ASESSIONVALID                  (1 << 3)
 229 #define USB2OTG_MISCCTRL_DISCHARGEVBUS                  (1 << 4)
 230 #define USB2OTG_MISCCTRL_CHARGEVBUS                     (1 << 5)
 231 #define USB2OTG_MISCCTRL_DRIVEVBUS                      (1 << 6)
 232 #define USB2OTG_MISCCTRL_DISABLEDRIVING                 (1 << 7)
 233 #define USB2OTG_MISCCTRL_VBUSIRQENABLED                 (1 << 8)
 234 #define USB2OTG_MISCCTRL_VBUSIRQ                        (1 << 9)
 235 #define USB2OTG_MISCCTRL_AXIPRIORITYLEVEL               (1 << 16)
 236
 237 #define USB2OTG_USBDEVICEMODE                           (0 << 0)
 238 #define USB2OTG_USBHOSTMODE                             (1 << 0)
 239
 240 /* Bits in USB2OTG_INTR */
 241 #define USB2OTG_INTRCORE_CURRENTMODE                    (1 << 0)
 242 #define USB2OTG_INTRCORE_MODEMISMATCH                   (1 << 1)
 243 #define USB2OTG_INTRCORE_OTG                            (1 << 2)
 244 #define USB2OTG_INTRCORE_DMASTARTOFFRAME                (1 << 3)
 245 #define USB2OTG_INTRCORE_RECEIVESTATUSLEVEL             (1 << 4)
 246 #define USB2OTG_INTRCORE_NPTRANSMITFIFOEMPTY            (1 << 5)
 247 #define USB2OTG_INTRCORE_GINNAKEFF                      (1 << 6)
 248 #define USB2OTG_INTRCORE_GOUTNAKEFF                     (1 << 7)
 249 #define USB2OTG_INTRCORE_ULPICK                         (1 << 8)
 250 #define USB2OTG_INTRCORE_I2C                            (1 << 9)
 251 #define USB2OTG_INTRCORE_EARLYSUSPEND                   (1 << 10)
 252 #define USB2OTG_INTRCORE_USBSUSPEND                     (1 << 11)
 253 #define USB2OTG_INTRCORE_USBRESET                       (1 << 12)
 254 #define USB2OTG_INTRCORE_ENUMERATIONDONE                (1 << 13)
 255 #define USB2OTG_INTRCORE_ISOCHRONOUSOUTDROP             (1 << 14)
 256 #define USB2OTG_INTRCORE_EOPFRAME                       (1 << 15)
 257 #define USB2OTG_INTRCORE_RESTOREDONE                    (1 << 16)
 258 #define USB2OTG_INTRCORE_ENDPOINTMISMATCH               (1 << 17)
 259 #define USB2OTG_INTRCORE_INENDPOINT                     (1 << 18)
 260 #define USB2OTG_INTRCORE_OUTENDPOINT                    (1 << 19)
 261 #define USB2OTG_INTRCORE_INCOMPLETEISOCHRONOUSIN        (1 << 20)
 262 #define USB2OTG_INTRCORE_INCOMPLETEISOCHRONOUSOUT       (1 << 21)
 263 #define USB2OTG_INTRCORE_FETSETUP                       (1 << 22)
 264 #define USB2OTG_INTRCORE_RESETDETECT                    (1 << 23)
 265 #define USB2OTG_INTRCORE_PORT                           (1 << 24)
 266 #define USB2OTG_INTRCORE_HOSTCHANNEL                    (1 << 25)
 267 #define USB2OTG_INTRCORE_HPTRANSMITFIFOEMPTY            (1 << 26)
 268 #define USB2OTG_INTRCORE_LPMTRANSRCVD                   (1 << 27)
 269 #define USB2OTG_INTRCORE_CONNECTIONIDSTATUSCHANGE       (1 << 28)
 270 #define USB2OTG_INTRCORE_DISCONNECT                     (1 << 29)
 271 #define USB2OTG_INTRCORE_SESSIONREQUEST                 (1 << 30)
 272 #define USB2OTG_INTRCORE_WAKEUP                         (1 << 31)
 273
 274 /* Channel Interrupt bits */
 275 #define USB2OTG_INTRCHAN_TRANSFERCOMPLETE               (1 << 0)
 276 #define USB2OTG_INTRCHAN_HALT                           (1 << 1)
 277 #define USB2OTG_INTRCHAN_AHBERROR                       (1 << 2)
 278 #define USB2OTG_INTRCHAN_STALL                          (1 << 3)
 279 #define USB2OTG_INTRCHAN_NEGATIVEACKNOWLEDGE            (1 << 4)
 280 #define USB2OTG_INTRCHAN_ACKNOWLEDGE                    (1 << 5)
 281 #define USB2OTG_INTRCHAN_NOTREADY                       (1 << 6)
 282 #define USB2OTG_INTRCHAN_TRANSACTIONERROR               (1 << 7)
 283 #define USB2OTG_INTRCHAN_BABBLEERROR                    (1 << 8)
 284 #define USB2OTG_INTRCHAN_FRAMEOVERRUN                   (1 << 9)
 285 #define USB2OTG_INTRCHAN_DATATOGGLEERROR                (1 << 10)
 286 #define USB2OTG_INTRCHAN_BUFFERNOTAVAILABLE             (1 << 11)
 287 #define USB2OTG_INTRCHAN_EXCESSIVETRANSMISSION          (1 << 12)
 288 #define USB2OTG_INTRCHAN_FRAMELISTROLLOVER              (1 << 13)
 289
 290 /* Bits in the power register */
 291 #define USB2OTG_POWER_STOPPCLOCK                        (1 << 0)
 292 #define USB2OTG_POWER_GATEHCLOCK                        (1 << 1)
 293 #define USB2OTG_POWER_POWERCLAMP                        (1 << 2)
 294 #define USB2OTG_POWER_POWERDOWNMODULES                  (1 << 3)
 295 #define USB2OTG_POWER_PHYSUSPENDED                      (1 << 4)
 296 #define USB2OTG_POWER_ENABLESLEEPCLOCKGATING            (1 << 5)
 297 #define USB2OTG_POWER_PHYSLEEPING                       (1 << 6)
 298 #define USB2OTG_POWER_DEEPSLEEP                         (1 << 7)
 299
 300 #endif  /* USB2OTG_H */