switch to super before accessing the register
[AROS.git] / arch / arm-native / kernel / getcpunumber.c
blob18c76bee742c8de6a810d40c038f95eaf0da3eab
1 /*
2 Copyright © 2015, The AROS Development Team. All rights reserved.
3 $Id$
4 */
6 #include <aros/kernel.h>
7 #include <aros/libcall.h>
9 #include "kernel_base.h"
10 #include "kernel_intern.h"
12 AROS_LH0(unsigned int, KrnGetCPUNumber,
13 struct KernelBase *, KernelBase, 37, Kernel)
15 AROS_LIBFUNC_INIT
17 register unsigned int superSP;
18 uint32_t tmp;
20 asm volatile (
21 " stmfd sp!, {lr} \n"
22 " mov r1, sp \n"
23 " swi %[swi_no] \n"
24 " mov %[superSP], sp \n"
25 " mov sp, r1 \n"
26 " ldmfd sp!, {lr} \n"
27 : [superSP] "=r" (superSP)
28 : [swi_no] "I" (6 /*SC_SUPERSTATE*/) : "r1"
31 asm volatile (" mrc p15, 0, %0, c0, c0, 5 " : "=r" (tmp));
33 if (superSP)
35 asm volatile (
36 " stmfd sp!, {lr} \n"
37 " mov r1, sp \n"
38 " mov sp, %[superSP] \n"
39 " cpsie i, %[mode_user] \n"
40 " mov sp, r1 \n"
41 " ldmfd sp!, {lr} \n"
42 : : [superSP] "r" (superSP), [mode_user] "I" (CPUMODE_USER) : "r1" );
45 if (tmp & (2 << 30))
47 return (tmp & 0x3);
50 // Uniprocessor System
51 return 0;
53 AROS_LIBFUNC_EXIT
56 AROS_LH1(unsigned int, KrnGetCPUMask,
57 AROS_LHA(uint32_t, id, D0),
58 struct KernelBase *, KernelBase, 37, Kernel)
60 AROS_LIBFUNC_INIT
62 int shift = 0;
65 return (1 << shift);
67 AROS_LIBFUNC_EXIT