arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c

   1 /*
   2     Copyright � 2013-2015, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #define DEBUG 0
   7
   8 #include <aros/macros.h>
   9 #include <aros/debug.h>
  10 #include <aros/symbolsets.h>
  11 #include <aros/libcall.h>
  12 #include <proto/kernel.h>
  13 #include <proto/exec.h>
  14 #include <proto/mbox.h>
  15
  16 #include <hardware/bcm2708.h>
  17 #include <hardware/videocore.h>
  18
  19 #include "mbox_private.h"
  20
  21
  22 static int mbox_init(struct MBoxBase *MBoxBase)
  23 {
  24     int retval = TRUE;
  25
  26     D(bug("[MBox] mbox_init()\n"));
  27
  28     InitSemaphore(&MBoxBase->mbox_Sem);
  29
  30     D(bug("[MBox] mbox_init: Initialised Semaphore @ 0x%p\n", &MBoxBase->mbox_Sem));
  31
  32     return retval;
  33 }
  34
  35 AROS_LH1(unsigned int, MBoxStatus,
  36                 AROS_LHA(void *, mb, A0),
  37                 struct MBoxBase *, MBoxBase, 1, Mbox)
  38 {
  39     AROS_LIBFUNC_INIT
  40
  41     D(bug("[MBox] MBoxStatus(0x%p)\n", mb));
  42
  43     return AROS_LE2LONG(*((volatile unsigned int *)(mb + VCMB_STATUS)));
  44
  45     AROS_LIBFUNC_EXIT
  46 }
  47
  48 AROS_LH2(volatile unsigned int *, MBoxRead,
  49                 AROS_LHA(void *, mb, A0),
  50                 AROS_LHA( unsigned int, chan, D0),
  51                 struct MBoxBase *, MBoxBase, 2, Mbox)
  52 {
  53     AROS_LIBFUNC_INIT
  54
  55     unsigned int try = 0x2000000;
  56     unsigned int msg;
  57
  58     D(bug("[MBox] MBoxRead(chan %d @ 0x%p)\n", chan, mb));
  59
  60     if (chan <= VCMB_CHAN_MAX)
  61     {
  62         while(1)
  63         {
  64             ObtainSemaphore(&MBoxBase->mbox_Sem);
  65
  66             while ((MBoxStatus(mb) & VCMB_STATUS_READREADY) != 0)
  67             {
  68                 /* Data synchronization barrier */
  69                 asm volatile ("mcr p15, 0, %[r], c7, c10, 4" : : [r] "r" (0) );
  70
  71                 if(try-- == 0)
  72                 {
  73                     break;
  74                 }
  75             }
  76             asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) );
  77
  78             msg = AROS_LE2LONG(*((volatile unsigned int *)(mb + VCMB_READ)));
  79
  80             asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) );
  81
  82             ReleaseSemaphore(&MBoxBase->mbox_Sem);
  83
  84             if ((msg & VCMB_CHAN_MASK) == chan)
  85                 return (volatile unsigned int *)(msg & ~VCMB_CHAN_MASK);
  86         }
  87     }
  88     return (volatile unsigned int *)-1;
  89
  90     AROS_LIBFUNC_EXIT
  91 }
  92
  93 AROS_LH3(void, MBoxWrite,
  94                 AROS_LHA(void *, mb, A0),
  95                 AROS_LHA( unsigned int, chan, D0),
  96                 AROS_LHA(void *, msg, A1),
  97                 struct MBoxBase *, MBoxBase, 3, Mbox)
  98 {
  99     AROS_LIBFUNC_INIT
 100
 101     D(bug("[MBOX] MBoxWrite(chan %d @ 0x%p, msg @ 0x%p)\n", chan, mb, msg));
 102
 103     if ((((unsigned int)msg & VCMB_CHAN_MASK) == 0) && (chan <= VCMB_CHAN_MAX))
 104     {
 105         ULONG length = AROS_LE2LONG(((ULONG *)msg)[0]);
 106
 107         void *phys_addr = CachePreDMA(msg, &length, DMA_ReadFromRAM);
 108
 109         ObtainSemaphore(&MBoxBase->mbox_Sem);
 110
 111         while ((MBoxStatus(mb) & VCMB_STATUS_WRITEREADY) != 0)
 112         {
 113             /* Data synchronization barrier */
 114             asm volatile ("mcr p15, 0, %[r], c7, c10, 4" : : [r] "r" (0) );
 115         }
 116
 117         asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) );
 118
 119         *((volatile unsigned int *)(mb + VCMB_WRITE)) = AROS_LONG2LE(((unsigned int)phys_addr | chan));
 120
 121         ReleaseSemaphore(&MBoxBase->mbox_Sem);
 122     }
 123
 124     AROS_LIBFUNC_EXIT
 125 }
 126
 127 ADD2INITLIB(mbox_init, 0)