rom/hidds/hidd.pci/pciutil.c

   1 /*
   2     Copyright © 1995-2001, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: PCI utility functions
   6     Lang: english
   7 */
   8
   9 #include <exec/types.h>
  10 #include <exec/lists.h>
  11 #include <exec/memory.h>
  12 #include <proto/exec.h>
  13 #include <proto/oop.h>
  14 #include <oop/oop.h>
  15 #include <utility/utility.h>
  16 #include <hidd/pci.h>
  17
  18 #include "pci.h"
  19 #include "pciutil.h"
  20
  21 #undef  SDEBUG
  22 #undef  DEBUG
  23 #define DEBUG 0
  24 #include <aros/debug.h>
  25
  26 /*
  27   Fetch text descriptions of the different PCI device classes
  28 */
  29 void getPCIClassDesc( UBYTE class, UBYTE sub, UBYTE prgif, STRPTR *cdesc, STRPTR *sdesc, STRPTR *pdesc )
  30 {
  31     ULONG i;
  32
  33     *cdesc = *sdesc = *pdesc = "";
  34
  35     for (i=0;i < PCI_CLASSTABLE_LEN; i++)
  36     {
  37         if (PCI_ClassTable[i].Baseclass == class)
  38         {
  39             if ( !(**cdesc))
  40             {
  41                 *cdesc = PCI_ClassTable[i].Basedesc;
  42             }
  43             if (PCI_ClassTable[i].Subclass == sub)
  44             {
  45                 if ( !(**sdesc))
  46                 {
  47                     *sdesc = PCI_ClassTable[i].Subdesc;
  48                 }
  49                 if (PCI_ClassTable[i].Prgif == prgif)
  50                 {
  51                     if ( !(**pdesc))
  52                     {
  53                         *pdesc = PCI_ClassTable[i].Prgifdesc;
  54                     }
  55                 }
  56             }
  57         }
  58     }
  59 }
  60
  61 /*
  62  * Size a base register
  63  * Return size of the base register area
  64  */
  65 ULONG sizePCIBaseReg(OOP_Object *driver, struct pci_staticdata *psd, UBYTE bus, UBYTE dev, UBYTE func, UBYTE basenum )
  66 {
  67     ULONG bak,sz;
  68     struct pHidd_PCIDriver_ReadConfigLong msgr;
  69     struct pHidd_PCIDriver_WriteConfigLong msgw;
  70
  71     if (!psd->mid_RL) psd->mid_RL
  72             = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_ReadConfigLong);
  73     if (!psd->mid_WL) psd->mid_WL
  74             = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_WriteConfigLong);
  75
  76     msgr.mID = psd->mid_RL;
  77     msgr.bus = bus;
  78     msgr.dev = dev;
  79     msgr.sub = func;
  80     msgr.reg = PCICS_BAR0 + (basenum << 2);
  81
  82     msgw.mID = psd->mid_WL;
  83     msgw.bus = bus;
  84     msgw.dev = dev;
  85     msgw.sub = func;
  86     msgw.reg = PCICS_BAR0 + (basenum << 2);
  87
  88     bak = OOP_DoMethod(driver, (OOP_Msg)&msgr);
  89     msgw.val = ~0;
  90     OOP_DoMethod(driver, (OOP_Msg)&msgw);
  91     sz = OOP_DoMethod(driver, (OOP_Msg)&msgr);
  92     msgw.val = bak;
  93     OOP_DoMethod(driver, (OOP_Msg)&msgw);
  94
  95     if ((sz & PCIBAR_MASK_TYPE) == PCIBAR_TYPE_IO)
  96     {
  97         /* This is an IO range */
  98         sz &= PCIBAR_MASK_IO;
  99         sz = ~sz;
 100         sz++;
 101         /* Upper 16 bits of result is ignored if BAR is for I/O *AND* bits 16-31 returned zero upon read */
 102         if(!(bak>>16)) sz &= 0xffff;
 103     }
 104     else
 105     {
 106         /* This is memory mapped */
 107         sz &= PCIBAR_MASK_MEM;
 108         sz = ~sz;
 109         sz++;
 110     }
 111     return (sz);
 112 }