don't try to link with ssl when testing for connect (unnecessary)
[AROS-Contrib.git] / Misc / berger / addressingmodes.c
blob4985dbb6b756eef265fe852b5a344478dc3cc9ed
1 #include <exec/types.h>
3 #include "debug.h"
4 #include "endianess.h"
5 #include "m68k.h"
7 extern struct M68k CPU;
9 ULONG read_addressing_mode(UBYTE mode_field, UBYTE reg_field, UBYTE size)
11 ULONG val;
12 ULONG addr;
14 switch (mode_field)
16 case 0:
18 #ifdef DEBUGGING
19 switch (size)
21 case 0: /* BYTE */
22 SHOW_OPCODE(".b D%d",reg_field);
23 break;
25 case 1: /* WORD */
26 SHOW_OPCODE(".w D%d",reg_field);
27 break;
29 case 2: /* LONG */
30 SHOW_OPCODE(".l D%d",reg_field);
31 break;
33 #endif
35 return (ULONG) CPU.D[reg_field];
36 break;
38 case 1:
39 SHOW_OPCODE(".l A%d",reg_field);
40 return CPU.A[reg_field];
41 break;
43 case 2: /* (Ax) */
45 switch (size)
47 case 0: /* BYTE */
48 SHOW_OPCODE(".b (A%d)",reg_field);
49 return *(UBYTE *)CPU.A[reg_field];
50 break;
52 case 1: /* WORD */
53 SHOW_OPCODE(".w (A%d)",reg_field);
54 return SWAP_WORD(*(UWORD *)CPU.A[reg_field]);
55 break;
57 case 2: /* LONG */
58 SHOW_OPCODE(".l (A%d)",reg_field);
59 return SWAP(*(ULONG *)CPU.A[reg_field]);
60 break;
62 break;
64 case 3: /* (Ax)+ */
66 switch (size)
68 case 0: /* BYTE */
69 SHOW_OPCODE(".b (A%d)+",reg_field);
70 val = *(UBYTE *)CPU.A[reg_field];
71 CPU.A[reg_field]+=1;
72 return val;
73 break;
75 case 1: /* WORD */
76 SHOW_OPCODE(".w (A%d)+",reg_field);
77 val = *(UWORD *)CPU.A[reg_field];
78 CPU.A[reg_field]+=2;
79 return SWAP_WORD(val);
80 break;
82 case 2: /* LONG */
83 SHOW_OPCODE(".l (A%d)+",reg_field);
84 val = *(ULONG *)CPU.A[reg_field];
85 CPU.A[reg_field]+=4;
86 return SWAP(val);
87 break;
89 break;
91 case 4: /* -(Ax) */
92 switch (size)
94 case 0: /* BYTE */
95 SHOW_OPCODE(".b -(A%d)",reg_field);
96 CPU.A[reg_field]-=1;
97 return *(UBYTE *)CPU.A[reg_field];
98 break;
100 case 1: /* WORD */
101 SHOW_OPCODE(".w -(A%d)",reg_field);
102 CPU.A[reg_field]-=2;
103 return SWAP_WORD(*(UWORD *)CPU.A[reg_field]);
104 break;
106 case 2: /* LONG */
107 SHOW_OPCODE(".l -(A%d)",reg_field);
108 CPU.A[reg_field]-=4;
109 return SWAP(*(ULONG *)CPU.A[reg_field]);
110 break;
112 break;
115 case 5: /* (d16, An) */
117 LONG disp = (LONG)SWAP_WORD(*(WORD *)(CPU.PC+2));
118 CPU.instsize +=2;
119 switch (size)
121 case 0:
122 SHOW_OPCODE(".b (%d,A%d)",disp,reg_field);
123 return *(UBYTE *)(CPU.A[reg_field]+disp);
124 break;
126 case 1:
127 SHOW_OPCODE(".w (%d,A%d)",disp,reg_field);
128 return SWAP_WORD(*(UWORD *)(CPU.A[reg_field]+disp));
129 break;
131 case 2:
132 SHOW_OPCODE(".l (%d,A%d)",disp,reg_field);
133 return SWAP(*(ULONG *)(CPU.A[reg_field]+disp));
134 break;
137 break;
139 case 6: /* (d8, An, Xn) */
141 UBYTE reg_field2 = (*(UBYTE *)(CPU.PC+2));
142 CPU.instsize +=2;
144 if (reg_field2 & 0x8)
145 addr = CPU.D[reg_field2>>4];
146 else
147 addr = (LONG)(WORD)((WORD *)&CPU.D[reg_field2>>4])[L_WORD];
149 addr += (LONG)(WORD)(*(BYTE *)(CPU.PC+3)) + CPU.A[reg_field];
151 switch (size)
153 case 0:
154 SHOW_OPCODE(".b (%d,A%d,X%d)",*(UBYTE *)(CPU.PC+2),reg_field,reg_field2>>4);
155 return *(UBYTE *)addr;
156 break;
158 case 1:
159 SHOW_OPCODE(".w (%d,A%d,X%d)",*(UBYTE *)(CPU.PC+2),reg_field,reg_field2>>4);
160 return SWAP_WORD(*(UWORD *)addr);
161 break;
163 case 2:
164 SHOW_OPCODE(".l (%d,A%d,X%d)",*(UBYTE *)(CPU.PC+2),reg_field,reg_field2>>4);
165 return SWAP(*(ULONG *)addr);
166 break;
169 break;
171 case 7:
172 switch (reg_field)
174 case 0: /* (xxx).w */
175 CPU.instsize += 2;
176 val = (ULONG)(UWORD)SWAP_WORD(*(UWORD *)(CPU.PC+2));
177 switch (size)
179 case 0:
180 SHOW_OPCODE(".b 0x%x",val);
181 return (*(UBYTE *)val);
182 break;
184 case 1:
185 SHOW_OPCODE(".w 0x%x",val);
186 return SWAP_WORD(*(UWORD *)val);
187 break;
189 case 2:
190 SHOW_OPCODE(".l 0x%x",val);
191 return SWAP(*(ULONG *)val);
192 break;
194 break;
196 case 1: /* (xxx).l */
197 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+2));
198 SHOW_OPCODE(" 0x%x",val);
199 CPU.instsize += 4;
200 switch (size)
202 case 0:
203 SHOW_OPCODE(".b 0x%x",val);
204 return (*(UBYTE *)val);
205 break;
207 case 1:
208 SHOW_OPCODE(".w 0x%x",val);
209 return SWAP_WORD(*(UWORD *)val);
210 break;
212 case 2:
213 SHOW_OPCODE(".l 0x%x",val);
214 return SWAP(*(ULONG *)val);
215 break;
217 break;
219 case 2: /* (d16, PC) */
220 CPU.instsize += 2;
221 val = SWAP_WORD(*(UWORD *)(CPU.PC+2));
222 switch (size)
224 case 0x00:
225 SHOW_OPCODE(".b (%d,PC) [???]",val);
226 return (ULONG)(UBYTE)(*(UBYTE *)(val+CPU.PC+CPU.instsize));
227 break;
229 case 0x01:
230 SHOW_OPCODE(".w (%d,PC) [???]",val);
231 return (UWORD)SWAP_WORD(*(UWORD *)(val+CPU.PC+CPU.instsize));
232 break;
234 case 0x02:
235 SHOW_OPCODE(".l (%d,PC) [???]",val);
236 return SWAP(*(ULONG *)(val+CPU.PC+CPU.instsize));
237 break;
239 break;
241 case 3: /* (d8, PC, Xn) */
243 reg_field = (*(UBYTE *)(CPU.PC+2));
245 CPU.instsize += 2;
247 if (reg_field & 0x08)
248 addr = CPU.D[reg_field>>4];
249 else
250 addr = ((UWORD *)&CPU.D[reg_field>>4])[L_WORD];
252 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+3)) + CPU.PC +2;
254 switch (size)
256 case 0x00:
257 SHOW_OPCODE(".b (%d,PC,X%d)",*(BYTE *)(CPU.PC+3),reg_field);
258 return (ULONG)(UBYTE)(*(UBYTE *)addr);
259 break;
261 case 0x01:
262 SHOW_OPCODE(".w (%d,PC,X%d)",*(BYTE *)(CPU.PC+3),reg_field);
263 return (ULONG)(UWORD)SWAP_WORD(*(UWORD *)addr);
264 break;
266 case 0x02:
267 SHOW_OPCODE(".l (%d,PC,X%d)",*(BYTE *)(CPU.PC+3),reg_field);
268 return SWAP(*(ULONG *)addr);
269 break;
272 break;
274 case 4: /* <#data> */
275 switch (size)
277 case 0:
278 val = SWAP_WORD(*(UWORD *)(CPU.PC+2));
279 CPU.instsize += 2;
280 SHOW_OPCODE(".b #0x%02x",val);
281 return val;
282 break;
284 case 1:
285 val = SWAP_WORD(*(UWORD *)(CPU.PC+2));
286 CPU.instsize += 2;
287 SHOW_OPCODE(".w #0x%04x",val);
288 return (UWORD)val;
289 break;
291 case 2:
292 val = SWAP(*(ULONG *)(CPU.PC+2));
293 CPU.instsize += 4;
294 SHOW_OPCODE(".l #0x%08x",val);
295 return val;
296 break;
298 break;
300 break;
304 SHOW_OPCODE("\nunrecognized! -->mode_field: %d, reg_field: %d, size : %d\n",mode_field,reg_field,size);
306 return 0xdeadbeef;
310 ULONG read_addressing_mode_nochange(UBYTE mode_field, UBYTE reg_field, UBYTE size)
312 ULONG addr;
313 ULONG val;
315 switch (mode_field)
317 case 0: return (ULONG) CPU.D[reg_field];
318 break;
320 case 1: return CPU.A[reg_field];
321 break;
323 case 2: /* (Ax) */
324 switch (size)
326 case 0: /* BYTE */
327 return *(UBYTE *)CPU.A[reg_field];
328 break;
330 case 1: /* WORD */
331 return SWAP_WORD(*(UWORD *)CPU.A[reg_field]);
332 break;
334 case 2: /* LONG */
335 return SWAP(*(ULONG *)CPU.A[reg_field]);
336 break;
338 break;
340 case 3: /* (Ax)+ */
342 switch (size)
344 case 0: /* BYTE */
345 return *(UBYTE *)CPU.A[reg_field];
346 break;
348 case 1: /* WORD */
349 return SWAP_WORD(*(UWORD *)CPU.A[reg_field]);
350 break;
352 case 2: /* LONG */
353 return SWAP(*(ULONG *)CPU.A[reg_field]);
354 break;
356 break;
358 case 4: /* -(Ax) */
359 switch (size)
361 case 0: /* BYTE */
362 return *(UBYTE *)(CPU.A[reg_field]-1);
363 break;
365 case 2: /* LONG */
366 return SWAP(*(ULONG *)(CPU.A[reg_field])-2);
367 break;
369 case 1: /* WORD */
370 return SWAP_WORD(*(UWORD *)(CPU.A[reg_field])-4);
371 break;
373 break;
375 case 5: /* (d16, An) */
377 LONG disp = (LONG)SWAP_WORD(*(WORD *)(CPU.PC+2));
378 switch (size)
380 case 0:
381 return *(UBYTE *)(CPU.A[reg_field]+disp);
382 break;
384 case 1:
385 return SWAP_WORD(*(UWORD *)(CPU.A[reg_field]+disp));
386 break;
388 case 2:
389 return SWAP(*(ULONG *)(CPU.A[reg_field]+disp));
390 break;
393 break;
395 case 6: /* (d8, An, Xn) */
397 UBYTE reg_field2 = (*(UBYTE *)(CPU.PC+2));
399 if (reg_field2 & 0x8)
400 addr = CPU.D[reg_field2>>4];
401 else
402 addr = (LONG)(WORD)((WORD *)&CPU.D[reg_field2>>4]);
404 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+3)) + CPU.A[reg_field];
406 switch (size)
408 case 0:
409 return *(UBYTE *)addr;
410 break;
412 case 1:
413 return SWAP_WORD(*(UWORD *)addr);
414 break;
416 case 2:
417 return SWAP(*(ULONG *)addr);
418 break;
421 break;
423 case 7:
424 switch (reg_field)
426 case 0: /* (xxx).w */
427 val = (ULONG)(UWORD)SWAP_WORD(*(UWORD *)(CPU.PC+2));
428 switch (size)
430 case 0:
431 return (*(UBYTE *)val);
432 break;
434 case 1:
435 return SWAP_WORD(*(UWORD *)val);
436 break;
438 case 2:
439 return SWAP(*(ULONG *)val);
440 break;
442 break;
444 case 1: /* (xxx).l */
445 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+2));
446 switch (size)
448 case 0:
449 return (*(UBYTE *)val);
450 break;
452 case 1:
453 return SWAP_WORD(*(UWORD *)val);
454 break;
456 case 2:
457 return SWAP(*(ULONG *)val);
458 break;
460 break;
462 case 2: /* (d16, PC) */
463 val = SWAP_WORD(*(UWORD *)(CPU.PC+2));
464 switch (size)
466 case 0x00:
467 return (ULONG)(UBYTE)(*(UBYTE *)(val+CPU.PC+2));
468 break;
470 case 0x01:
471 return (UWORD)SWAP_WORD(*(UWORD *)(val+CPU.PC+2));
472 break;
474 case 0x02:
475 return SWAP(*(ULONG *)(val+CPU.PC+2));
476 break;
478 break;
480 case 3: /* (d8, PC, Xn) */
482 reg_field = (*(UBYTE *)(CPU.PC+2));
484 if (reg_field & 0x8)
485 addr = CPU.A[reg_field >> 4];
486 else
487 addr = (LONG)(WORD)((WORD *)&CPU.A[reg_field >> 4])[L_WORD];
489 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+3))+ CPU.PC + 2;
491 switch (size)
493 case 0x00:
494 return (ULONG)(UBYTE)(*(UBYTE *)addr);
495 break;
497 case 0x01:
498 return (UWORD)SWAP_WORD(*(UWORD *)addr);
499 break;
501 case 0x02:
502 return SWAP(*(ULONG *)addr);
503 break;
506 break;
508 case 4: /* <#data> */
509 switch (size)
511 case 0:
512 val = SWAP_WORD(*(UWORD *)(CPU.PC+2));
513 return val;
514 break;
516 case 1:
517 val = SWAP_WORD(*(UWORD *)(CPU.PC+2));
518 return (UWORD)val;
519 break;
521 case 2:
522 val = SWAP(*(ULONG *)(CPU.PC+2));
523 return val;
524 break;
526 break;
528 break;
533 SHOW_OPCODE("\nunrecognized! -->mode_field: %d, reg_field: %d\n",mode_field,reg_field);
535 return 0xdeadbeef;
538 ULONG read_addressing_mode_offset(UBYTE mode_field, UBYTE reg_field, UBYTE size)
540 ULONG val;
541 LONG addr;
543 switch (mode_field)
545 case 0:
547 #ifdef DEBUGGING
548 switch (size)
550 case 0: /* BYTE */
551 SHOW_OPCODE(".b D%d",reg_field);
552 break;
554 case 1: /* WORD */
555 SHOW_OPCODE(".w D%d",reg_field);
556 break;
558 case 2: /* LONG */
559 SHOW_OPCODE(".l D%d",reg_field);
560 break;
562 #endif
564 return (ULONG) CPU.D[reg_field];
565 break;
567 case 1:
568 SHOW_OPCODE(".l A%d",reg_field);
569 return CPU.A[reg_field];
570 break;
572 case 2: /* (Ax) */
574 switch (size)
576 case 0: /* BYTE */
577 SHOW_OPCODE(".b (A%d)",reg_field);
578 return *(UBYTE *)CPU.A[reg_field];
579 break;
581 case 1: /* WORD */
582 SHOW_OPCODE(".w (A%d)",reg_field);
583 return SWAP_WORD(*(UWORD *)CPU.A[reg_field]);
584 break;
586 case 2: /* LONG */
587 SHOW_OPCODE(".l (A%d)",reg_field);
588 return SWAP(*(ULONG *)CPU.A[reg_field]);
589 break;
591 break;
593 case 3: /* (Ax)+ */
595 switch (size)
597 case 0: /* BYTE */
598 SHOW_OPCODE(".b (A%d)+",reg_field);
599 val = *(UBYTE *)CPU.A[reg_field];
600 CPU.A[reg_field]+=1;
601 return val;
602 break;
604 case 1: /* WORD */
605 SHOW_OPCODE(".w (A%d)+",reg_field);
606 val = *(UWORD *)CPU.A[reg_field];
607 CPU.A[reg_field]+=2;
608 return SWAP_WORD(val);
609 break;
611 case 2: /* LONG */
612 SHOW_OPCODE(".l (A%d)+",reg_field);
613 val = *(ULONG *)CPU.A[reg_field];
614 CPU.A[reg_field]+=4;
615 return SWAP(val);
616 break;
618 break;
620 case 4: /* -(Ax) */
621 switch (size)
623 case 0: /* BYTE */
624 SHOW_OPCODE(".b -(A%d)",reg_field);
625 CPU.A[reg_field]-=1;
626 return *(UBYTE *)CPU.A[reg_field];
627 break;
629 case 1: /* WORD */
630 SHOW_OPCODE(".w -(A%d)",reg_field);
631 CPU.A[reg_field]-=2;
632 return SWAP_WORD(*(UWORD *)CPU.A[reg_field]);
633 break;
635 case 2: /* LONG */
636 SHOW_OPCODE(".l -(A%d)",reg_field);
637 CPU.A[reg_field]-=4;
638 return SWAP(*(ULONG *)CPU.A[reg_field]);
639 break;
641 break;
644 case 5: /* (d16, An) */
646 LONG disp;
647 CPU.instsize +=2;
648 switch (size)
650 case 0:
651 disp = (LONG)SWAP_WORD(*(WORD *)(CPU.PC+4));
652 SHOW_OPCODE(" (%d,A%d)",disp,reg_field);
653 return *(UBYTE *)(CPU.A[reg_field]+disp);
654 break;
656 case 1:
657 disp = (LONG)SWAP_WORD(*(WORD *)(CPU.PC+4));
658 SHOW_OPCODE(" (%d,A%d)",disp,reg_field);
659 return SWAP_WORD(*(UWORD *)(CPU.A[reg_field]+disp));
660 break;
662 case 2:
663 disp = (LONG)SWAP_WORD(*(WORD *)(CPU.PC+6));
664 SHOW_OPCODE(" (%d,A%d)",disp,reg_field);
665 return SWAP(*(ULONG *)CPU.A[reg_field]+disp);
666 break;
669 break;
671 case 6: /* (d8, An, Xn) */
673 UBYTE reg_field2;
674 CPU.instsize += 2;
676 addr = CPU.A[reg_field];
678 switch (size)
680 case 0: /* BYTE */
681 reg_field2 = (*(UBYTE *)(CPU.PC+4));
683 if (reg_field2 & 0x8)
684 addr += CPU.D[reg_field2>>4];
685 else
686 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field2>>4])[L_WORD];
688 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5));
689 SHOW_OPCODE(" (%d,A%d,X%d)",*(BYTE *)(CPU.PC+5),reg_field,reg_field2>>4);
690 return *(UBYTE *)addr;
691 break;
693 case 1: /* WORD */
694 reg_field2 = (*(UBYTE *)(CPU.PC+4));
696 if (reg_field2 & 0x8)
697 addr += CPU.D[reg_field2>>4];
698 else
699 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field2>>4])[L_WORD];
701 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5));
702 SHOW_OPCODE(" (%d,A%d,X%d)",*(BYTE*)(CPU.PC+5),reg_field,reg_field2>>4);
703 return SWAP_WORD(*(UWORD *)addr);
704 break;
706 case 2: /* LONG */
707 reg_field2 = (*(UBYTE *)(CPU.PC+4));
709 if (reg_field2 & 0x8)
710 addr += CPU.D[reg_field2>>4];
711 else
712 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field2>>4])[L_WORD];
714 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+7));
715 SHOW_OPCODE(" (%d,A%d,X%d)",*(BYTE *)(CPU.PC+7),reg_field,reg_field2>>4);
716 return SWAP(*(ULONG *)addr);
717 break;
720 break;
722 case 7:
724 switch (reg_field)
726 case 0: /* (xxx).W */
727 CPU.instsize+=2;
728 switch (size)
730 case 0:
731 val = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+4));
732 SHOW_OPCODE(" 0x%x",val);
733 return *(UBYTE *)val;
734 break;
736 case 1:
737 val = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+4));
738 SHOW_OPCODE(" 0x%x",val);
739 return SWAP_WORD(*(UWORD *)val);
740 break;
742 case 2:
743 val = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+6));
744 SHOW_OPCODE(" 0x%x",val);
745 return SWAP(*(ULONG *)val);
746 break;
748 break;
750 case 1: /* (xxx).L */
751 CPU.instsize+=4;
752 switch (size)
754 case 0:
755 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+4));
756 SHOW_OPCODE(" 0x%x",val);
757 return *(UBYTE *)val;
758 break;
760 case 1:
761 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+4));
762 SHOW_OPCODE(" 0x%x",val);
763 return SWAP_WORD(*(UWORD *)val);
764 break;
766 case 2:
767 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+6));
768 SHOW_OPCODE(" 0x%x",val);
769 return SWAP(*(ULONG *)val);
770 break;
772 break;
774 case 2: /* (d16, PC) */
775 CPU.instsize += 2;
776 switch (size)
778 case 0x00:
779 val = SWAP_WORD(*(UWORD *)(CPU.PC+4));
780 SHOW_OPCODE(".b (%d,PC) [Addresscalculation!!]",val);
781 return (*(UBYTE *)(val+CPU.PC+6));
782 break;
784 case 0x01:
785 val = SWAP_WORD(*(UWORD *)(CPU.PC+4));
786 SHOW_OPCODE(".w (%d,PC) [Addresscalculation!!]",val);
787 return SWAP_WORD(*(UWORD *)(val+CPU.PC+6));
788 break;
790 case 0x02:
791 val = SWAP_WORD(*(UWORD *)(CPU.PC+6));
792 SHOW_OPCODE(".l (%d,PC) [Addresscalculation!!]",val);
793 return SWAP(*(ULONG *)(val+CPU.PC+6));
794 break;
796 break;
798 case 3: /* (d8, PC, Xn) */
800 CPU.instsize += 2;
801 switch (size)
803 case 0x00:
804 reg_field = *(UBYTE *)(CPU.PC+4);
805 if (reg_field & 0x8)
806 addr = CPU.D[reg_field>>4];
807 else
808 addr = (LONG)(WORD)((WORD *)&CPU.D[reg_field>>4])[L_WORD];
809 addr = (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5)) + 2 + CPU.PC;
810 SHOW_OPCODE(".b (%d,PC,X%d) [Addresscalculation!!]",*(UBYTE *)(CPU.PC+5),reg_field>>4);
811 return (*(UBYTE *)addr);
812 break;
814 case 0x01:
815 reg_field = *(UBYTE *)(CPU.PC+4);
816 if (reg_field & 0x8)
817 addr = CPU.D[reg_field>>4];
818 else
819 addr = (LONG)(WORD)((WORD *)&CPU.D[reg_field>>4])[L_WORD];
820 addr = (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5)) + 2 + CPU.PC;
821 SHOW_OPCODE(".w (%d,PC,X%d) [Addresscalculation!!]",*(UBYTE *)(CPU.PC+5),reg_field>>4);
822 return SWAP_WORD(*(UWORD *)addr);
823 break;
825 case 0x02:
826 reg_field = *(UBYTE *)(CPU.PC+6);
827 if (reg_field & 0x8)
828 addr = CPU.D[reg_field>>4];
829 else
830 addr = (LONG)(WORD)((WORD *)&CPU.D[reg_field>>4])[L_WORD];
831 addr = (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+7)) + 2 + CPU.PC;
832 SHOW_OPCODE(".w (%d,PC,X%d) [Addresscalculation!!]",*(UBYTE *)(CPU.PC+7),reg_field>>4);
833 return SWAP(*(ULONG *)addr);
834 break;
837 break;
839 case 4: /* <#data> */
840 switch (size)
842 case 0:
843 val = SWAP_WORD(*(UWORD *)(CPU.PC+4));
844 CPU.instsize += 2;
845 SHOW_OPCODE(".b 0x%02x",val);
846 return val;
847 break;
849 case 1:
850 val = SWAP_WORD(*(UWORD *)(CPU.PC+4));
851 CPU.instsize += 2;
852 SHOW_OPCODE(".w 0x%04x",val);
853 return (UWORD)val;
854 break;
856 case 2:
857 val = SWAP(*(ULONG *)(CPU.PC+6));
858 CPU.instsize += 4;
859 SHOW_OPCODE(".l 0x%08x",val);
860 return val;
861 break;
863 break;
865 break;
869 SHOW_OPCODE("\nunrecognized! -->mode_field: %d, reg_field: %d, size : %d\n",mode_field,reg_field,size);
871 return 0xdeadbeef;
875 ULONG read_addressing_mode_nochange_offset(UBYTE mode_field, UBYTE reg_field, UBYTE size)
877 ULONG addr;
878 ULONG val;
880 switch (mode_field)
882 case 0: return (ULONG) CPU.D[reg_field];
883 break;
885 case 1: return CPU.A[reg_field];
886 break;
888 case 2: /* (Ax) */
889 switch (size)
891 case 0: /* BYTE */
892 return *(UBYTE *)CPU.A[reg_field];
893 break;
895 case 1: /* WORD */
896 return SWAP_WORD(*(UWORD *)CPU.A[reg_field]);
897 break;
899 case 2: /* LONG */
900 return SWAP(*(ULONG *)CPU.A[reg_field]);
901 break;
903 break;
905 case 3: /* (Ax)+ */
907 switch (size)
909 case 0: /* BYTE */
910 return *(UBYTE *)CPU.A[reg_field];
911 break;
913 case 1: /* WORD */
914 return SWAP_WORD(*(UWORD *)CPU.A[reg_field]);
915 break;
917 case 2: /* LONG */
918 return SWAP(*(ULONG *)CPU.A[reg_field]);
919 break;
921 break;
923 case 4: /* -(Ax) */
924 switch (size)
926 case 0: /* BYTE */
927 return *(UBYTE *)(CPU.A[reg_field]-1);
928 break;
930 case 2: /* LONG */
931 return SWAP(*(ULONG *)(CPU.A[reg_field])-2);
932 break;
934 case 1: /* WORD */
935 return SWAP_WORD(*(UWORD *)(CPU.A[reg_field])-4);
936 break;
938 break;
940 case 5: /* (d16, An) */
942 LONG disp;
943 CPU.instsize +=2;
944 switch (size)
946 case 0:
947 disp = (LONG)SWAP_WORD(*(WORD *)(CPU.PC+4));
948 SHOW_OPCODE(" (%d,A%d)",disp,reg_field);
949 return *(UBYTE *)(CPU.A[reg_field]+disp);
950 break;
952 case 1:
953 disp = (LONG)SWAP_WORD(*(WORD *)(CPU.PC+4));
954 SHOW_OPCODE(" (%d,A%d)",disp,reg_field);
955 return SWAP_WORD(*(UWORD *)(CPU.A[reg_field]+disp));
956 break;
958 case 2:
959 disp = (LONG)SWAP_WORD(*(WORD *)(CPU.PC+6));
960 SHOW_OPCODE(" (%d,A%d)",disp,reg_field);
961 return SWAP(*(ULONG *)CPU.A[reg_field]+disp);
962 break;
965 break;
967 case 6: /* (d8, An, Xn) */
969 UBYTE reg_field2;
971 addr = CPU.A[reg_field];
973 switch (size)
975 case 0: /* BYTE */
976 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5));
977 reg_field2 = (*(UBYTE *)(CPU.PC+4));
979 if (reg_field2 & 0x08)
980 addr += CPU.D[reg_field2 >> 4];
981 else
982 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field2>>4])[L_WORD];
984 SHOW_OPCODE(" (%d,A%d,X%d)",*(BYTE *)(CPU.PC+5),reg_field,reg_field2>>4);
985 return *(UBYTE *)addr;
986 break;
988 case 1: /* WORD */
989 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5));
990 reg_field2 = (*(UBYTE *)(CPU.PC+4));
992 if (reg_field2 & 0x08)
993 addr += CPU.D[reg_field2 >> 4];
994 else
995 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field2>>4])[L_WORD];
997 SHOW_OPCODE(" (%d,A%d,X%d)",*(BYTE *)(CPU.PC+5),reg_field,reg_field2>>4);
998 return SWAP_WORD(*(UWORD *)addr);
999 break;
1001 case 2: /* LONG */
1002 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+7));
1003 reg_field2 = (*(UBYTE *)(CPU.PC+6));
1005 if (reg_field2 & 0x08)
1006 addr += CPU.D[reg_field2 >> 4];
1007 else
1008 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field2>>4])[L_WORD];
1010 SHOW_OPCODE(" (%d,A%d,X%d)",*(BYTE *)(CPU.PC+5),reg_field,reg_field2>>4);
1011 return SWAP(*(ULONG *)addr);
1012 break;
1015 break;
1017 case 7:
1019 switch (reg_field)
1021 case 0: /* (xxx).W */
1022 CPU.instsize+=2;
1023 switch (size)
1025 case 0:
1026 val = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+4));
1027 SHOW_OPCODE(" 0x%x",val);
1028 return *(UBYTE *)val;
1029 break;
1031 case 1:
1032 val = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+4));
1033 SHOW_OPCODE(" 0x%x",val);
1034 return SWAP_WORD(*(UWORD *)val);
1035 break;
1037 case 2:
1038 val = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+6));
1039 SHOW_OPCODE(" 0x%x",val);
1040 return SWAP(*(ULONG *)val);
1041 break;
1043 break;
1045 case 1: /* (xxx).L */
1046 CPU.instsize+=4;
1047 switch (size)
1049 case 0:
1050 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+4));
1051 SHOW_OPCODE(" 0x%x",val);
1052 return *(UBYTE *)val;
1053 break;
1055 case 1:
1056 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+4));
1057 SHOW_OPCODE(" 0x%x",val);
1058 return SWAP_WORD(*(UWORD *)val);
1059 break;
1061 case 2:
1062 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+6));
1063 SHOW_OPCODE(" 0x%x",val);
1064 return SWAP(*(ULONG *)val);
1065 break;
1067 break;
1069 case 2: /* (d16, PC) */
1070 CPU.instsize += 2;
1071 switch (size)
1073 case 0x00:
1074 val = SWAP_WORD(*(UWORD *)(CPU.PC+4));
1075 SHOW_OPCODE(".b (%d,PC) [Addresscalculation!!]",val);
1076 return (*(UBYTE *)(val+CPU.PC+6));
1077 break;
1079 case 0x01:
1080 val = SWAP_WORD(*(UWORD *)(CPU.PC+4));
1081 SHOW_OPCODE(".w (%d,PC) [Addresscalculation!!]",val);
1082 return SWAP_WORD(*(UWORD *)(val+CPU.PC+6));
1083 break;
1085 case 0x02:
1086 val = SWAP_WORD(*(UWORD *)(CPU.PC+6));
1087 SHOW_OPCODE(".l (%d,PC) [Addresscalculation!!]",val);
1088 return SWAP(*(ULONG *)(val+CPU.PC+6));
1089 break;
1091 break;
1093 case 3: /* (d8, PC, Xn) */
1095 switch (size)
1097 case 0x00:
1098 reg_field = *(BYTE *)(CPU.PC+4);
1099 if (reg_field & 0x8)
1100 addr = CPU.A[reg_field >> 4];
1101 else
1102 addr = ((UWORD *)&CPU.A[reg_field >> 4])[L_WORD];
1104 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5)) + CPU.PC + 2;
1106 return *(UBYTE *)addr;
1107 break;
1109 case 0x01:
1110 reg_field = *(BYTE *)(CPU.PC+4);
1111 if (reg_field & 0x8)
1112 addr = CPU.A[reg_field >> 4];
1113 else
1114 addr = ((UWORD *)&CPU.A[reg_field >> 4])[L_WORD];
1116 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5)) + CPU.PC + 2;
1118 return SWAP_WORD(*(UWORD *)addr);
1119 break;
1121 case 0x02:
1122 reg_field = *(BYTE *)(CPU.PC+6);
1123 if (reg_field & 0x8)
1124 addr = CPU.A[reg_field >> 4];
1125 else
1126 addr = ((UWORD *)&CPU.A[reg_field >> 4])[L_WORD];
1128 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+7)) + CPU.PC + 2;
1130 return SWAP(*(ULONG *)addr);
1131 break;
1134 break;
1136 case 4:
1137 switch (size)
1139 case 0:
1140 val = SWAP_WORD(*(UWORD *)(CPU.PC+4));
1141 CPU.instsize += 2;
1142 SHOW_OPCODE(".b 0x%02x",val);
1143 return val;
1144 break;
1146 case 1:
1147 val = SWAP_WORD(*(UWORD *)(CPU.PC+4));
1148 CPU.instsize += 2;
1149 SHOW_OPCODE(".w 0x%04x",val);
1150 return (UWORD)val;
1151 break;
1153 case 2:
1154 val = SWAP(*(ULONG *)(CPU.PC+6));
1155 CPU.instsize += 4;
1156 SHOW_OPCODE(".l 0x%08x",val);
1157 return val;
1158 break;
1160 break;
1162 break;
1166 SHOW_OPCODE("\nunrecognized! -->mode_field: %d, reg_field: %d\n",mode_field,reg_field);
1168 return 0xdeadbeef;
1172 /* LEA needs the following function */
1173 ULONG getaddress_addressing_mode(UBYTE mode_field, UBYTE reg_field, UBYTE size)
1175 LONG offset;
1176 LONG val;
1177 LONG addr;
1179 switch (mode_field)
1181 case 0: /* not possible */
1182 break;
1184 case 1: /* not possible */
1185 break;
1187 case 2: /* (Ax) */
1188 SHOW_OPCODE(".l (A%d)",reg_field);
1189 return CPU.A[reg_field];
1190 break;
1192 case 3: /* not possible */
1193 break;
1195 case 4: /* not possible */
1196 break;
1199 case 5: /* (d16, An) */
1201 offset = (LONG)(WORD)SWAP_WORD(*(WORD *)(CPU.PC+2));
1202 SHOW_OPCODE(" (%d,A%d)",offset,reg_field);
1203 CPU.instsize +=2;
1204 return CPU.A[reg_field]+offset;
1206 break;
1208 case 6: /* (d8, An, Xn) */
1210 UBYTE reg_field2 = (*(UBYTE *)(CPU.PC+2));
1212 if (reg_field2 & 0x8)
1213 addr = CPU.D[reg_field2>>4];
1214 else
1215 addr = (LONG)(WORD)((UWORD *)&CPU.D[reg_field2>>4])[L_WORD];
1217 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+3))+CPU.A[reg_field];
1219 SHOW_OPCODE(" (%d.w,A%d,X%d) ; %x [CPU.instsize += 2??]",*(BYTE *)(CPU.PC+3),reg_field,reg_field2>>4,addr);
1220 CPU.instsize +=2;
1221 return (LONG)addr;
1223 break;
1225 case 7:
1226 switch (reg_field)
1228 case 0: /* (xxx).W */
1229 CPU.instsize += 2;
1230 val = (ULONG)(UWORD)SWAP_WORD((ULONG)*(UWORD *)(CPU.PC+2));
1231 SHOW_OPCODE(" $%x",val);
1232 return val;
1233 break;
1235 case 1: /* (xxx).L */
1236 CPU.instsize += 4;
1237 val = (ULONG)SWAP(*(ULONG *)(CPU.PC+2));
1238 SHOW_OPCODE(" $%x",val);
1239 return (ULONG)val;
1240 break;
1242 case 2: /* (d16, PC) */
1243 CPU.instsize += 2;
1244 offset = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+2));
1245 SHOW_OPCODE(" (%d.w,PC)",offset);
1246 return CPU.PC+2+offset;
1247 break;
1249 case 3: /* (d8, PC, Xn) */
1251 reg_field = (*(UBYTE *)(CPU.PC+2));
1253 CPU.instsize += 2;
1255 if (reg_field & 0x8)
1256 addr = CPU.D[reg_field>>4];
1257 else
1258 addr = ((UWORD *)&CPU.D[reg_field>>4])[L_WORD];
1260 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+3)) + CPU.PC + 2;
1262 #ifdef DEBUGGING
1263 switch (size)
1265 case 0x00:
1266 SHOW_OPCODE(".b (%d,PC,X%d)",val,reg_field>>4);
1267 break;
1269 case 0x01:
1270 SHOW_OPCODE(".w (%d,PC,X%d)",val,reg_field>>4);
1271 break;
1273 case 0x02:
1274 SHOW_OPCODE(".l (%d,PC,X%d)",val,reg_field>>4);
1275 break;
1277 #endif
1278 return (ULONG)addr;
1280 break;
1283 break;
1287 SHOW_OPCODE("\nunrecognized! -->mode_field: %d, reg_field: %d, size : %d\n",mode_field,reg_field,size);
1289 return 0xdeadbeef;
1294 VOID write_addressing_mode(UBYTE mode_field, UBYTE reg_field, ULONG val, UBYTE size)
1296 ULONG offset;
1297 ULONG addr;
1298 switch (mode_field)
1300 case 0:
1301 switch (size)
1303 case 0: /* BYTE */
1304 SHOW_OPCODE("D%d",reg_field);
1305 (((BYTE *)&CPU.D[reg_field]))[L_BYTE] = (UBYTE)val;
1306 break;
1308 case 1: /* WORD */
1309 SHOW_OPCODE("D%d",reg_field);
1310 (((WORD *)&CPU.D[reg_field]))[L_WORD] = (UWORD)val;
1311 break;
1313 case 2: /* LONG */
1314 SHOW_OPCODE("D%d",reg_field);
1315 (LONG)CPU.D[reg_field] = (ULONG)val;
1316 break;
1318 return;
1319 break;
1321 case 1: CPU.A[reg_field] = val;
1322 SHOW_OPCODE("A%d",reg_field);
1323 return;
1324 break;
1326 case 2: /* (Ax) */
1327 SHOW_OPCODE("(A%d)",reg_field);
1328 switch (size)
1330 case 0: /* BYTE */
1331 *(UBYTE *)CPU.A[reg_field] = val;
1332 return;
1333 break;
1335 case 1: /* WORD */
1336 *(UWORD *)CPU.A[reg_field] = SWAP_WORD(val);
1337 return;
1338 break;
1340 case 2: /* LONG */
1341 *(ULONG *)CPU.A[reg_field] = SWAP(val);
1342 return;
1343 break;
1345 break;
1347 case 3: /* (Ax)+ */
1348 SHOW_OPCODE("(A%d)+",reg_field);
1349 switch (size)
1351 case 0: /* BYTE */
1352 *(UBYTE *)CPU.A[reg_field] = val;
1353 CPU.A[reg_field]+=1;
1354 return;
1355 break;
1357 case 1: /* WORD */
1358 *(UWORD *)CPU.A[reg_field] = SWAP_WORD(val);
1359 CPU.A[reg_field]+=2;
1360 return;
1361 break;
1363 case 3: /* LONG */
1364 *(ULONG *)CPU.A[reg_field] = SWAP(val);
1365 CPU.A[reg_field]+=4;
1366 return;
1367 break;
1369 break;
1371 case 4: /* -(Ax) */
1372 SHOW_OPCODE("-(A%d)",reg_field);
1373 switch (size)
1375 case 0: /* BYTE */
1376 CPU.A[reg_field]-=1;
1377 *(UBYTE *)CPU.A[reg_field] = val;
1378 return;
1379 break;
1381 case 1: /* WORD */
1382 CPU.A[reg_field]-=2;
1383 *(UWORD *)CPU.A[reg_field] = SWAP_WORD(val);
1384 return;
1385 break;
1387 case 2: /* LONG */
1388 CPU.A[reg_field]-=4;
1389 *(ULONG *)CPU.A[reg_field] = SWAP(val);
1390 return;
1391 break;
1393 break;
1395 case 5: /* (d16, An) */
1396 CPU.instsize += 2;
1397 offset = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+2));
1398 switch (size)
1400 case 0:
1401 SHOW_OPCODE("%x(A%d) ; %x\n",offset,reg_field,CPU.A[reg_field]+(LONG)offset);
1402 *(UBYTE *)(CPU.A[reg_field]+(LONG)offset) = (UBYTE)val;
1403 return;
1404 break;
1406 case 1:
1407 SHOW_OPCODE("%x(A%d) ; %x\n",offset,reg_field,CPU.A[reg_field]+(LONG)offset);
1408 *(UWORD *)(CPU.A[reg_field]+(LONG)offset) = (UWORD)SWAP_WORD(val);
1409 return;
1410 break;
1412 case 2:
1413 SHOW_OPCODE("%x(A%d) ; %x\n",offset,reg_field,CPU.A[reg_field]+(LONG)offset);
1414 *(ULONG *)(CPU.A[reg_field]+(LONG)offset) = (ULONG)SWAP(val);
1415 return;
1416 break;
1418 break;
1420 case 6: /* (d8, An, Dn) */
1422 UBYTE reg_field2 = (*(UBYTE *)(CPU.PC+2));
1423 CPU.instsize += 2;
1425 if (reg_field2 & 0x8)
1426 addr = CPU.D[reg_field2>>4];
1427 else
1428 addr = (LONG)(WORD)((UWORD *)&CPU.D[reg_field2>>4])[L_WORD];
1430 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+3)) + CPU.A[reg_field];
1432 switch (size)
1434 case 0:
1435 SHOW_OPCODE("%x(A%d,X%d) ; %x\n",*(BYTE *)(CPU.PC+3),reg_field,reg_field2>>4,addr);
1436 *(UBYTE *)addr = (UBYTE)val;
1437 return;
1438 break;
1440 case 1:
1441 SHOW_OPCODE("%x(A%d,X%d) ; %x\n",*(BYTE *)(CPU.PC+3),reg_field,reg_field2>>4,addr);
1442 *(UWORD *)addr = (UWORD)SWAP_WORD(val);
1443 return;
1444 break;
1446 case 2:
1447 SHOW_OPCODE("%x(A%d,X%d) ; %x\n",*(BYTE *)(CPU.PC+3),reg_field,reg_field2>>4,addr);
1448 *(ULONG *)addr = (ULONG)SWAP(val);
1449 return;
1450 break;
1453 break;
1455 case 7:
1456 switch (reg_field)
1458 case 0: /* (xxx).W */
1459 addr = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+2));
1460 SHOW_OPCODE("$%x",addr);
1461 CPU.instsize += 2;
1462 switch (size)
1464 case 0:
1465 *(UBYTE *)addr = val;
1466 return;
1467 break;
1469 case 1:
1470 *(UWORD *)addr = SWAP_WORD(val);
1471 return;
1472 break;
1474 case 2:
1475 *(ULONG *)addr = SWAP(val);
1476 return;
1477 break;
1479 break;
1481 case 1: /* (xxx).L */
1482 addr = (ULONG)SWAP(*(ULONG *)(CPU.PC+2));
1483 SHOW_OPCODE("$%x",addr);
1484 CPU.instsize += 2;
1485 switch (size)
1487 case 0:
1488 *(UBYTE *)addr = val;
1489 return;
1490 break;
1492 case 1:
1493 *(UWORD *)addr = SWAP_WORD(val);
1494 return;
1495 break;
1497 case 2:
1498 *(ULONG *)addr = SWAP(val);
1499 return;
1500 break;
1502 break;
1504 case 2: /* (d16, PC) */
1505 addr = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+2));
1506 addr += CPU.PC;
1507 SHOW_OPCODE("(%d.w, PC) ; $%x [???]",SWAP_WORD(*(UWORD *)(CPU.PC+2)),addr);
1508 CPU.instsize += 2;
1509 switch (size)
1511 case 0:
1512 *(UBYTE *)addr = val;
1513 return;
1514 break;
1516 case 1:
1517 *(UWORD *)addr = SWAP_WORD(val);
1518 return;
1519 break;
1521 case 2:
1522 *(ULONG *)addr = SWAP(val);
1523 return;
1524 break;
1526 break;
1528 case 3: /* (d8, PC, Xn) */
1530 reg_field = (*(UBYTE *)(CPU.PC+2));
1532 if (reg_field & 0x08)
1533 addr = CPU.D[reg_field>>4];
1534 else
1535 addr = (LONG)((WORD *)&CPU.D[reg_field>>4])[L_WORD];
1537 addr += (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+3)) + CPU.PC + 2;
1539 CPU.instsize += 2;
1541 switch (size)
1543 case 0:
1544 *(UBYTE *)addr = val;
1545 return;
1546 break;
1548 case 1:
1549 *(UWORD *)addr = SWAP_WORD(val);
1550 return;
1551 break;
1553 case 2:
1554 *(ULONG *)addr = SWAP(val);
1555 return;
1556 break;
1560 break;
1563 break;
1566 kprintf("Unknow addressing mode for writing data!\n");
1569 VOID write_addressing_mode_offset(UBYTE mode_field, UBYTE reg_field, ULONG val, UBYTE size)
1571 ULONG offset;
1572 ULONG addr;
1573 switch (mode_field)
1575 case 0:
1576 switch (size)
1578 case 0: /* BYTE */
1579 SHOW_OPCODE("D%d",reg_field);
1580 (((BYTE *)&CPU.D[reg_field]))[L_BYTE] = (UBYTE)val;
1581 break;
1583 case 1: /* WORD */
1584 SHOW_OPCODE("D%d",reg_field);
1585 (((WORD *)&CPU.D[reg_field]))[L_WORD] = (UWORD)val;
1586 break;
1588 case 2: /* LONG */
1589 SHOW_OPCODE("D%d",reg_field);
1590 (LONG)CPU.D[reg_field] = (ULONG)val;
1591 break;
1593 return;
1594 break;
1596 case 1: CPU.A[reg_field] = val;
1597 SHOW_OPCODE("A%d",reg_field);
1598 return;
1599 break;
1601 case 2: /* (Ax) */
1602 SHOW_OPCODE("(A%d)",reg_field);
1603 switch (size)
1605 case 0: /* BYTE */
1606 *(UBYTE *)CPU.A[reg_field] = val;
1607 return;
1608 break;
1610 case 1: /* WORD */
1611 *(UWORD *)CPU.A[reg_field] = SWAP_WORD(val);
1612 return;
1613 break;
1615 case 2: /* LONG */
1616 *(ULONG *)CPU.A[reg_field] = SWAP(val);
1617 return;
1618 break;
1620 break;
1622 case 3: /* (Ax)+ */
1623 SHOW_OPCODE("(A%d)+",reg_field);
1624 switch (size)
1626 case 0: /* BYTE */
1627 *(UBYTE *)CPU.A[reg_field] = val;
1628 CPU.A[reg_field]+=1;
1629 return;
1630 break;
1632 case 1: /* WORD */
1633 *(UWORD *)CPU.A[reg_field] = SWAP_WORD(val);
1634 CPU.A[reg_field]+=2;
1635 return;
1636 break;
1638 case 3: /* LONG */
1639 *(ULONG *)CPU.A[reg_field] = SWAP(val);
1640 CPU.A[reg_field]+=4;
1641 return;
1642 break;
1644 break;
1646 case 4: /* -(Ax) */
1647 SHOW_OPCODE("-(A%d)",reg_field);
1648 switch (size)
1650 case 0: /* BYTE */
1651 CPU.A[reg_field]-=1;
1652 *(UBYTE *)CPU.A[reg_field] = val;
1653 return;
1654 break;
1656 case 1: /* WORD */
1657 CPU.A[reg_field]-=2;
1658 *(UWORD *)CPU.A[reg_field] = SWAP_WORD(val);
1659 return;
1660 break;
1662 case 2: /* LONG */
1663 CPU.A[reg_field]-=4;
1664 *(ULONG *)CPU.A[reg_field] = SWAP(val);
1665 return;
1666 break;
1668 break;
1670 case 5: /* (d16, An) */
1671 CPU.instsize += 2;
1672 switch (size)
1674 case 0:
1675 offset = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+4));
1676 SHOW_OPCODE("%x(A%d) ; %x\n",offset,reg_field,CPU.A[reg_field]+(LONG)offset);
1677 *(UBYTE *)(CPU.A[reg_field]+(LONG)offset) = (UBYTE)val;
1678 return;
1679 break;
1681 case 1:
1682 offset = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+4));
1683 SHOW_OPCODE("%x(A%d) ; %x\n",offset,reg_field,CPU.A[reg_field]+(LONG)offset);
1684 *(UWORD *)(CPU.A[reg_field]+(LONG)offset) = (UWORD)SWAP_WORD(val);
1685 return;
1686 break;
1688 case 2:
1689 offset = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+6));
1690 SHOW_OPCODE("%x(A%d) ; %x\n",offset,reg_field,CPU.A[reg_field]+(LONG)offset);
1691 *(ULONG *)(CPU.A[reg_field]+(LONG)offset) = (ULONG)SWAP(val);
1692 return;
1693 break;
1695 break;
1697 case 6: /* (d8, An, Xn) */
1699 UBYTE reg_field2;
1700 CPU.instsize += 2;
1702 addr = CPU.A[reg_field];
1704 switch (size)
1706 case 0:
1707 reg_field2 = (*(UBYTE *)(CPU.PC+4));
1709 if (reg_field2 & 0x8)
1710 addr += CPU.D[reg_field2>>4];
1711 else
1712 addr += (LONG)(WORD)((UWORD *)&CPU.D[reg_field2>>4])[L_WORD];
1714 addr += (LONG)(WORD)(BYTE)(*(UBYTE *)(CPU.PC+5));
1715 SHOW_OPCODE("%x(A%d,X%d) ; %x\n",*(UBYTE *)(CPU.PC+5),reg_field,reg_field2>>4,addr);
1716 *(UBYTE *)addr = (UBYTE)val;
1717 return;
1718 break;
1720 case 1:
1721 reg_field2 = (*(UBYTE *)(CPU.PC+4));
1723 if (reg_field2 & 0x8)
1724 addr += CPU.D[reg_field2>>4];
1725 else
1726 addr += (LONG)(WORD)((UWORD *)&CPU.D[reg_field2>>4])[L_WORD];
1728 addr += (LONG)(WORD)(BYTE)(*(UBYTE *)(CPU.PC+5));
1729 SHOW_OPCODE("%x(A%d,X%d) ; %x\n",*(UBYTE *)(CPU.PC+5),reg_field,reg_field2>>4,addr);
1730 *(UWORD *)addr = (UWORD)SWAP_WORD(val);
1731 return;
1732 break;
1734 case 2:
1735 reg_field2 = (*(UBYTE *)(CPU.PC+6));
1737 if (reg_field2 & 0x8)
1738 addr += CPU.D[reg_field2>>4];
1739 else
1740 addr += (LONG)(WORD)((UWORD *)&CPU.D[reg_field2>>4])[L_WORD];
1742 addr += (LONG)(WORD)(BYTE)(*(UBYTE *)(CPU.PC+7));
1743 SHOW_OPCODE("%x(A%d,X%d) ; %x\n",*(UBYTE *)(CPU.PC+7),reg_field,reg_field2>>4,addr);
1744 *(ULONG *)addr = (ULONG)SWAP(val);
1745 return;
1746 break;
1749 break;
1751 case 7:
1752 switch (reg_field)
1754 case 0: /* (xxx).W */
1755 CPU.instsize += 2;
1756 switch (size)
1758 case 0:
1759 addr = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+4));
1760 SHOW_OPCODE("$%x.w",addr);
1761 *(UBYTE *)addr = val;
1762 return;
1763 break;
1765 case 1:
1766 addr = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+4));
1767 SHOW_OPCODE("$%x.w",addr);
1768 *(UWORD *)addr = SWAP_WORD(val);
1769 return;
1770 break;
1772 case 2:
1773 addr = (ULONG)SWAP_WORD(*(UWORD *)(CPU.PC+6));
1774 SHOW_OPCODE("$%x.w",addr);
1775 *(ULONG *)addr = SWAP(val);
1776 return;
1777 break;
1779 break;
1781 case 1: /* (xxx).L */
1782 CPU.instsize += 2;
1783 switch (size)
1785 case 0:
1786 addr = (ULONG)SWAP(*(ULONG *)(CPU.PC+4));
1787 SHOW_OPCODE("$%x.l",addr);
1788 *(UBYTE *)addr = val;
1789 return;
1790 break;
1792 case 1:
1793 addr = (ULONG)SWAP(*(ULONG *)(CPU.PC+4));
1794 SHOW_OPCODE("$%x.l",addr);
1795 *(UWORD *)addr = SWAP_WORD(val);
1796 return;
1797 break;
1799 case 2:
1800 addr = (ULONG)SWAP(*(ULONG *)(CPU.PC+6));
1801 SHOW_OPCODE("$%x.l",addr);
1802 *(ULONG *)addr = SWAP(val);
1803 return;
1804 break;
1806 break;
1808 case 2: /* (d16, PC) */
1809 CPU.instsize += 2;
1810 switch (size)
1812 case 0:
1813 addr = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+4));
1814 addr += CPU.PC;
1815 SHOW_OPCODE("(%d.w, PC) ; $%x [???]",SWAP_WORD(*(UWORD *)(CPU.PC+2)),addr);
1816 *(UBYTE *)addr = val;
1817 return;
1818 break;
1820 case 1:
1821 addr = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+4));
1822 addr += CPU.PC;
1823 SHOW_OPCODE("(%d.w, PC) ; $%x [???]",SWAP_WORD(*(UWORD *)(CPU.PC+2)),addr);
1824 *(UWORD *)addr = SWAP_WORD(val);
1825 return;
1826 break;
1828 case 2:
1829 addr = (LONG)(WORD)SWAP_WORD(*(UWORD *)(CPU.PC+6));
1830 addr += CPU.PC;
1831 SHOW_OPCODE("(%d.w, PC) ; $%x [???]",SWAP_WORD(*(UWORD *)(CPU.PC+2)),addr);
1832 *(ULONG *)addr = SWAP(val);
1833 return;
1834 break;
1836 break;
1838 case 3: /* (d8, PC, Xn) */
1839 CPU.instsize += 2;
1840 switch (size)
1842 case 0:
1843 reg_field = (*(UBYTE *)(CPU.PC+4));
1844 addr = (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5)) + CPU.PC + 2;
1845 if (reg_field & 8)
1847 addr += CPU.D[reg_field>>4];
1848 SHOW_OPCODE("(%d.w,PC,X%d.l) ; $%x [???]",(*(UBYTE *)(CPU.PC+5)),reg_field>>4,addr);
1850 else
1852 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field>>4])[L_WORD];
1853 SHOW_OPCODE("(%d.w,PC,X%d.w) ; $%x [???]",(*(UBYTE *)(CPU.PC+5)),reg_field>>4,addr);
1855 *(UBYTE *)addr = val;
1856 return;
1857 break;
1859 case 1:
1860 reg_field = (*(BYTE *)(CPU.PC+4));
1861 addr = (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+5)) + CPU.PC + 2;
1862 if (reg_field & 8)
1864 addr += CPU.D[reg_field>>4];
1865 SHOW_OPCODE("(%d.w,PC,X%d.l) ; $%x [???]",(*(UBYTE *)(CPU.PC+5)),reg_field>>4,addr);
1867 else
1869 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field>>4])[L_WORD];
1870 SHOW_OPCODE("(%d.w,PC,X%d.w) ; $%x [???]",(*(UBYTE *)(CPU.PC+5)),reg_field>>4,addr);
1872 *(UWORD *)addr = SWAP_WORD(val);
1873 return;
1874 break;
1876 case 2:
1877 reg_field = (*(BYTE *)(CPU.PC+6));
1878 addr = (LONG)(WORD)(BYTE)(*(BYTE *)(CPU.PC+7)) + CPU.PC + 2;
1879 if (reg_field & 8)
1881 addr += CPU.D[reg_field>>4];
1882 SHOW_OPCODE("(%d.w,PC,X%d.l) ; $%x [???]",(*(UBYTE *)(CPU.PC+7)),reg_field>>4,addr);
1884 else
1886 addr += (LONG)(WORD)((WORD *)&CPU.D[reg_field>>4])[L_WORD];
1887 SHOW_OPCODE("(%d.w,PC,X%d.w) ; $%x [???]",(*(UBYTE *)(CPU.PC+7)),reg_field>>4,addr);
1889 *(ULONG *)addr = SWAP(val);
1890 return;
1891 break;
1893 break;
1895 break;
1897 kprintf("Unknow addressing mode for writing data!\n");