Initial xloong code
[xloong.git] / bak / include / prid.h
blobdbc21e1f1a022afc27781bc26cc29e1b339e6017
1 /*
2 * mips/prid.h: MIPS processor ID values (cp_imp field).
4 * Copyright (c) 1998-1999, Algorithmics Ltd. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the "Free MIPS" License Agreement, a copy of
8 * which is available at:
10 * http://www.algor.co.uk/ftp/pub/doc/freemips-license.txt
12 * You may not, however, modify or remove any part of this copyright
13 * message if this program is redistributed or reused in whole or in
14 * part.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * "Free MIPS" License for more details.
22 /*
23 * MIPS CPU types
25 #define PRID_R2000 0x01 /* MIPS R2000 CPU ISA I */
26 #define PRID_R3000 0x02 /* MIPS R3000 CPU ISA I */
27 #define PRID_R6000 0x03 /* MIPS R6000 CPU ISA II */
28 #define PRID_R4000 0x04 /* MIPS R4000/4400 CPU ISA III */
29 #define PRID_LR33K 0x05 /* LSI Logic R3000 derivate ISA I */
30 #define PRID_R6000A 0x06 /* MIPS R6000A CPU ISA II */
31 #define PRID_R3IDT 0x07 /* IDT R3000 derivates ISA I */
32 #define PRID_R3IDT_R3041 0x07 /* R3041 (cp_rev field) */
33 #define PRID_R3IDT_R36100 0x10 /* R36100 (cp_rev field) */
34 #define PRID_R10000 0x09 /* MIPS R10000/T5 CPU ISA IV */
35 #define PRID_R4200 0x0a /* MIPS R4200 CPU (ICE) ISA III */
36 #define PRID_R4300 0x0b /* NEC VR4300 CPU ISA III */
37 #define PRID_R4100 0x0c /* NEC VR4100 CPU ISA III */
38 #define PRID_R8000 0x10 /* MIPS R8000 Blackbird/TFP ISA IV */
39 #define PRID_RC6457X 0x15 /* IDT RC6457X CPU ISA IV */
40 #define PRID_R4600 0x20 /* QED R4600 Orion ISA III */
41 #define PRID_R4700 0x21 /* QED R4700 Orion ISA III */
42 #define PRID_R3900 0x22 /* Toshiba/Philips R3900 CPU ISA I */
43 #define PRID_R4650 0x22 /* QED R4650/R4640 CPU ISA III */
44 #define PRID_R5000 0x23 /* MIPS R5000 CPU ISA IV */
45 #define PRID_RC3236X 0x26 /* IDT RC3236X CPU ISA IV */
46 #define PRID_RM7000 0x27 /* QED RM7000 CPU ISA IV */
47 #define PRID_RM52XX 0x28 /* QED RM52XX CPU ISA IV */
48 #define PRID_RC6447X 0x30 /* IDT RC6447X CPU ISA III */
49 #define PRID_R5400 0x54 /* NEC Vr5400 CPU ISA IV */
50 #define PRID_JADE 0x80 /* MIPS JADE ISA MIPS32 */
53 * MIPS FPU types
55 #define PRID_SOFT 0x00 /* Software emulation ISA I */
56 #define PRID_R2360 0x01 /* MIPS R2360 FPC ISA I */
57 #define PRID_R2010 0x02 /* MIPS R2010 FPC ISA I */
58 #define PRID_R3010 0x03 /* MIPS R3010 FPC ISA I */
59 #define PRID_R6010 0x04 /* MIPS R6010 FPC ISA II */
60 #define PRID_R4010 0x05 /* MIPS R4000/R4400 FPC ISA II */
61 #define PRID_LR33010 0x06 /* LSI Logic derivate ISA I */
62 #define PRID_R10010 0x09 /* MIPS R10000/T5 FPU ISA IV */
63 #define PRID_R4210 0x0a /* MIPS R4200 FPC (ICE) ISA III */
64 #define PRID_UNKF1 0x0b /* unnanounced product cpu ISA III */
65 #define PRID_R8010 0x10 /* MIPS R8000 Blackbird/TFP ISA IV */
66 #define PRID_RC6457XF 0x15 /* IDT RC6457X FPU ISA IV */
67 #define PRID_R4610 0x20 /* QED R4600 Orion ISA III */
68 #define PRID_R3SONY 0x21 /* Sony R3000 based FPU ISA I */
69 #define PRID_R3910 0x22 /* Toshiba/Philips R3900 FPU ISA I */
70 #define PRID_R5010 0x23 /* MIPS R5000 FPU ISA IV */
71 #define PRID_RM7000F 0x27 /* QED RM7000 FPU ISA IV */
72 #define PRID_RM52XXF 0x28 /* QED RM52X FPU ISA IV */
73 #define PRID_RC6447XF 0x30 /* IDT RC6447X FPU ISA III */
74 #define PRID_R5400F 0x54 /* NEC Vr5400 FPU ISA IV */