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ENGR00156850 gpu-viv: add gpu-viv driver source
[wandboard.git] / drivers / mxc / gpu-viv / arch / XAQ2 / hal / kernel / gc_hal_kernel_hardware.c
blob8ca8dfeaad8400216ba82600996902b45c8235ba
1 /****************************************************************************
2 *
3 * Copyright (C) 2005 - 2011 by Vivante Corp.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the license, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 *****************************************************************************/
20
21
22
23
24 #include "gc_hal.h"
25 #include "gc_hal_kernel.h"
26
27 #define _GC_OBJ_ZONE gcvZONE_HARDWARE
28
29 /******************************************************************************\
30 ********************************* Support Code *********************************
31 \******************************************************************************/
32 static gceSTATUS
33 _ResetGPU(
34 IN gckOS Os,
35 IN gceCORE Core
36 );
37
38 static gceSTATUS
39 _IdentifyHardware(
40 IN gckOS Os,
41 IN gceCORE Core,
42 OUT gceCHIPMODEL * ChipModel,
43 OUT gctUINT32_PTR ChipRevision,
44 OUT gctUINT32_PTR ChipFeatures,
45 OUT gctUINT32_PTR ChipMinorFeatures0,
46 OUT gctUINT32_PTR ChipMinorFeatures1,
47 OUT gctUINT32_PTR ChipMinorFeatures2,
48 OUT gctUINT32_PTR ChipMinorFeatures3
49 )
50 {
51 gceSTATUS status;
52 gctUINT32 chipIdentity;
53 gctUINT32 chipDate = 0xCCDDCCDD;
54 gctUINT32 chipTime = 0xCCDDCCDD;
55
56 gcmkHEADER_ARG("Os=0x%x", Os);
57
58 /* Read chip identity register. */
59 gcmkONERROR(
60 gckOS_ReadRegisterEx(Os, Core, 0x00018, &chipIdentity));
61
62 /* Special case for older graphic cores. */
63 if (((((gctUINT32) (chipIdentity)) >> (0 ? 31:24) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))))
64 {
65 *ChipModel = gcv500;
66 *ChipRevision = (((((gctUINT32) (chipIdentity)) >> (0 ? 15:12)) & ((gctUINT32) ((((1 ? 15:12) - (0 ? 15:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:12) - (0 ? 15:12) + 1)))))) );
67 }
68
69 else
70 {
71 /* Read date and time registers. */
72 gcmkONERROR(
73 gckOS_ReadRegisterEx(Os, Core, 0x00028, &chipDate));
74
75 gcmkONERROR(
76 gckOS_ReadRegisterEx(Os, Core, 0x0002C, &chipTime));
77
78 /* Read chip identity register. */
79 gcmkONERROR(
80 gckOS_ReadRegisterEx(Os,
81 Core,
82 0x00020,
83 (gctUINT32_PTR) ChipModel));
84
85 /* !!!! HACK ALERT !!!! */
86 /* Because people change device IDs without letting software know
87 ** about it - here is the hack to make it all look the same. Only
88 ** for GC400 family. Next time - TELL ME!!! */
89 if ((*ChipModel & 0xFF00) == 0x0400)
90 {
91 *ChipModel &= 0x0400;
92 }
93
94 /* Read CHIP_REV register. */
95 gcmkONERROR(
96 gckOS_ReadRegisterEx(Os, Core, 0x00024, ChipRevision));
97
98 if ((*ChipModel == gcv300)
99 && (*ChipRevision == 0x2201)
100 )
101 {
102 if ((chipDate == 0x20080814) && (chipTime == 0x12051100))
103 {
104 /* This IP has an ECO; put the correct revision in it. */
105 *ChipRevision = 0x1051;
106 }
107 }
108 }
109
110 /* Read chip feature register. */
111 gcmkONERROR(
112 gckOS_ReadRegisterEx(Os, Core, 0x0001C, ChipFeatures));
113
114 #ifndef VIVANTE_NO_3D
115 /* Disable fast clear on GC700. */
116 if (*ChipModel == gcv700)
117 {
118 *ChipFeatures = ((((gctUINT32) (*ChipFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
119 }
120 #endif
121
122 if (((*ChipModel == gcv500) && (*ChipRevision < 2))
123 || ((*ChipModel == gcv300) && (*ChipRevision < 0x2000))
124 )
125 {
126 /* GC500 rev 1.x and GC300 rev < 2.0 doesn't have these registers. */
127 *ChipMinorFeatures0 = 0;
128 *ChipMinorFeatures1 = 0;
129 *ChipMinorFeatures2 = 0;
130 *ChipMinorFeatures3 = 0;
131 }
132 else
133 {
134 /* Read chip minor feature register #0. */
135 gcmkONERROR(
136 gckOS_ReadRegisterEx(Os,
137 Core,
138 0x00034,
139 ChipMinorFeatures0));
140
141 if (((((gctUINT32) (*ChipMinorFeatures0)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))))
142 )
143 {
144 /* Read chip minor featuress register #1. */
145 gcmkONERROR(
146 gckOS_ReadRegisterEx(Os,
147 Core,
148 0x00074,
149 ChipMinorFeatures1));
150
151 /* Disabling texture hAlignment until it's fully tested. */
152 *ChipMinorFeatures1 = *ChipMinorFeatures1 & ~(1 << 20);
153
154 /* Read chip minor featuress register #2. */
155 gcmkONERROR(
156 gckOS_ReadRegisterEx(Os,
157 Core,
158 0x00084,
159 ChipMinorFeatures2));
160
161 /* Read chip minor featuress register #1. */
162 gcmkONERROR(
163 gckOS_ReadRegisterEx(Os,
164 Core,
165 0x00088,
166 ChipMinorFeatures3));
167 }
168 else
169 {
170 /* Chip doesn't has minor features register #1 or 2 or 3. */
171 *ChipMinorFeatures1 = 0;
172 *ChipMinorFeatures2 = 0;
173 *ChipMinorFeatures3 = 0;
174 }
175 }
176
177 /* Disable HIERARCHICAL_Z. */
178 *ChipMinorFeatures0 = ((((gctUINT32) (*ChipMinorFeatures0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27)));
179
180 /* Success. */
181 gcmkFOOTER_ARG("*ChipModel=%x *ChipRevision=%x *ChipFeatures=0x%08x "
182 "*ChipMinorFeatures0=0x%08X *ChipMinorFeatures1=0x%08x "
183 "*ChipMinorFeatures2=0x%08x *ChipMinorFeatures3=0x%08x",
184 *ChipModel, *ChipRevision, *ChipFeatures,
185 *ChipMinorFeatures0, *ChipMinorFeatures1,
186 *ChipMinorFeatures2, *ChipMinorFeatures3);
187 return gcvSTATUS_OK;
188
189 OnError:
190 /* Return the status. */
191 gcmkFOOTER();
192 return status;
193 }
194
195 static gceSTATUS
196 _GetChipSpecs(
197 IN gckHARDWARE Hardware
198 )
199 {
200 gctUINT32 streamCount = 0;
201 gctUINT32 registerMax = 0;
202 gctUINT32 threadCount = 0;
203 gctUINT32 shaderCoreCount = 0;
204 gctUINT32 vertexCacheSize = 0;
205 gctUINT32 vertexOutputBufferSize = 0;
206 gctUINT32 pixelPipes = 0;
207 gctUINT32 instructionCount = 0;
208 gctUINT32 numConstants = 0;
209 gctUINT32 bufferSize = 0;
210 gceSTATUS status;
211
212 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
213
214 if (((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
215 {
216 gctUINT32 specs, specs2;
217
218 /* Read gcChipSpecs register. */
219 gcmkONERROR(
220 gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00048, &specs));
221
222 /* Handy macro to improve reading. */
223 #define gcmSPEC_FIELD(field) \
224 (((((gctUINT32) (specs)) >> (0 ? GC_CHIP_SPECS_field)) & ((gctUINT32) ((((1 ? GC_CHIP_SPECS_field) - (0 ? GC_CHIP_SPECS_field) + 1) == 32) ? ~0 : (~(~0 << ((1 ? GC_CHIP_SPECS_field) - (0 ? GC_CHIP_SPECS_field) + 1)))))) )
225
226 /* Extract the fields. */
227 streamCount = (((((gctUINT32) (specs)) >> (0 ? 3:0)) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1)))))) );
228 registerMax = (((((gctUINT32) (specs)) >> (0 ? 7:4)) & ((gctUINT32) ((((1 ? 7:4) - (0 ? 7:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:4) - (0 ? 7:4) + 1)))))) );
229 threadCount = (((((gctUINT32) (specs)) >> (0 ? 11:8)) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1)))))) );
230 shaderCoreCount = (((((gctUINT32) (specs)) >> (0 ? 24:20)) & ((gctUINT32) ((((1 ? 24:20) - (0 ? 24:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 24:20) - (0 ? 24:20) + 1)))))) );
231 vertexCacheSize = (((((gctUINT32) (specs)) >> (0 ? 16:12)) & ((gctUINT32) ((((1 ? 16:12) - (0 ? 16:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:12) - (0 ? 16:12) + 1)))))) );
232 vertexOutputBufferSize = (((((gctUINT32) (specs)) >> (0 ? 31:28)) & ((gctUINT32) ((((1 ? 31:28) - (0 ? 31:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:28) - (0 ? 31:28) + 1)))))) );
233 pixelPipes = (((((gctUINT32) (specs)) >> (0 ? 27:25)) & ((gctUINT32) ((((1 ? 27:25) - (0 ? 27:25) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:25) - (0 ? 27:25) + 1)))))) );
234
235 /* Read gcChipSpecs2 register. */
236 gcmkONERROR(
237 gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00080, &specs2));
238
239 /* Handy macro to improve reading. */
240 #define gcmSPEC2_FIELD(field) \
241 (((((gctUINT32) (specs2)) >> (0 ? GC_CHIP_SPECS2_field)) & ((gctUINT32) ((((1 ? GC_CHIP_SPECS2_field) - (0 ? GC_CHIP_SPECS2_field) + 1) == 32) ? ~0 : (~(~0 << ((1 ? GC_CHIP_SPECS2_field) - (0 ? GC_CHIP_SPECS2_field) + 1)))))) )
242
243 instructionCount = (((((gctUINT32) (specs2)) >> (0 ? 15:8)) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1)))))) );
244 numConstants = (((((gctUINT32) (specs2)) >> (0 ? 31:16)) & ((gctUINT32) ((((1 ? 31:16) - (0 ? 31:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:16) - (0 ? 31:16) + 1)))))) );
245 bufferSize = (((((gctUINT32) (specs2)) >> (0 ? 7:0)) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1)))))) );
246 }
247
248 /* Get the number of pixel pipes. */
249 Hardware->pixelPipes = gcmMAX(pixelPipes, 1);
250
251 /* Get the stream count. */
252 Hardware->streamCount = (streamCount != 0)
253 ? streamCount
254 : (Hardware->chipModel >= gcv1000) ? 4 : 1;
255
256 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
257 "Specs: streamCount=%u%s",
258 Hardware->streamCount,
259 (streamCount == 0) ? " (default)" : "");
260
261 /* Get the vertex output buffer size. */
262 Hardware->vertexOutputBufferSize = (vertexOutputBufferSize != 0)
263 ? 1 << vertexOutputBufferSize
264 : (Hardware->chipModel == gcv400)
265 ? (Hardware->chipRevision < 0x4000) ? 512
266 : (Hardware->chipRevision < 0x4200) ? 256
267 : 128
268 : (Hardware->chipModel == gcv530)
269 ? (Hardware->chipRevision < 0x4200) ? 512
270 : 128
271 : 512;
272
273 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
274 "Specs: vertexOutputBufferSize=%u%s",
275 Hardware->vertexOutputBufferSize,
276 (vertexOutputBufferSize == 0) ? " (default)" : "");
277
278 /* Get the maximum number of threads. */
279 Hardware->threadCount = (threadCount != 0)
280 ? 1 << threadCount
281 : (Hardware->chipModel == gcv400) ? 64
282 : (Hardware->chipModel == gcv500) ? 128
283 : (Hardware->chipModel == gcv530) ? 128
284 : 256;
285
286 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
287 "Specs: threadCount=%u%s",
288 Hardware->threadCount,
289 (threadCount == 0) ? " (default)" : "");
290
291 /* Get the number of shader cores. */
292 Hardware->shaderCoreCount = (shaderCoreCount != 0)
293 ? shaderCoreCount
294 : (Hardware->chipModel >= gcv1000) ? 2
295 : 1;
296 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
297 "Specs: shaderCoreCount=%u%s",
298 Hardware->shaderCoreCount,
299 (shaderCoreCount == 0) ? " (default)" : "");
300
301 /* Get the vertex cache size. */
302 Hardware->vertexCacheSize = (vertexCacheSize != 0)
303 ? vertexCacheSize
304 : 8;
305 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
306 "Specs: vertexCacheSize=%u%s",
307 Hardware->vertexCacheSize,
308 (vertexCacheSize == 0) ? " (default)" : "");
309
310 /* Get the maximum number of temporary registers. */
311 Hardware->registerMax = (registerMax != 0)
312 /* Maximum of registerMax/4 registers are accessible to 1 shader */
313 ? 1 << registerMax
314 : (Hardware->chipModel == gcv400) ? 32
315 : 64;
316 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
317 "Specs: registerMax=%u%s",
318 Hardware->registerMax,
319 (registerMax == 0) ? " (default)" : "");
320
321 /* Get the instruction count. */
322 Hardware->instructionCount = (instructionCount == 0) ? 256
323 : (instructionCount == 1) ? 1024
324 : (instructionCount == 2) ? 2048
325 : 256;
326
327 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
328 "Specs: instructionCount=%u%s",
329 Hardware->instructionCount,
330 (instructionCount == 0) ? " (default)" : "");
331
332 /* Get the number of constants. */
333 Hardware->numConstants = numConstants;
334
335 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
336 "Specs: numConstants=%u%s",
337 Hardware->numConstants,
338 (numConstants == 0) ? " (default)" : "");
339
340 /* Get the buffer size. */
341 Hardware->bufferSize = bufferSize;
342
343 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
344 "Specs: bufferSize=%u%s",
345 Hardware->bufferSize,
346 (bufferSize == 0) ? " (default)" : "");
347
348 /* Success. */
349 gcmkFOOTER_NO();
350 return gcvSTATUS_OK;
351
352 OnError:
353 /* Return the status. */
354 gcmkFOOTER();
355 return status;
356 }
357
358 /******************************************************************************\
359 ****************************** gckHARDWARE API code *****************************
360 \******************************************************************************/
361
362 /*******************************************************************************
363 **
364 ** gckHARDWARE_Construct
365 **
366 ** Construct a new gckHARDWARE object.
367 **
368 ** INPUT:
369 **
370 ** gckOS Os
371 ** Pointer to an initialized gckOS object.
372 **
373 ** gceCORE Core
374 ** Specified core.
375 **
376 ** OUTPUT:
377 **
378 ** gckHARDWARE * Hardware
379 ** Pointer to a variable that will hold the pointer to the gckHARDWARE
380 ** object.
381 */
382 gceSTATUS
383 gckHARDWARE_Construct(
384 IN gckOS Os,
385 IN gceCORE Core,
386 OUT gckHARDWARE * Hardware
387 )
388 {
389 gckHARDWARE hardware = gcvNULL;
390 gceSTATUS status;
391 gceCHIPMODEL chipModel = gcv300;
392 gctUINT32 chipRevision = 0;
393 gctUINT32 chipFeatures = 0;
394 gctUINT32 chipMinorFeatures0 = 0;
395 gctUINT32 chipMinorFeatures1 = 0;
396 gctUINT32 chipMinorFeatures2 = 0;
397 gctUINT32 chipMinorFeatures3 = 0;
398 gctUINT16 data = 0xff00;
399 gctPOINTER pointer = gcvNULL;
400
401 gcmkHEADER_ARG("Os=0x%x", Os);
402
403 /* Verify the arguments. */
404 gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
405 gcmkVERIFY_ARGUMENT(Hardware != gcvNULL);
406
407 /* Enable the GPU. */
408 gcmkONERROR(gckOS_SetGPUPower(Os, gcvTRUE, gcvTRUE));
409 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00000, 0));
410
411 status = _ResetGPU(Os, Core);
412
413 if (status != gcvSTATUS_OK)
414 {
415 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
416 "_ResetGPU failed: status=%d\n", status);
417 }
418
419 /* Identify the hardware. */
420 gcmkONERROR(_IdentifyHardware(Os,
421 Core,
422 &chipModel,
423 &chipRevision,
424 &chipFeatures,
425 &chipMinorFeatures0,
426 &chipMinorFeatures1,
427 &chipMinorFeatures2,
428 &chipMinorFeatures3));
429
430 /* Allocate the gckHARDWARE object. */
431 gcmkONERROR(gckOS_Allocate(Os,
432 gcmSIZEOF(struct _gckHARDWARE),
433 &pointer));
434
435 hardware = pointer;
436
437 /* Initialize the gckHARDWARE object. */
438 hardware->object.type = gcvOBJ_HARDWARE;
439 hardware->os = Os;
440
441 hardware->core = Core;
442
443 /* Determine the hardware type */
444 switch (chipModel)
445 {
446 case gcv350:
447 case gcv355:
448 hardware->type = gcvHARDWARE_VG;
449 break;
450
451 case gcv300:
452 case gcv320:
453 hardware->type = gcvHARDWARE_2D;
454 break;
455
456 default:
457 hardware->type = gcvHARDWARE_3D;
458
459 if ((((((gctUINT32) (chipFeatures)) >> (0 ? 9:9)) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))) ))
460 {
461 hardware->type |= gcvHARDWARE_2D;
462 }
463 }
464
465 /* Set chip identity. */
466 hardware->chipModel = chipModel;
467 hardware->chipRevision = chipRevision;
468 hardware->chipFeatures = chipFeatures;
469 hardware->chipMinorFeatures0 = chipMinorFeatures0;
470 hardware->chipMinorFeatures1 = chipMinorFeatures1;
471 hardware->chipMinorFeatures2 = chipMinorFeatures2;
472 hardware->chipMinorFeatures3 = chipMinorFeatures3;
473 hardware->powerBaseAddress = ((chipModel == gcv300)
474 && (chipRevision < 0x2000)
475 ) ? 0x100 : 0x00;
476 hardware->powerMutex = gcvNULL;
477
478 hardware->mmuVersion =
479 (((((gctUINT32) (hardware->chipMinorFeatures1)) >> (0 ? 28:28)) & ((gctUINT32) ((((1 ? 28:28) - (0 ? 28:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 28:28) - (0 ? 28:28) + 1)))))) );
480
481 /* Get chip specs. */
482 gcmkONERROR(_GetChipSpecs(hardware));
483
484 /* Determine whether bug fixes #1 are present. */
485 hardware->extraEventStates = ((((gctUINT32) (chipMinorFeatures1)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x0 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))));
486
487 /* Check if big endian */
488 hardware->bigEndian = (*(gctUINT8 *)&data == 0xff);
489
490 /* Initialize the fast clear. */
491 gcmkONERROR(gckHARDWARE_SetFastClear(hardware, -1, -1));
492
493 #if !gcdENABLE_128B_MERGE && 1 && 1
494
495 if (((((gctUINT32) (hardware->chipMinorFeatures2)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
496 {
497 /* 128B merge is turned on by default. Disable it. */
498 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00558, 0));
499 }
500
501 #endif
502
503 /* Set power state to ON. */
504 hardware->chipPowerState = gcvPOWER_ON;
505 hardware->clockState = gcvTRUE;
506 hardware->powerState = gcvTRUE;
507 hardware->lastWaitLink = ~0U;
508 hardware->globalSemaphore = gcvNULL;
509
510 gcmkONERROR(gckOS_CreateMutex(Os, &hardware->powerMutex));
511 gcmkONERROR(gckOS_CreateSemaphore(Os, &hardware->globalSemaphore));
512
513 #if gcdPOWEROFF_TIMEOUT
514 gcmkONERROR(gckOS_CreateMutex(Os, &hardware->powerOffSema));
515 gcmkONERROR(gckOS_AcquireMutex(Os, hardware->powerOffSema, gcvINFINITE));
516 #endif
517
518 /* Return pointer to the gckHARDWARE object. */
519 *Hardware = hardware;
520
521 /* Success. */
522 gcmkFOOTER_ARG("*Hardware=0x%x", *Hardware);
523 return gcvSTATUS_OK;
524
525 OnError:
526 /* Roll back. */
527 if (hardware != gcvNULL)
528 {
529 /* Turn off the power. */
530 gcmkVERIFY_OK(gckOS_SetGPUPower(Os, gcvFALSE, gcvFALSE));
531
532 if (hardware->globalSemaphore != gcvNULL)
533 {
534 /* Destroy the global semaphore. */
535 gcmkVERIFY_OK(gckOS_DestroySemaphore(Os,
536 hardware->globalSemaphore));
537 }
538
539 if (hardware->powerMutex != gcvNULL)
540 {
541 /* Destroy the power mutex. */
542 gcmkVERIFY_OK(gckOS_DeleteMutex(Os, hardware->powerMutex));
543 }
544
545 #if gcdPOWEROFF_TIMEOUT
546 if (hardware->powerOffSema != gcvNULL)
547 {
548 gcmkVERIFY_OK(gckOS_DeleteMutex(Os, &hardware->powerOffSema));
549 }
550 #endif
551
552 gcmkVERIFY_OK(gcmkOS_SAFE_FREE(Os, hardware));
553 }
554
555 /* Return the status. */
556 gcmkFOOTER();
557 return status;
558 }
559
560 /*******************************************************************************
561 **
562 ** gckHARDWARE_Destroy
563 **
564 ** Destroy an gckHARDWARE object.
565 **
566 ** INPUT:
567 **
568 ** gckHARDWARE Hardware
569 ** Pointer to the gckHARDWARE object that needs to be destroyed.
570 **
571 ** OUTPUT:
572 **
573 ** Nothing.
574 */
575 gceSTATUS
576 gckHARDWARE_Destroy(
577 IN gckHARDWARE Hardware
578 )
579 {
580 gceSTATUS status;
581
582 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
583
584 /* Verify the arguments. */
585 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
586
587 /* Turn off the power. */
588 gcmkVERIFY_OK(gckOS_SetGPUPower(Hardware->os, gcvFALSE, gcvFALSE));
589
590 /* Destroy the power semaphore. */
591 gcmkVERIFY_OK(gckOS_DestroySemaphore(Hardware->os,
592 Hardware->globalSemaphore));
593
594 /* Destroy the power mutex. */
595 gcmkVERIFY_OK(gckOS_DeleteMutex(Hardware->os, Hardware->powerMutex));
596
597 #if gcdPOWEROFF_TIMEOUT
598 gcmkVERIFY_OK(gckOS_DeleteMutex(Hardware->os, Hardware->powerOffSema));
599 #endif
600
601 /* Mark the object as unknown. */
602 Hardware->object.type = gcvOBJ_UNKNOWN;
603
604 /* Free the object. */
605 gcmkONERROR(gcmkOS_SAFE_FREE(Hardware->os, Hardware));
606
607 /* Success. */
608 gcmkFOOTER_NO();
609 return gcvSTATUS_OK;
610
611 OnError:
612 gcmkFOOTER();
613 return status;
614 }
615
616 /*******************************************************************************
617 **
618 ** gckHARDWARE_GetType
619 **
620 ** Get the hardware type.
621 **
622 ** INPUT:
623 **
624 ** gckHARDWARE Harwdare
625 ** Pointer to an gckHARDWARE object.
626 **
627 ** OUTPUT:
628 **
629 ** gceHARDWARE_TYPE * Type
630 ** Pointer to a variable that receives the type of hardware object.
631 */
632 gceSTATUS
633 gckHARDWARE_GetType(
634 IN gckHARDWARE Hardware,
635 OUT gceHARDWARE_TYPE * Type
636 )
637 {
638 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
639 gcmkVERIFY_ARGUMENT(Type != gcvNULL);
640
641 *Type = Hardware->type;
642
643 return gcvSTATUS_OK;
644 }
645
646 /*******************************************************************************
647 **
648 ** gckHARDWARE_InitializeHardware
649 **
650 ** Initialize the hardware.
651 **
652 ** INPUT:
653 **
654 ** gckHARDWARE Hardware
655 ** Pointer to the gckHARDWARE object.
656 **
657 ** OUTPUT:
658 **
659 ** Nothing.
660 */
661 gceSTATUS
662 gckHARDWARE_InitializeHardware(
663 IN gckHARDWARE Hardware
664 )
665 {
666 gceSTATUS status;
667 gctUINT32 baseAddress;
668 gctUINT32 chipRev;
669
670 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
671
672 /* Verify the arguments. */
673 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
674
675 /* Read the chip revision register. */
676 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
677 Hardware->core,
678 0x00024,
679 &chipRev));
680
681 if (chipRev != Hardware->chipRevision)
682 {
683 /* Chip is not there! */
684 gcmkONERROR(gcvSTATUS_CONTEXT_LOSSED);
685 }
686
687 /* Disable isolate GPU bit. */
688 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
689 Hardware->core,
690 0x00000,
691 ((((gctUINT32) (0x00000100)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)))));
692
693 /* Reset memory counters. */
694 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
695 Hardware->core,
696 0x0003C,
697 ~0U));
698
699 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
700 Hardware->core,
701 0x0003C,
702 0));
703
704 /* Get the system's physical base address. */
705 gcmkONERROR(gckOS_GetBaseAddress(Hardware->os, &baseAddress));
706
707 /* Program the base addesses. */
708 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
709 Hardware->core,
710 0x0041C,
711 baseAddress));
712
713 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
714 Hardware->core,
715 0x00418,
716 baseAddress));
717
718 #ifndef VIVANTE_NO_3D
719 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
720 Hardware->core,
721 0x00420,
722 baseAddress));
723
724 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
725 Hardware->core,
726 0x00428,
727 baseAddress));
728
729 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
730 Hardware->core,
731 0x00424,
732 baseAddress));
733 #endif
734
735 #if !VIVANTE_PROFILER && 1
736 {
737 gctUINT32 data;
738
739 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
740 Hardware->core,
741 Hardware->powerBaseAddress +
742 0x00100,
743 &data));
744
745 /* Enable clock gating. */
746 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
747
748 if ((Hardware->chipRevision == 0x4301)
749 || (Hardware->chipRevision == 0x4302)
750 )
751 {
752 /* Disable stall module level clock gating for 4.3.0.1 and 4.3.0.2
753 ** revisions. */
754 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
755 }
756
757 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
758 Hardware->core,
759 Hardware->powerBaseAddress
760 + 0x00100,
761 data));
762
763 #ifndef VIVANTE_NO_3D
764 /* Disable PE clock gating on revs < 5.0 when HZ is present without a
765 ** bug fix. */
766 if ((Hardware->chipRevision < 0x5000)
767 && ((((gctUINT32) (Hardware->chipMinorFeatures1)) >> (0 ? 9:9) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))) == (0x0 & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))))
768 && ((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 27:27) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))))
769 )
770 {
771 gcmkONERROR(
772 gckOS_ReadRegisterEx(Hardware->os,
773 Hardware->core,
774 Hardware->powerBaseAddress
775 + 0x00104,
776 &data));
777
778 /* Disable PE clock gating. */
779 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)));
780
781 gcmkONERROR(
782 gckOS_WriteRegisterEx(Hardware->os,
783 Hardware->core,
784 Hardware->powerBaseAddress
785 + 0x00104,
786 data));
787 }
788 #endif
789 }
790 #endif
791
792 /* Test if MMU is initialized. */
793 if ((Hardware->kernel != gcvNULL)
794 && (Hardware->kernel->mmu != gcvNULL)
795 )
796 {
797 /* Reset MMU. */
798 gcmkONERROR(
799 gckHARDWARE_SetMMU(Hardware,
800 Hardware->kernel->mmu->pageTableLogical));
801 }
802
803 /* Success. */
804 gcmkFOOTER_NO();
805 return gcvSTATUS_OK;
806
807 OnError:
808 /* Return the error. */
809 gcmkFOOTER();
810 return status;
811 }
812
813 /*******************************************************************************
814 **
815 ** gckHARDWARE_QueryMemory
816 **
817 ** Query the amount of memory available on the hardware.
818 **
819 ** INPUT:
820 **
821 ** gckHARDWARE Hardware
822 ** Pointer to the gckHARDWARE object.
823 **
824 ** OUTPUT:
825 **
826 ** gctSIZE_T * InternalSize
827 ** Pointer to a variable that will hold the size of the internal video
828 ** memory in bytes. If 'InternalSize' is gcvNULL, no information of the
829 ** internal memory will be returned.
830 **
831 ** gctUINT32 * InternalBaseAddress
832 ** Pointer to a variable that will hold the hardware's base address for
833 ** the internal video memory. This pointer cannot be gcvNULL if
834 ** 'InternalSize' is also non-gcvNULL.
835 **
836 ** gctUINT32 * InternalAlignment
837 ** Pointer to a variable that will hold the hardware's base address for
838 ** the internal video memory. This pointer cannot be gcvNULL if
839 ** 'InternalSize' is also non-gcvNULL.
840 **
841 ** gctSIZE_T * ExternalSize
842 ** Pointer to a variable that will hold the size of the external video
843 ** memory in bytes. If 'ExternalSize' is gcvNULL, no information of the
844 ** external memory will be returned.
845 **
846 ** gctUINT32 * ExternalBaseAddress
847 ** Pointer to a variable that will hold the hardware's base address for
848 ** the external video memory. This pointer cannot be gcvNULL if
849 ** 'ExternalSize' is also non-gcvNULL.
850 **
851 ** gctUINT32 * ExternalAlignment
852 ** Pointer to a variable that will hold the hardware's base address for
853 ** the external video memory. This pointer cannot be gcvNULL if
854 ** 'ExternalSize' is also non-gcvNULL.
855 **
856 ** gctUINT32 * HorizontalTileSize
857 ** Number of horizontal pixels per tile. If 'HorizontalTileSize' is
858 ** gcvNULL, no horizontal pixel per tile will be returned.
859 **
860 ** gctUINT32 * VerticalTileSize
861 ** Number of vertical pixels per tile. If 'VerticalTileSize' is
862 ** gcvNULL, no vertical pixel per tile will be returned.
863 */
864 gceSTATUS
865 gckHARDWARE_QueryMemory(
866 IN gckHARDWARE Hardware,
867 OUT gctSIZE_T * InternalSize,
868 OUT gctUINT32 * InternalBaseAddress,
869 OUT gctUINT32 * InternalAlignment,
870 OUT gctSIZE_T * ExternalSize,
871 OUT gctUINT32 * ExternalBaseAddress,
872 OUT gctUINT32 * ExternalAlignment,
873 OUT gctUINT32 * HorizontalTileSize,
874 OUT gctUINT32 * VerticalTileSize
875 )
876 {
877 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
878
879 /* Verify the arguments. */
880 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
881
882 if (InternalSize != gcvNULL)
883 {
884 /* No internal memory. */
885 *InternalSize = 0;
886 }
887
888 if (ExternalSize != gcvNULL)
889 {
890 /* No external memory. */
891 *ExternalSize = 0;
892 }
893
894 if (HorizontalTileSize != gcvNULL)
895 {
896 /* 4x4 tiles. */
897 *HorizontalTileSize = 4;
898 }
899
900 if (VerticalTileSize != gcvNULL)
901 {
902 /* 4x4 tiles. */
903 *VerticalTileSize = 4;
904 }
905
906 /* Success. */
907 gcmkFOOTER_ARG("*InternalSize=%lu *InternalBaseAddress=0x%08x "
908 "*InternalAlignment=0x%08x *ExternalSize=%lu "
909 "*ExternalBaseAddress=0x%08x *ExtenalAlignment=0x%08x "
910 "*HorizontalTileSize=%u *VerticalTileSize=%u",
911 gcmOPT_VALUE(InternalSize),
912 gcmOPT_VALUE(InternalBaseAddress),
913 gcmOPT_VALUE(InternalAlignment),
914 gcmOPT_VALUE(ExternalSize),
915 gcmOPT_VALUE(ExternalBaseAddress),
916 gcmOPT_VALUE(ExternalAlignment),
917 gcmOPT_VALUE(HorizontalTileSize),
918 gcmOPT_VALUE(VerticalTileSize));
919 return gcvSTATUS_OK;
920 }
921
922 /*******************************************************************************
923 **
924 ** gckHARDWARE_QueryChipIdentity
925 **
926 ** Query the identity of the hardware.
927 **
928 ** INPUT:
929 **
930 ** gckHARDWARE Hardware
931 ** Pointer to the gckHARDWARE object.
932 **
933 ** OUTPUT:
934 **
935 ** gceCHIPMODEL * ChipModel
936 ** If 'ChipModel' is not gcvNULL, the variable it points to will
937 ** receive the model of the chip.
938 **
939 ** gctUINT32 * ChipRevision
940 ** If 'ChipRevision' is not gcvNULL, the variable it points to will
941 ** receive the revision of the chip.
942 **
943 ** gctUINT32 * ChipFeatures
944 ** If 'ChipFeatures' is not gcvNULL, the variable it points to will
945 ** receive the feature set of the chip.
946 **
947 ** gctUINT32 * ChipMinorFeatures
948 ** If 'ChipMinorFeatures' is not gcvNULL, the variable it points to
949 ** will receive the minor feature set of the chip.
950 **
951 ** gctUINT32 * ChipMinorFeatures1
952 ** If 'ChipMinorFeatures1' is not gcvNULL, the variable it points to
953 ** will receive the minor feature set 1 of the chip.
954 **
955 ** gctUINT32 * ChipMinorFeatures2
956 ** If 'ChipMinorFeatures2' is not gcvNULL, the variable it points to
957 ** will receive the minor feature set 2 of the chip.
958 **
959 */
960 gceSTATUS
961 gckHARDWARE_QueryChipIdentity(
962 IN gckHARDWARE Hardware,
963 OUT gceCHIPMODEL * ChipModel,
964 OUT gctUINT32 * ChipRevision,
965 OUT gctUINT32* ChipFeatures,
966 OUT gctUINT32* ChipMinorFeatures,
967 OUT gctUINT32* ChipMinorFeatures1,
968 OUT gctUINT32* ChipMinorFeatures2,
969 OUT gctUINT32* ChipMinorFeatures3
970 )
971 {
972 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
973
974 /* Verify the arguments. */
975 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
976
977 /* Return chip model. */
978 if (ChipModel != gcvNULL)
979 {
980 *ChipModel = Hardware->chipModel;
981 }
982
983 /* Return revision number. */
984 if (ChipRevision != gcvNULL)
985 {
986 *ChipRevision = Hardware->chipRevision;
987 }
988
989 /* Return feature set. */
990 if (ChipFeatures != gcvNULL)
991 {
992 gctUINT32 features = Hardware->chipFeatures;
993
994 if ((((((gctUINT32) (features)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
995 {
996 /* Override fast clear by command line. */
997 features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (Hardware->allowFastClear) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
998 }
999
1000 if ((((((gctUINT32) (features)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) ))
1001 {
1002 /* Override compression by command line. */
1003 features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) ((gctUINT32) (Hardware->allowCompression) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
1004 }
1005
1006 /* Mark 2D pipe as available for GC500.0 through GC500.2 and GC300,
1007 ** since they did not have this bit. */
1008 if (((Hardware->chipModel == gcv500)
1009 && (Hardware->chipRevision <= 2)
1010 )
1011 || (Hardware->chipModel == gcv300)
1012 )
1013 {
1014 features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)));
1015 }
1016
1017 *ChipFeatures = features;
1018 }
1019
1020 /* Return minor feature set. */
1021 if (ChipMinorFeatures != gcvNULL)
1022 {
1023 *ChipMinorFeatures = Hardware->chipMinorFeatures0;
1024 }
1025
1026 /* Return minor feature set 1. */
1027 if (ChipMinorFeatures1 != gcvNULL)
1028 {
1029 *ChipMinorFeatures1 = Hardware->chipMinorFeatures1;
1030 }
1031
1032 /* Return minor feature set 2. */
1033 if (ChipMinorFeatures2 != gcvNULL)
1034 {
1035 *ChipMinorFeatures2 = Hardware->chipMinorFeatures2;
1036 }
1037
1038 /* Return minor feature set 3. */
1039 if (ChipMinorFeatures3 != gcvNULL)
1040 {
1041 *ChipMinorFeatures3 = Hardware->chipMinorFeatures3;
1042 }
1043
1044 /* Success. */
1045 gcmkFOOTER_ARG("*ChipModel=0x%x *ChipRevision=0x%x *ChipFeatures=0x%08x "
1046 "*ChipMinorFeatures=0x%08x *ChipMinorFeatures1=0x%08x "
1047 "*ChipMinorFeatures2=0x%08x *ChipMinorFeatures3=0x%08x",
1048 gcmOPT_VALUE(ChipModel),
1049 gcmOPT_VALUE(ChipRevision),
1050 gcmOPT_VALUE(ChipFeatures),
1051 gcmOPT_VALUE(ChipMinorFeatures),
1052 gcmOPT_VALUE(ChipMinorFeatures1),
1053 gcmOPT_VALUE(ChipMinorFeatures2),
1054 gcmOPT_VALUE(ChipMinorFeatures3));
1055
1056 return gcvSTATUS_OK;
1057 }
1058
1059 gceSTATUS
1060 gckHARDWARE_QueryChipSpecs(
1061 IN gckHARDWARE Hardware,
1062 OUT gctUINT32_PTR StreamCount,
1063 OUT gctUINT32_PTR RegisterMax,
1064 OUT gctUINT32_PTR ThreadCount,
1065 OUT gctUINT32_PTR ShaderCoreCount,
1066 OUT gctUINT32_PTR VertexCacheSize,
1067 OUT gctUINT32_PTR VertexOutputBufferSize,
1068 OUT gctUINT32_PTR PixelPipes,
1069 OUT gctUINT32_PTR InstructionCount,
1070 OUT gctUINT32_PTR NumConstants,
1071 OUT gctUINT32_PTR BufferSize
1072 )
1073 {
1074 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1075
1076 /* Verify the arguments. */
1077 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1078
1079 /* Return the number of streams. */
1080 if (StreamCount != gcvNULL)
1081 {
1082 *StreamCount = Hardware->streamCount;
1083 }
1084
1085 /* Return the number of temporary registers. */
1086 if (RegisterMax != gcvNULL)
1087 {
1088 *RegisterMax = Hardware->registerMax;
1089 }
1090
1091 /* Return the maximum number of thrteads. */
1092 if (ThreadCount != gcvNULL)
1093 {
1094 *ThreadCount = Hardware->threadCount;
1095 }
1096
1097 /* Return the number of shader cores. */
1098 if (ShaderCoreCount != gcvNULL)
1099 {
1100 *ShaderCoreCount = Hardware->shaderCoreCount;
1101 }
1102
1103 /* Return the number of entries in the vertex cache. */
1104 if (VertexCacheSize != gcvNULL)
1105 {
1106 *VertexCacheSize = Hardware->vertexCacheSize;
1107 }
1108
1109 /* Return the number of entries in the vertex output buffer. */
1110 if (VertexOutputBufferSize != gcvNULL)
1111 {
1112 *VertexOutputBufferSize = Hardware->vertexOutputBufferSize;
1113 }
1114
1115 /* Return the number of pixel pipes. */
1116 if (PixelPipes != gcvNULL)
1117 {
1118 *PixelPipes = Hardware->pixelPipes;
1119 }
1120
1121 /* Return the number of instructions. */
1122 if (InstructionCount != gcvNULL)
1123 {
1124 *InstructionCount = Hardware->instructionCount;
1125 }
1126
1127 /* Return the number of constants. */
1128 if (NumConstants != gcvNULL)
1129 {
1130 *NumConstants = Hardware->numConstants;
1131 }
1132
1133 /* Return the buffer size. */
1134 if (BufferSize != gcvNULL)
1135 {
1136 *BufferSize = Hardware->bufferSize;
1137 }
1138
1139 /* Success. */
1140 gcmkFOOTER_ARG("*StreamCount=%u *RegisterMax=%u *ThreadCount=%u "
1141 "*ShaderCoreCount=%u *VertexCacheSize=%u "
1142 "*VertexOutputBufferSize=%u *PixelPipes=%u",
1143 "*InstructionCount=%u *NumConstants=%u *BufferSize=%u",
1144 gcmOPT_VALUE(StreamCount), gcmOPT_VALUE(RegisterMax),
1145 gcmOPT_VALUE(ThreadCount), gcmOPT_VALUE(ShaderCoreCount),
1146 gcmOPT_VALUE(VertexCacheSize),
1147 gcmOPT_VALUE(VertexOutputBufferSize),
1148 gcmOPT_VALUE(PixelPipes),
1149 gcmOPT_VALUE(InstructionCount),
1150 gcmOPT_VALUE(NumConstants),
1151 gcmOPT_VALUE(BufferSize));
1152
1153 return gcvSTATUS_OK;
1154 }
1155
1156 /*******************************************************************************
1157 **
1158 ** gckHARDWARE_ConvertFormat
1159 **
1160 ** Convert an API format to hardware parameters.
1161 **
1162 ** INPUT:
1163 **
1164 ** gckHARDWARE Hardware
1165 ** Pointer to the gckHARDWARE object.
1166 **
1167 ** gceSURF_FORMAT Format
1168 ** API format to convert.
1169 **
1170 ** OUTPUT:
1171 **
1172 ** gctUINT32 * BitsPerPixel
1173 ** Pointer to a variable that will hold the number of bits per pixel.
1174 **
1175 ** gctUINT32 * BytesPerTile
1176 ** Pointer to a variable that will hold the number of bytes per tile.
1177 */
1178 gceSTATUS
1179 gckHARDWARE_ConvertFormat(
1180 IN gckHARDWARE Hardware,
1181 IN gceSURF_FORMAT Format,
1182 OUT gctUINT32 * BitsPerPixel,
1183 OUT gctUINT32 * BytesPerTile
1184 )
1185 {
1186 gctUINT32 bitsPerPixel;
1187 gctUINT32 bytesPerTile;
1188
1189 gcmkHEADER_ARG("Hardware=0x%x Format=%d", Hardware, Format);
1190
1191 /* Verify the arguments. */
1192 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1193
1194 /* Dispatch on format. */
1195 switch (Format)
1196 {
1197 case gcvSURF_INDEX8:
1198 case gcvSURF_A8:
1199 case gcvSURF_L8:
1200 /* 8-bpp format. */
1201 bitsPerPixel = 8;
1202 bytesPerTile = (8 * 4 * 4) / 8;
1203 break;
1204
1205 case gcvSURF_YV12:
1206 case gcvSURF_I420:
1207 case gcvSURF_NV12:
1208 case gcvSURF_NV21:
1209 /* 12-bpp planar YUV formats. */
1210 bitsPerPixel = 12;
1211 bytesPerTile = (12 * 4 * 4) / 8;
1212 break;
1213
1214 case gcvSURF_A8L8:
1215 case gcvSURF_X4R4G4B4:
1216 case gcvSURF_A4R4G4B4:
1217 case gcvSURF_X1R5G5B5:
1218 case gcvSURF_A1R5G5B5:
1219 case gcvSURF_R5G5B5X1:
1220 case gcvSURF_R4G4B4X4:
1221 case gcvSURF_X4B4G4R4:
1222 case gcvSURF_X1B5G5R5:
1223 case gcvSURF_B4G4R4X4:
1224 case gcvSURF_R5G6B5:
1225 case gcvSURF_B5G5R5X1:
1226 case gcvSURF_YUY2:
1227 case gcvSURF_UYVY:
1228 case gcvSURF_YVYU:
1229 case gcvSURF_VYUY:
1230 case gcvSURF_NV16:
1231 case gcvSURF_NV61:
1232 case gcvSURF_D16:
1233 /* 16-bpp format. */
1234 bitsPerPixel = 16;
1235 bytesPerTile = (16 * 4 * 4) / 8;
1236 break;
1237
1238 case gcvSURF_X8R8G8B8:
1239 case gcvSURF_A8R8G8B8:
1240 case gcvSURF_X8B8G8R8:
1241 case gcvSURF_A8B8G8R8:
1242 case gcvSURF_R8G8B8X8:
1243 case gcvSURF_D32:
1244 /* 32-bpp format. */
1245 bitsPerPixel = 32;
1246 bytesPerTile = (32 * 4 * 4) / 8;
1247 break;
1248
1249 case gcvSURF_D24S8:
1250 case gcvSURF_D24X8:
1251 /* 24-bpp format. */
1252 bitsPerPixel = 32;
1253 bytesPerTile = (32 * 4 * 4) / 8;
1254 break;
1255
1256 case gcvSURF_DXT1:
1257 case gcvSURF_ETC1:
1258 bitsPerPixel = 4;
1259 bytesPerTile = (4 * 4 * 4) / 8;
1260 break;
1261
1262 case gcvSURF_DXT2:
1263 case gcvSURF_DXT3:
1264 case gcvSURF_DXT4:
1265 case gcvSURF_DXT5:
1266 bitsPerPixel = 8;
1267 bytesPerTile = (8 * 4 * 4) / 8;
1268 break;
1269
1270 default:
1271 /* Invalid format. */
1272 gcmkFOOTER_ARG("status=%d", gcvSTATUS_INVALID_ARGUMENT);
1273 return gcvSTATUS_INVALID_ARGUMENT;
1274 }
1275
1276 /* Set the result. */
1277 if (BitsPerPixel != gcvNULL)
1278 {
1279 * BitsPerPixel = bitsPerPixel;
1280 }
1281
1282 if (BytesPerTile != gcvNULL)
1283 {
1284 * BytesPerTile = bytesPerTile;
1285 }
1286
1287 /* Success. */
1288 gcmkFOOTER_ARG("*BitsPerPixel=%u *BytesPerTile=%u",
1289 gcmOPT_VALUE(BitsPerPixel), gcmOPT_VALUE(BytesPerTile));
1290 return gcvSTATUS_OK;
1291 }
1292
1293 /*******************************************************************************
1294 **
1295 ** gckHARDWARE_SplitMemory
1296 **
1297 ** Split a hardware specific memory address into a pool and offset.
1298 **
1299 ** INPUT:
1300 **
1301 ** gckHARDWARE Hardware
1302 ** Pointer to the gckHARDWARE object.
1303 **
1304 ** gctUINT32 Address
1305 ** Address in hardware specific format.
1306 **
1307 ** OUTPUT:
1308 **
1309 ** gcePOOL * Pool
1310 ** Pointer to a variable that will hold the pool type for the address.
1311 **
1312 ** gctUINT32 * Offset
1313 ** Pointer to a variable that will hold the offset for the address.
1314 */
1315 gceSTATUS
1316 gckHARDWARE_SplitMemory(
1317 IN gckHARDWARE Hardware,
1318 IN gctUINT32 Address,
1319 OUT gcePOOL * Pool,
1320 OUT gctUINT32 * Offset
1321 )
1322 {
1323 gcmkHEADER_ARG("Hardware=0x%x Addres=0x%08x", Hardware, Address);
1324
1325 /* Verify the arguments. */
1326 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1327 gcmkVERIFY_ARGUMENT(Pool != gcvNULL);
1328 gcmkVERIFY_ARGUMENT(Offset != gcvNULL);
1329
1330 /* Dispatch on memory type. */
1331 switch ((((((gctUINT32) (Address)) >> (0 ? 31:31)) & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))) ))
1332 {
1333 case 0x0:
1334 /* System memory. */
1335 *Pool = gcvPOOL_SYSTEM;
1336 break;
1337
1338 case 0x1:
1339 /* Virtual memory. */
1340 *Pool = gcvPOOL_VIRTUAL;
1341 break;
1342
1343 default:
1344 /* Invalid memory type. */
1345 gcmkFOOTER_ARG("status=%d", gcvSTATUS_INVALID_ARGUMENT);
1346 return gcvSTATUS_INVALID_ARGUMENT;
1347 }
1348
1349 /* Return offset of address. */
1350 *Offset = (((((gctUINT32) (Address)) >> (0 ? 30:0)) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1)))))) );
1351
1352 /* Success. */
1353 gcmkFOOTER_ARG("*Pool=%d *Offset=0x%08x", *Pool, *Offset);
1354 return gcvSTATUS_OK;
1355 }
1356
1357 /*******************************************************************************
1358 **
1359 ** gckHARDWARE_Execute
1360 **
1361 ** Kickstart the hardware's command processor with an initialized command
1362 ** buffer.
1363 **
1364 ** INPUT:
1365 **
1366 ** gckHARDWARE Hardware
1367 ** Pointer to the gckHARDWARE object.
1368 **
1369 ** gctPOINTER Logical
1370 ** Logical address of command buffer.
1371 **
1372 ** gctSIZE_T Bytes
1373 ** Number of bytes for the prefetch unit (until after the first LINK).
1374 **
1375 ** OUTPUT:
1376 **
1377 ** Nothing.
1378 */
1379 gceSTATUS
1380 gckHARDWARE_Execute(
1381 IN gckHARDWARE Hardware,
1382 IN gctPOINTER Logical,
1383 #ifdef __QNXNTO__
1384 IN gctPOINTER Physical,
1385 IN gctBOOL PhysicalAddresses,
1386 #endif
1387 IN gctSIZE_T Bytes
1388 )
1389 {
1390 gceSTATUS status;
1391 gctUINT32 address = 0, control;
1392
1393 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Bytes=%lu",
1394 Hardware, Logical, Bytes);
1395
1396 /* Verify the arguments. */
1397 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1398 gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
1399
1400 #ifdef __QNXNTO__
1401 if (PhysicalAddresses)
1402 {
1403 /* Convert physical into hardware specific address. */
1404 gcmkONERROR(
1405 gckHARDWARE_ConvertPhysical(Hardware, Physical, &address));
1406 }
1407 else
1408 {
1409 #endif
1410 /* Convert logical into hardware specific address. */
1411 gcmkONERROR(
1412 gckHARDWARE_ConvertLogical(Hardware, Logical, &address));
1413 #ifdef __QNXNTO__
1414 }
1415 #endif
1416
1417 /* Enable all events. */
1418 gcmkONERROR(
1419 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00014, ~0U));
1420
1421 /* Write address register. */
1422 gcmkONERROR(
1423 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00654, address));
1424
1425 /* Build control register. */
1426 control = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)))
1427 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) ((Bytes + 7) >> 3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1428
1429 /* Set big endian */
1430 if (Hardware->bigEndian)
1431 {
1432 control |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 21:20) - (0 ? 21:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:20) - (0 ? 21:20) + 1))))))) << (0 ? 21:20))) | (((gctUINT32) (0x2 & ((gctUINT32) ((((1 ? 21:20) - (0 ? 21:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:20) - (0 ? 21:20) + 1))))))) << (0 ? 21:20)));
1433 }
1434
1435 /* Write control register. */
1436 gcmkONERROR(
1437 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00658, control));
1438
1439 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
1440 "Started command buffer @ 0x%08x",
1441 address);
1442
1443 /* Success. */
1444 gcmkFOOTER_NO();
1445 return gcvSTATUS_OK;
1446
1447 OnError:
1448 /* Return the status. */
1449 gcmkFOOTER();
1450 return status;
1451 }
1452
1453 /*******************************************************************************
1454 **
1455 ** gckHARDWARE_WaitLink
1456 **
1457 ** Append a WAIT/LINK command sequence at the specified location in the command
1458 ** queue.
1459 **
1460 ** INPUT:
1461 **
1462 ** gckHARDWARE Hardware
1463 ** Pointer to an gckHARDWARE object.
1464 **
1465 ** gctPOINTER Logical
1466 ** Pointer to the current location inside the command queue to append
1467 ** WAIT/LINK command sequence at or gcvNULL just to query the size of the
1468 ** WAIT/LINK command sequence.
1469 **
1470 ** gctUINT32 Offset
1471 ** Offset into command buffer required for alignment.
1472 **
1473 ** gctSIZE_T * Bytes
1474 ** Pointer to the number of bytes available for the WAIT/LINK command
1475 ** sequence. If 'Logical' is gcvNULL, this argument will be ignored.
1476 **
1477 ** OUTPUT:
1478 **
1479 ** gctSIZE_T * Bytes
1480 ** Pointer to a variable that will receive the number of bytes required
1481 ** by the WAIT/LINK command sequence. If 'Bytes' is gcvNULL, nothing will
1482 ** be returned.
1483 **
1484 ** gctUINT32 * WaitOffset
1485 ** Pointer to a variable that will receive the offset of the WAIT command
1486 ** from the specified logcial pointer.
1487 ** If 'WaitOffset' is gcvNULL nothing will be returned.
1488 **
1489 ** gctSIZE_T * WaitSize
1490 ** Pointer to a variable that will receive the number of bytes used by
1491 ** the WAIT command. If 'LinkSize' is gcvNULL nothing will be returned.
1492 */
1493 gceSTATUS
1494 gckHARDWARE_WaitLink(
1495 IN gckHARDWARE Hardware,
1496 IN gctPOINTER Logical,
1497 IN gctUINT32 Offset,
1498 IN OUT gctSIZE_T * Bytes,
1499 OUT gctUINT32 * WaitOffset,
1500 OUT gctSIZE_T * WaitSize
1501 )
1502 {
1503 static const gctUINT waitCount = 200;
1504
1505 gceSTATUS status;
1506 gctUINT32 address;
1507 gctUINT32_PTR logical;
1508 gctSIZE_T bytes;
1509
1510 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Offset=0x%08x *Bytes=%lu",
1511 Hardware, Logical, Offset, gcmOPT_VALUE(Bytes));
1512
1513 /* Verify the arguments. */
1514 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1515 gcmkVERIFY_ARGUMENT((Logical != gcvNULL) || (Bytes != gcvNULL));
1516
1517 /* Compute number of bytes required. */
1518 #if gcd6000_SUPPORT
1519 bytes = gcmALIGN(Offset + 96, 8) - Offset;
1520 #else
1521 bytes = gcmALIGN(Offset + 16, 8) - Offset;
1522 #endif
1523
1524 /* Cast the input pointer. */
1525 logical = (gctUINT32_PTR) Logical;
1526
1527 if (logical != gcvNULL)
1528 {
1529 /* Not enough space? */
1530 if (*Bytes < bytes)
1531 {
1532 /* Command queue too small. */
1533 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
1534 }
1535
1536 /* Convert logical into hardware specific address. */
1537 gcmkONERROR(gckHARDWARE_ConvertLogical(Hardware, logical, &address));
1538
1539 /* Store the WAIT/LINK address. */
1540 Hardware->lastWaitLink = address;
1541
1542 /* Append WAIT(count). */
1543 logical[0]
1544 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1545 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (waitCount) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1546
1547 #if gcd6000_SUPPORT
1548 /* Send FE-PE sempahore token. */
1549 logical[2]
1550 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1551 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
1552 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1553
1554 logical[3]
1555 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
1556 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
1557
1558 /* Send FE-PE stall token. */
1559 logical[4]
1560 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1561 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
1562 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0F00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1563
1564 logical[5]
1565 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
1566 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
1567
1568 /*************************************************************/
1569 /* Enable chip ID 0. */
1570 logical[6] =
1571 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x0D & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1572 | (1 << 0);
1573
1574 /* Send semaphore from FE to ChipID 1. */
1575 logical[8] =
1576 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1577 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
1578 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1579
1580 logical[9] =
1581 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
1582 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x0F & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)))
1583 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24)));
1584
1585 /* Send semaphore from FE to ChipID 1. */
1586 logical[10] =
1587 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
1588
1589 logical[11] =
1590 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
1591 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x0F & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)))
1592 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24)));
1593
1594 /*************************************************************/
1595 /* Enable chip ID 1. */
1596 logical[12] =
1597 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x0D & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1598 | (1 << 1);
1599
1600 /* Send semaphore from FE to ChipID 1. */
1601 logical[14] =
1602 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1603 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
1604 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1605
1606 logical[15] =
1607 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
1608 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x0F & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)))
1609 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24)));
1610
1611 /* Wait for semaphore from ChipID 0. */
1612 logical[16] =
1613 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
1614
1615 logical[17] =
1616 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
1617 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x0F & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)))
1618 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24)));
1619
1620 /*************************************************************/
1621 /* Enable all chips. */
1622 logical[18] =
1623 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x0D & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1624 | (0xFFFF);
1625
1626 /* LoadState(AQFlush, 1), flush. */
1627 logical[20]
1628 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1629 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
1630 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
1631
1632 logical[21]
1633 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? AQ_FLUSH_L2_CACHE) - (0 ? AQ_FLUSH_L2_CACHE) + 1) == 32) ? ~0 : (~(~0 << ((1 ? AQ_FLUSH_L2_CACHE) - (0 ? AQ_FLUSH_L2_CACHE) + 1))))))) << (0 ? AQ_FLUSH_L2_CACHE))) | (((gctUINT32) (AQ_FLUSH_L2_CACHE_ENABLE & ((gctUINT32) ((((1 ? AQ_FLUSH_L2_CACHE) - (0 ? AQ_FLUSH_L2_CACHE) + 1) == 32) ? ~0 : (~(~0 << ((1 ? AQ_FLUSH_L2_CACHE) - (0 ? AQ_FLUSH_L2_CACHE) + 1))))))) << (0 ? AQ_FLUSH_L2_CACHE)));
1634
1635 /* Append LINK(2, address). */
1636 logical[22]
1637 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1638 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes >> 3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1639
1640 logical[23] = address;
1641 #else
1642 /* Append LINK(2, address). */
1643 logical[2]
1644 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1645 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes >> 3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1646
1647 logical[3] = address;
1648
1649 gcmkTRACE_ZONE(
1650 gcvLEVEL_INFO, gcvZONE_HARDWARE,
1651 "0x%08x: WAIT %u", address, waitCount
1652 );
1653
1654 gcmkTRACE_ZONE(
1655 gcvLEVEL_INFO, gcvZONE_HARDWARE,
1656 "0x%08x: LINK 0x%08x, #%lu",
1657 address + 8, address, bytes
1658 );
1659 #endif
1660
1661 if (WaitOffset != gcvNULL)
1662 {
1663 /* Return the offset pointer to WAIT command. */
1664 *WaitOffset = 0;
1665 }
1666
1667 if (WaitSize != gcvNULL)
1668 {
1669 /* Return number of bytes used by the WAIT command. */
1670 *WaitSize = 8;
1671 }
1672 }
1673
1674 if (Bytes != gcvNULL)
1675 {
1676 /* Return number of bytes required by the WAIT/LINK command
1677 ** sequence. */
1678 *Bytes = bytes;
1679 }
1680
1681 /* Success. */
1682 gcmkFOOTER_ARG("*Bytes=%lu *WaitOffset=0x%x *WaitSize=%lu",
1683 gcmOPT_VALUE(Bytes), gcmOPT_VALUE(WaitOffset),
1684 gcmOPT_VALUE(WaitSize));
1685 return gcvSTATUS_OK;
1686
1687 OnError:
1688 /* Return the status. */
1689 gcmkFOOTER();
1690 return status;
1691 }
1692
1693 /*******************************************************************************
1694 **
1695 ** gckHARDWARE_End
1696 **
1697 ** Append an END command at the specified location in the command queue.
1698 **
1699 ** INPUT:
1700 **
1701 ** gckHARDWARE Hardware
1702 ** Pointer to an gckHARDWARE object.
1703 **
1704 ** gctPOINTER Logical
1705 ** Pointer to the current location inside the command queue to append
1706 ** END command at or gcvNULL just to query the size of the END command.
1707 **
1708 ** gctSIZE_T * Bytes
1709 ** Pointer to the number of bytes available for the END command. If
1710 ** 'Logical' is gcvNULL, this argument will be ignored.
1711 **
1712 ** OUTPUT:
1713 **
1714 ** gctSIZE_T * Bytes
1715 ** Pointer to a variable that will receive the number of bytes required
1716 ** for the END command. If 'Bytes' is gcvNULL, nothing will be returned.
1717 */
1718 gceSTATUS
1719 gckHARDWARE_End(
1720 IN gckHARDWARE Hardware,
1721 IN gctPOINTER Logical,
1722 IN OUT gctSIZE_T * Bytes
1723 )
1724 {
1725 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
1726 gceSTATUS status;
1727
1728 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x *Bytes=%lu",
1729 Hardware, Logical, gcmOPT_VALUE(Bytes));
1730
1731 /* Verify the arguments. */
1732 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1733 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
1734
1735 if (Logical != gcvNULL)
1736 {
1737 if (*Bytes < 8)
1738 {
1739 /* Command queue too small. */
1740 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
1741 }
1742
1743 /* Append END. */
1744 logical[0] =
1745 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x02 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
1746
1747 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "0x%x: END", Logical);
1748
1749 /* Make sure the CPU writes out the data to memory. */
1750 gcmkONERROR(
1751 gckOS_MemoryBarrier(Hardware->os, Logical));
1752 }
1753
1754 if (Bytes != gcvNULL)
1755 {
1756 /* Return number of bytes required by the END command. */
1757 *Bytes = 8;
1758 }
1759
1760 /* Success. */
1761 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
1762 return gcvSTATUS_OK;
1763
1764 OnError:
1765 /* Return the status. */
1766 gcmkFOOTER();
1767 return status;
1768 }
1769
1770 /*******************************************************************************
1771 **
1772 ** gckHARDWARE_Nop
1773 **
1774 ** Append a NOP command at the specified location in the command queue.
1775 **
1776 ** INPUT:
1777 **
1778 ** gckHARDWARE Hardware
1779 ** Pointer to an gckHARDWARE object.
1780 **
1781 ** gctPOINTER Logical
1782 ** Pointer to the current location inside the command queue to append
1783 ** NOP command at or gcvNULL just to query the size of the NOP command.
1784 **
1785 ** gctSIZE_T * Bytes
1786 ** Pointer to the number of bytes available for the NOP command. If
1787 ** 'Logical' is gcvNULL, this argument will be ignored.
1788 **
1789 ** OUTPUT:
1790 **
1791 ** gctSIZE_T * Bytes
1792 ** Pointer to a variable that will receive the number of bytes required
1793 ** for the NOP command. If 'Bytes' is gcvNULL, nothing will be returned.
1794 */
1795 gceSTATUS
1796 gckHARDWARE_Nop(
1797 IN gckHARDWARE Hardware,
1798 IN gctPOINTER Logical,
1799 IN OUT gctSIZE_T * Bytes
1800 )
1801 {
1802 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
1803 gceSTATUS status;
1804
1805 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x *Bytes=%lu",
1806 Hardware, Logical, gcmOPT_VALUE(Bytes));
1807
1808 /* Verify the arguments. */
1809 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1810 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
1811
1812 if (Logical != gcvNULL)
1813 {
1814 if (*Bytes < 8)
1815 {
1816 /* Command queue too small. */
1817 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
1818 }
1819
1820 /* Append NOP. */
1821 logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x03 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
1822
1823 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "0x%x: NOP", Logical);
1824 }
1825
1826 if (Bytes != gcvNULL)
1827 {
1828 /* Return number of bytes required by the NOP command. */
1829 *Bytes = 8;
1830 }
1831
1832 /* Success. */
1833 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
1834 return gcvSTATUS_OK;
1835
1836 OnError:
1837 /* Return the status. */
1838 gcmkFOOTER();
1839 return status;
1840 }
1841
1842 /*******************************************************************************
1843 **
1844 ** gckHARDWARE_Wait
1845 **
1846 ** Append a WAIT command at the specified location in the command queue.
1847 **
1848 ** INPUT:
1849 **
1850 ** gckHARDWARE Hardware
1851 ** Pointer to an gckHARDWARE object.
1852 **
1853 ** gctPOINTER Logical
1854 ** Pointer to the current location inside the command queue to append
1855 ** WAIT command at or gcvNULL just to query the size of the WAIT command.
1856 **
1857 ** gctUINT32 Count
1858 ** Number of cycles to wait.
1859 **
1860 ** gctSIZE_T * Bytes
1861 ** Pointer to the number of bytes available for the WAIT command. If
1862 ** 'Logical' is gcvNULL, this argument will be ignored.
1863 **
1864 ** OUTPUT:
1865 **
1866 ** gctSIZE_T * Bytes
1867 ** Pointer to a variable that will receive the number of bytes required
1868 ** for the NOP command. If 'Bytes' is gcvNULL, nothing will be returned.
1869 */
1870 gceSTATUS
1871 gckHARDWARE_Wait(
1872 IN gckHARDWARE Hardware,
1873 IN gctPOINTER Logical,
1874 IN gctUINT32 Count,
1875 IN OUT gctSIZE_T * Bytes
1876 )
1877 {
1878 gceSTATUS status;
1879 gctUINT32_PTR logical;
1880
1881 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Count=%u *Bytes=%lu",
1882 Hardware, Logical, Count, gcmOPT_VALUE(Bytes));
1883
1884 /* Verify the arguments. */
1885 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1886 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
1887
1888 /* Cast the input pointer. */
1889 logical = (gctUINT32_PTR) Logical;
1890
1891 if (Logical != gcvNULL)
1892 {
1893 if (*Bytes < 8)
1894 {
1895 /* Command queue too small. */
1896 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
1897 }
1898
1899 /* Append WAIT. */
1900 logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
1901 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (Count) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
1902
1903 #if gcmIS_DEBUG(gcdDEBUG_TRACE)
1904 {
1905 gctUINT32 address;
1906
1907 /* Convert logical into hardware specific address. */
1908 gcmkONERROR(gckHARDWARE_ConvertLogical(
1909 Hardware, logical, &address
1910 ));
1911
1912 gcmkTRACE_ZONE(
1913 gcvLEVEL_INFO, gcvZONE_HARDWARE,
1914 "0x%08x: WAIT %u", address, Count
1915 );
1916 }
1917 #endif
1918 }
1919
1920 if (Bytes != gcvNULL)
1921 {
1922 /* Return number of bytes required by the WAIT command. */
1923 *Bytes = 8;
1924 }
1925
1926 /* Success. */
1927 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
1928 return gcvSTATUS_OK;
1929
1930 OnError:
1931 /* Return the status. */
1932 gcmkFOOTER();
1933 return status;
1934 }
1935
1936 /*******************************************************************************
1937 **
1938 ** gckHARDWARE_Event
1939 **
1940 ** Append an EVENT command at the specified location in the command queue.
1941 **
1942 ** INPUT:
1943 **
1944 ** gckHARDWARE Hardware
1945 ** Pointer to an gckHARDWARE object.
1946 **
1947 ** gctPOINTER Logical
1948 ** Pointer to the current location inside the command queue to append
1949 ** the EVENT command at or gcvNULL just to query the size of the EVENT
1950 ** command.
1951 **
1952 ** gctUINT8 Event
1953 ** Event ID to program.
1954 **
1955 ** gceKERNEL_WHERE FromWhere
1956 ** Location of the pipe to send the event.
1957 **
1958 ** gctSIZE_T * Bytes
1959 ** Pointer to the number of bytes available for the EVENT command. If
1960 ** 'Logical' is gcvNULL, this argument will be ignored.
1961 **
1962 ** OUTPUT:
1963 **
1964 ** gctSIZE_T * Bytes
1965 ** Pointer to a variable that will receive the number of bytes required
1966 ** for the EVENT command. If 'Bytes' is gcvNULL, nothing will be
1967 ** returned.
1968 */
1969 gceSTATUS
1970 gckHARDWARE_Event(
1971 IN gckHARDWARE Hardware,
1972 IN gctPOINTER Logical,
1973 IN gctUINT8 Event,
1974 IN gceKERNEL_WHERE FromWhere,
1975 IN OUT gctSIZE_T * Bytes
1976 )
1977 {
1978 gctUINT size;
1979 gctUINT32 destination = 0;
1980 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
1981 gceSTATUS status;
1982
1983 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Event=%u FromWhere=%d *Bytes=%lu",
1984 Hardware, Logical, Event, FromWhere, gcmOPT_VALUE(Bytes));
1985
1986 /* Verify the arguments. */
1987 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1988 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
1989 gcmkVERIFY_ARGUMENT(Event < 32);
1990
1991 /* Determine the size of the command. */
1992 size = (Hardware->extraEventStates && (FromWhere == gcvKERNEL_PIXEL))
1993 ? gcmALIGN(8 + (1 + 5) * 4, 8) /* EVENT + 5 STATES */
1994 : 8;
1995
1996 if (Logical != gcvNULL)
1997 {
1998 if (*Bytes < size)
1999 {
2000 /* Command queue too small. */
2001 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2002 }
2003
2004 switch (FromWhere)
2005 {
2006 case gcvKERNEL_COMMAND:
2007 /* From command processor. */
2008 destination = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
2009 break;
2010
2011 case gcvKERNEL_PIXEL:
2012 /* From pixel engine. */
2013 destination = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6)));
2014 break;
2015
2016 default:
2017 gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
2018 }
2019
2020 /* Append EVENT(Event, destiantion). */
2021 logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2022 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E01) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
2023 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
2024
2025 logical[1] = ((((gctUINT32) (destination)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) ((gctUINT32) (Event) & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)));
2026
2027 /* Make sure the event ID gets written out before GPU can access it. */
2028 gcmkONERROR(
2029 gckOS_MemoryBarrier(Hardware->os, logical + 1));
2030
2031 #if gcmIS_DEBUG(gcdDEBUG_TRACE)
2032 {
2033 gctUINT32 phys;
2034 gckOS_GetPhysicalAddress(Hardware->os, Logical, &phys);
2035 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2036 "0x%08x: EVENT %d", phys, Event);
2037 }
2038 #endif
2039
2040 /* Append the extra states. These are needed for the chips that do not
2041 ** support back-to-back events due to the async interface. The extra
2042 ** states add the necessary delay to ensure that event IDs do not
2043 ** collide. */
2044 if (size > 8)
2045 {
2046 logical[2] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2047 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0100) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
2048 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
2049 logical[3] = 0;
2050 logical[4] = 0;
2051 logical[5] = 0;
2052 logical[6] = 0;
2053 logical[7] = 0;
2054 }
2055 }
2056
2057 if (Bytes != gcvNULL)
2058 {
2059 /* Return number of bytes required by the EVENT command. */
2060 *Bytes = size;
2061 }
2062
2063 /* Success. */
2064 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
2065 return gcvSTATUS_OK;
2066
2067 OnError:
2068 /* Return the status. */
2069 gcmkFOOTER();
2070 return status;
2071 }
2072
2073 /*******************************************************************************
2074 **
2075 ** gckHARDWARE_PipeSelect
2076 **
2077 ** Append a PIPESELECT command at the specified location in the command queue.
2078 **
2079 ** INPUT:
2080 **
2081 ** gckHARDWARE Hardware
2082 ** Pointer to an gckHARDWARE object.
2083 **
2084 ** gctPOINTER Logical
2085 ** Pointer to the current location inside the command queue to append
2086 ** the PIPESELECT command at or gcvNULL just to query the size of the
2087 ** PIPESELECT command.
2088 **
2089 ** gcePIPE_SELECT Pipe
2090 ** Pipe value to select.
2091 **
2092 ** gctSIZE_T * Bytes
2093 ** Pointer to the number of bytes available for the PIPESELECT command.
2094 ** If 'Logical' is gcvNULL, this argument will be ignored.
2095 **
2096 ** OUTPUT:
2097 **
2098 ** gctSIZE_T * Bytes
2099 ** Pointer to a variable that will receive the number of bytes required
2100 ** for the PIPESELECT command. If 'Bytes' is gcvNULL, nothing will be
2101 ** returned.
2102 */
2103 gceSTATUS
2104 gckHARDWARE_PipeSelect(
2105 IN gckHARDWARE Hardware,
2106 IN gctPOINTER Logical,
2107 IN gcePIPE_SELECT Pipe,
2108 IN OUT gctSIZE_T * Bytes
2109 )
2110 {
2111 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
2112 gceSTATUS status;
2113
2114 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Pipe=%d *Bytes=%lu",
2115 Hardware, Logical, Pipe, gcmOPT_VALUE(Bytes));
2116
2117 /* Verify the arguments. */
2118 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2119 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
2120
2121 /* Append a PipeSelect. */
2122 if (Logical != gcvNULL)
2123 {
2124 gctUINT32 flush, stall;
2125
2126 if (*Bytes < 32)
2127 {
2128 /* Command queue too small. */
2129 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2130 }
2131
2132 flush = (Pipe == gcvPIPE_2D)
2133 ? ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
2134 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
2135 : ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)));
2136
2137 stall = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
2138 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
2139
2140 /* LoadState(AQFlush, 1), flush. */
2141 logical[0]
2142 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2143 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
2144 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
2145
2146 logical[1]
2147 = flush;
2148
2149 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2150 "0x%x: FLUSH 0x%x", logical, flush);
2151
2152 /* LoadState(AQSempahore, 1), stall. */
2153 logical[2]
2154 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2155 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
2156 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
2157
2158 logical[3]
2159 = stall;
2160
2161 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2162 "0x%x: SEMAPHORE 0x%x", logical + 2, stall);
2163
2164 /* Stall, stall. */
2165 logical[4] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
2166 logical[5] = stall;
2167
2168 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2169 "0x%x: STALL 0x%x", logical + 4, stall);
2170
2171 /* LoadState(AQPipeSelect, 1), pipe. */
2172 logical[6]
2173 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2174 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
2175 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
2176
2177 logical[7] = (Pipe == gcvPIPE_2D)
2178 ? 0x1
2179 : 0x0;
2180
2181 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2182 "0x%x: PIPE %d", logical + 6, Pipe);
2183 }
2184
2185 if (Bytes != gcvNULL)
2186 {
2187 /* Return number of bytes required by the PIPESELECT command. */
2188 *Bytes = 32;
2189 }
2190
2191 /* Success. */
2192 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
2193 return gcvSTATUS_OK;
2194
2195 OnError:
2196 /* Return the status. */
2197 gcmkFOOTER();
2198 return status;
2199 }
2200
2201 /*******************************************************************************
2202 **
2203 ** gckHARDWARE_Link
2204 **
2205 ** Append a LINK command at the specified location in the command queue.
2206 **
2207 ** INPUT:
2208 **
2209 ** gckHARDWARE Hardware
2210 ** Pointer to an gckHARDWARE object.
2211 **
2212 ** gctPOINTER Logical
2213 ** Pointer to the current location inside the command queue to append
2214 ** the LINK command at or gcvNULL just to query the size of the LINK
2215 ** command.
2216 **
2217 ** gctPOINTER FetchAddress
2218 ** Logical address of destination of LINK.
2219 **
2220 ** gctSIZE_T FetchSize
2221 ** Number of bytes in destination of LINK.
2222 **
2223 ** gctSIZE_T * Bytes
2224 ** Pointer to the number of bytes available for the LINK command. If
2225 ** 'Logical' is gcvNULL, this argument will be ignored.
2226 **
2227 ** OUTPUT:
2228 **
2229 ** gctSIZE_T * Bytes
2230 ** Pointer to a variable that will receive the number of bytes required
2231 ** for the LINK command. If 'Bytes' is gcvNULL, nothing will be returned.
2232 */
2233 gceSTATUS
2234 gckHARDWARE_Link(
2235 IN gckHARDWARE Hardware,
2236 IN gctPOINTER Logical,
2237 IN gctPOINTER FetchAddress,
2238 IN gctSIZE_T FetchSize,
2239 IN OUT gctSIZE_T * Bytes
2240 )
2241 {
2242 gceSTATUS status;
2243 gctSIZE_T bytes;
2244 gctUINT32 address;
2245 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
2246
2247 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x FetchAddress=0x%x FetchSize=%lu "
2248 "*Bytes=%lu",
2249 Hardware, Logical, FetchAddress, FetchSize,
2250 gcmOPT_VALUE(Bytes));
2251
2252 /* Verify the arguments. */
2253 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2254 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
2255
2256 if (Logical != gcvNULL)
2257 {
2258 if (*Bytes < 8)
2259 {
2260 /* Command queue too small. */
2261 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2262 }
2263
2264 /* Convert logical address to hardware address. */
2265 gcmkONERROR(
2266 gckHARDWARE_ConvertLogical(Hardware, FetchAddress, &address));
2267
2268 logical[1] = address;
2269
2270 /* Make sure the address got written before the LINK command. */
2271 gcmkONERROR(
2272 gckOS_MemoryBarrier(Hardware->os, logical + 1));
2273
2274 /* Compute number of 64-byte aligned bytes to fetch. */
2275 bytes = gcmALIGN(address + FetchSize, 64) - address;
2276
2277 /* Append LINK(bytes / 8), FetchAddress. */
2278 logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2279 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes >> 3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
2280
2281 /* Memory barrier. */
2282 gcmkONERROR(
2283 gckOS_MemoryBarrier(Hardware->os, logical));
2284 }
2285
2286 if (Bytes != gcvNULL)
2287 {
2288 /* Return number of bytes required by the LINK command. */
2289 *Bytes = 8;
2290 }
2291
2292 /* Success. */
2293 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
2294 return gcvSTATUS_OK;
2295
2296 OnError:
2297 /* Return the status. */
2298 gcmkFOOTER();
2299 return status;
2300 }
2301
2302 /*******************************************************************************
2303 **
2304 ** gckHARDWARE_AlignToTile
2305 **
2306 ** Align the specified width and height to tile boundaries.
2307 **
2308 ** INPUT:
2309 **
2310 ** gckHARDWARE Hardware
2311 ** Pointer to an gckHARDWARE object.
2312 **
2313 ** gceSURF_TYPE Type
2314 ** Type of alignment.
2315 **
2316 ** gctUINT32 * Width
2317 ** Pointer to the width to be aligned. If 'Width' is gcvNULL, no width
2318 ** will be aligned.
2319 **
2320 ** gctUINT32 * Height
2321 ** Pointer to the height to be aligned. If 'Height' is gcvNULL, no height
2322 ** will be aligned.
2323 **
2324 ** OUTPUT:
2325 **
2326 ** gctUINT32 * Width
2327 ** Pointer to a variable that will receive the aligned width.
2328 **
2329 ** gctUINT32 * Height
2330 ** Pointer to a variable that will receive the aligned height.
2331 **
2332 ** gctBOOL_PTR SuperTiled
2333 ** Pointer to a variable that receives the super-tiling flag for the
2334 ** surface.
2335 */
2336 gceSTATUS
2337 gckHARDWARE_AlignToTile(
2338 IN gckHARDWARE Hardware,
2339 IN gceSURF_TYPE Type,
2340 IN OUT gctUINT32_PTR Width,
2341 IN OUT gctUINT32_PTR Height,
2342 OUT gctBOOL_PTR SuperTiled
2343 )
2344 {
2345 gctBOOL superTiled = gcvFALSE;
2346 gctUINT32 xAlignment, yAlignment;
2347 gctBOOL hAlignmentAvailable = gcvFALSE;
2348
2349 gcmkHEADER_ARG("Hardware=0x%x Type=%d *Width=%u *Height=%u",
2350 Hardware, Type, gcmOPT_VALUE(Width), gcmOPT_VALUE(Height));
2351
2352 /* Verify the arguments. */
2353 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2354
2355 /* Super tiling can be enabled for render targets and depth buffers. */
2356 superTiled =
2357 ((Type == gcvSURF_RENDER_TARGET)
2358 || (Type == gcvSURF_DEPTH)
2359 )
2360 &&
2361 /* Of course, hardware needs to support super tiles. */
2362 ((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 12:12) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1)))))));
2363
2364 /* Textures can be better aligned. */
2365 hAlignmentAvailable = ((((gctUINT32) (Hardware->chipMinorFeatures1)) >> (0 ? 20:20) & ((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1)))))));
2366
2367 /* Compute alignment factors. */
2368 xAlignment = superTiled ? 64
2369 : ((Type == gcvSURF_TEXTURE) && !hAlignmentAvailable) ? 4
2370 : 16;
2371 yAlignment = superTiled ? (64 * Hardware->pixelPipes)
2372 : (4 * Hardware->pixelPipes);
2373
2374 if (Width != gcvNULL)
2375 {
2376 /* Align the width. */
2377 *Width = gcmALIGN(*Width, xAlignment);
2378 }
2379
2380 if (Height != gcvNULL)
2381 {
2382 /* Align the height. */
2383 *Height = gcmALIGN(*Height, yAlignment);
2384 }
2385
2386 if (SuperTiled != gcvNULL)
2387 {
2388 /* Copy the super tiling. */
2389 *SuperTiled = superTiled;
2390 }
2391
2392 /* Success. */
2393 gcmkFOOTER_ARG("*Width=%u *Height=%u *SuperTiled=%d",
2394 gcmOPT_VALUE(Width), gcmOPT_VALUE(Height),
2395 gcmOPT_VALUE(SuperTiled));
2396 return gcvSTATUS_OK;
2397 }
2398
2399 /*******************************************************************************
2400 **
2401 ** gckHARDWARE_UpdateQueueTail
2402 **
2403 ** Update the tail of the command queue.
2404 **
2405 ** INPUT:
2406 **
2407 ** gckHARDWARE Hardware
2408 ** Pointer to an gckHARDWARE object.
2409 **
2410 ** gctPOINTER Logical
2411 ** Logical address of the start of the command queue.
2412 **
2413 ** gctUINT32 Offset
2414 ** Offset into the command queue of the tail (last command).
2415 **
2416 ** OUTPUT:
2417 **
2418 ** Nothing.
2419 */
2420 gceSTATUS
2421 gckHARDWARE_UpdateQueueTail(
2422 IN gckHARDWARE Hardware,
2423 IN gctPOINTER Logical,
2424 IN gctUINT32 Offset
2425 )
2426 {
2427 gceSTATUS status;
2428
2429 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Offset=0x%08x",
2430 Hardware, Logical, Offset);
2431
2432 /* Verify the hardware. */
2433 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2434
2435 /* Force a barrier. */
2436 gcmkONERROR(
2437 gckOS_MemoryBarrier(Hardware->os, Logical));
2438
2439 /* Notify gckKERNEL object of change. */
2440 gcmkONERROR(
2441 gckKERNEL_Notify(Hardware->kernel,
2442 gcvNOTIFY_COMMAND_QUEUE,
2443 gcvFALSE));
2444
2445 if (status == gcvSTATUS_CHIP_NOT_READY)
2446 {
2447 gcmkONERROR(gcvSTATUS_GPU_NOT_RESPONDING);
2448 }
2449
2450 /* Success. */
2451 gcmkFOOTER_NO();
2452 return gcvSTATUS_OK;
2453
2454 OnError:
2455 /* Return the status. */
2456 gcmkFOOTER();
2457 return status;
2458 }
2459
2460 /*******************************************************************************
2461 **
2462 ** gckHARDWARE_ConvertLogical
2463 **
2464 ** Convert a logical system address into a hardware specific address.
2465 **
2466 ** INPUT:
2467 **
2468 ** gckHARDWARE Hardware
2469 ** Pointer to an gckHARDWARE object.
2470 **
2471 ** gctPOINTER Logical
2472 ** Logical address to convert.
2473 **
2474 ** gctUINT32* Address
2475 ** Return hardware specific address.
2476 **
2477 ** OUTPUT:
2478 **
2479 ** Nothing.
2480 */
2481 gceSTATUS
2482 gckHARDWARE_ConvertLogical(
2483 IN gckHARDWARE Hardware,
2484 IN gctPOINTER Logical,
2485 OUT gctUINT32 * Address
2486 )
2487 {
2488 gctUINT32 address;
2489 gceSTATUS status;
2490
2491 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x", Hardware, Logical);
2492
2493 /* Verify the arguments. */
2494 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2495 gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
2496 gcmkVERIFY_ARGUMENT(Address != gcvNULL);
2497
2498 /* Convert logical address into a physical address. */
2499 gcmkONERROR(
2500 gckOS_GetPhysicalAddress(Hardware->os, Logical, &address));
2501
2502 /* Return hardware specific address. */
2503 *Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
2504 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (address) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
2505
2506 /* Success. */
2507 gcmkFOOTER_ARG("*Address=0x%08x", *Address);
2508 return gcvSTATUS_OK;
2509
2510 OnError:
2511 /* Return the status. */
2512 gcmkFOOTER();
2513 return status;
2514 }
2515
2516 /*******************************************************************************
2517 **
2518 ** gckHARDWARE_ConvertPhysical
2519 **
2520 ** Convert a physical address into a hardware specific address.
2521 **
2522 ** INPUT:
2523 **
2524 ** gckHARDWARE Hardware
2525 ** Pointer to an gckHARDWARE object.
2526 **
2527 ** gctPHYS_ADDR Physical
2528 ** Physical address to convert.
2529 **
2530 ** gctUINT32* Address
2531 ** Return hardware specific address.
2532 **
2533 ** OUTPUT:
2534 **
2535 ** Nothing.
2536 */
2537 gceSTATUS
2538 gckHARDWARE_ConvertPhysical(
2539 IN gckHARDWARE Hardware,
2540 IN gctPHYS_ADDR Physical,
2541 OUT gctUINT32 * Address
2542 )
2543 {
2544 gctUINT32 address;
2545
2546 gcmkHEADER_ARG("Hardware=0x%x Physical=0x%x", Hardware, Physical);
2547
2548 /* Verify the arguments. */
2549 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2550 gcmkVERIFY_ARGUMENT(Physical != gcvNULL);
2551 gcmkVERIFY_ARGUMENT(Address != gcvNULL);
2552
2553 address = gcmPTR2INT(Physical);
2554
2555 /* Return hardware specific address. */
2556 *Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
2557 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (address) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
2558
2559 /* Return the status. */
2560 gcmkFOOTER_ARG("*Address=0x%08x", *Address);
2561 return gcvSTATUS_OK;
2562 }
2563
2564 /*******************************************************************************
2565 **
2566 ** gckHARDWARE_Interrupt
2567 **
2568 ** Process an interrupt.
2569 **
2570 ** INPUT:
2571 **
2572 ** gckHARDWARE Hardware
2573 ** Pointer to an gckHARDWARE object.
2574 **
2575 ** gctBOOL InterruptValid
2576 ** If gcvTRUE, this function will read the interrupt acknowledge
2577 ** register, stores the data, and return whether or not the interrupt
2578 ** is ours or not. If gcvFALSE, this functions will read the interrupt
2579 ** acknowledge register and combine it with any stored value to handle
2580 ** the event notifications.
2581 **
2582 ** OUTPUT:
2583 **
2584 ** Nothing.
2585 */
2586 gceSTATUS
2587 gckHARDWARE_Interrupt(
2588 IN gckHARDWARE Hardware,
2589 IN gctBOOL InterruptValid
2590 )
2591 {
2592 gckEVENT eventObj;
2593 gctUINT32 data;
2594 gceSTATUS status;
2595
2596 gcmkHEADER_ARG("Hardware=0x%x InterruptValid=%d", Hardware, InterruptValid);
2597
2598 /* Verify the arguments. */
2599 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2600
2601 /* Extract gckEVENT object. */
2602 eventObj = Hardware->kernel->eventObj;
2603 gcmkVERIFY_OBJECT(eventObj, gcvOBJ_EVENT);
2604
2605 if (InterruptValid)
2606 {
2607 /* Read AQIntrAcknowledge register. */
2608 gcmkONERROR(
2609 gckOS_ReadRegisterEx(Hardware->os,
2610 Hardware->core,
2611 0x00010,
2612 &data));
2613
2614 if (data & 0x80000000)
2615 {
2616 gcmkONERROR(gckOS_Broadcast(Hardware->os,
2617 Hardware,
2618 gcvBROADCAST_AXI_BUS_ERROR));
2619 }
2620
2621 if (data == 0)
2622 {
2623 /* Not our interrupt. */
2624 status = gcvSTATUS_NOT_OUR_INTERRUPT;
2625 }
2626 else
2627 {
2628 /* Inform gckEVENT of the interrupt. */
2629 status = gckEVENT_Interrupt(eventObj, data & 0x7FFFFFFF);
2630 }
2631 }
2632 else
2633 {
2634 /* Handle events. */
2635 status = gckEVENT_Notify(eventObj, 0);
2636 }
2637
2638 OnError:
2639 /* Return the status. */
2640 gcmkFOOTER();
2641 return status;
2642 }
2643
2644 /*******************************************************************************
2645 **
2646 ** gckHARDWARE_QueryCommandBuffer
2647 **
2648 ** Query the command buffer alignment and number of reserved bytes.
2649 **
2650 ** INPUT:
2651 **
2652 ** gckHARDWARE Harwdare
2653 ** Pointer to an gckHARDWARE object.
2654 **
2655 ** OUTPUT:
2656 **
2657 ** gctSIZE_T * Alignment
2658 ** Pointer to a variable receiving the alignment for each command.
2659 **
2660 ** gctSIZE_T * ReservedHead
2661 ** Pointer to a variable receiving the number of reserved bytes at the
2662 ** head of each command buffer.
2663 **
2664 ** gctSIZE_T * ReservedTail
2665 ** Pointer to a variable receiving the number of bytes reserved at the
2666 ** tail of each command buffer.
2667 */
2668 gceSTATUS
2669 gckHARDWARE_QueryCommandBuffer(
2670 IN gckHARDWARE Hardware,
2671 OUT gctSIZE_T * Alignment,
2672 OUT gctSIZE_T * ReservedHead,
2673 OUT gctSIZE_T * ReservedTail
2674 )
2675 {
2676 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
2677
2678 /* Verify the arguments. */
2679 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2680
2681 if (Alignment != gcvNULL)
2682 {
2683 /* Align every 8 bytes. */
2684 *Alignment = 8;
2685 }
2686
2687 if (ReservedHead != gcvNULL)
2688 {
2689 /* Reserve space for SelectPipe(). */
2690 *ReservedHead = 32;
2691 }
2692
2693 if (ReservedTail != gcvNULL)
2694 {
2695 /* Reserve space for Link(). */
2696 *ReservedTail = 8;
2697 }
2698
2699 /* Success. */
2700 gcmkFOOTER_ARG("*Alignment=%lu *ReservedHead=%lu *ReservedTail=%lu",
2701 gcmOPT_VALUE(Alignment), gcmOPT_VALUE(ReservedHead),
2702 gcmOPT_VALUE(ReservedTail));
2703 return gcvSTATUS_OK;
2704 }
2705
2706 /*******************************************************************************
2707 **
2708 ** gckHARDWARE_QuerySystemMemory
2709 **
2710 ** Query the command buffer alignment and number of reserved bytes.
2711 **
2712 ** INPUT:
2713 **
2714 ** gckHARDWARE Harwdare
2715 ** Pointer to an gckHARDWARE object.
2716 **
2717 ** OUTPUT:
2718 **
2719 ** gctSIZE_T * SystemSize
2720 ** Pointer to a variable that receives the maximum size of the system
2721 ** memory.
2722 **
2723 ** gctUINT32 * SystemBaseAddress
2724 ** Poinetr to a variable that receives the base address for system
2725 ** memory.
2726 */
2727 gceSTATUS
2728 gckHARDWARE_QuerySystemMemory(
2729 IN gckHARDWARE Hardware,
2730 OUT gctSIZE_T * SystemSize,
2731 OUT gctUINT32 * SystemBaseAddress
2732 )
2733 {
2734 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
2735
2736 /* Verify the arguments. */
2737 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2738
2739 if (SystemSize != gcvNULL)
2740 {
2741 /* Maximum system memory can be 2GB. */
2742 *SystemSize = 1U << 31;
2743 }
2744
2745 if (SystemBaseAddress != gcvNULL)
2746 {
2747 /* Set system memory base address. */
2748 *SystemBaseAddress = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)));
2749 }
2750
2751 /* Success. */
2752 gcmkFOOTER_ARG("*SystemSize=%lu *SystemBaseAddress=%lu",
2753 gcmOPT_VALUE(SystemSize), gcmOPT_VALUE(SystemBaseAddress));
2754 return gcvSTATUS_OK;
2755 }
2756
2757 #if !defined(VIVANTE_NO_3D)
2758 /*******************************************************************************
2759 **
2760 ** gckHARDWARE_QueryShaderCaps
2761 **
2762 ** Query the shader capabilities.
2763 **
2764 ** INPUT:
2765 **
2766 ** Nothing.
2767 **
2768 ** OUTPUT:
2769 **
2770 ** gctUINT * VertexUniforms
2771 ** Pointer to a variable receiving the number of uniforms in the vertex
2772 ** shader.
2773 **
2774 ** gctUINT * FragmentUniforms
2775 ** Pointer to a variable receiving the number of uniforms in the
2776 ** fragment shader.
2777 **
2778 ** gctUINT * Varyings
2779 ** Pointer to a variable receiving the maimum number of varyings.
2780 */
2781 gceSTATUS
2782 gckHARDWARE_QueryShaderCaps(
2783 IN gckHARDWARE Hardware,
2784 OUT gctUINT * VertexUniforms,
2785 OUT gctUINT * FragmentUniforms,
2786 OUT gctUINT * Varyings
2787 )
2788 {
2789 gcmkHEADER_ARG("Hardware=0x%x VertexUniforms=0x%x "
2790 "FragmentUniforms=0x%x Varyings=0x%x",
2791 Hardware, VertexUniforms,
2792 FragmentUniforms, Varyings);
2793
2794 if (VertexUniforms != gcvNULL)
2795 {
2796 /* Return the vs shader const count. */
2797 if (Hardware->chipModel < gcv4000)
2798 {
2799 *VertexUniforms = 168;
2800 }
2801 else
2802 {
2803 *VertexUniforms = 256;
2804 }
2805 }
2806
2807 if (FragmentUniforms != gcvNULL)
2808 {
2809 /* Return the ps shader const count. */
2810 if (Hardware->chipModel < gcv4000)
2811 {
2812 *FragmentUniforms = 64;
2813 }
2814 else
2815 {
2816 *FragmentUniforms = 256;
2817 }
2818 }
2819
2820 if (Varyings != gcvNULL)
2821 {
2822 /* Return the shader varyings count. */
2823 if (((((gctUINT32) (Hardware->chipMinorFeatures1)) >> (0 ? 23:23) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))))
2824 {
2825 *Varyings = 12;
2826 }
2827 else
2828 {
2829 *Varyings = 8;
2830 }
2831 }
2832
2833 /* Success. */
2834 gcmkFOOTER_NO();
2835 return gcvSTATUS_OK;
2836 }
2837 #endif
2838
2839 /*******************************************************************************
2840 **
2841 ** gckHARDWARE_SetMMU
2842 **
2843 ** Set the page table base address.
2844 **
2845 ** INPUT:
2846 **
2847 ** gckHARDWARE Harwdare
2848 ** Pointer to an gckHARDWARE object.
2849 **
2850 ** gctPOINTER Logical
2851 ** Logical address of the page table.
2852 **
2853 ** OUTPUT:
2854 **
2855 ** Nothing.
2856 */
2857 gceSTATUS
2858 gckHARDWARE_SetMMU(
2859 IN gckHARDWARE Hardware,
2860 IN gctPOINTER Logical
2861 )
2862 {
2863 gceSTATUS status;
2864 gctUINT32 address = 0;
2865 gctUINT32 baseAddress;
2866
2867 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x", Hardware, Logical);
2868
2869 /* Verify the arguments. */
2870 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2871 gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
2872
2873 /* Convert the logical address into an hardware address. */
2874 gcmkONERROR(
2875 gckHARDWARE_ConvertLogical(Hardware, Logical, &address));
2876
2877 /* Also get the base address - we need a real physical address. */
2878 gcmkONERROR(
2879 gckOS_GetBaseAddress(Hardware->os, &baseAddress));
2880
2881 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2882 "Setting page table to 0x%08X",
2883 address + baseAddress);
2884
2885 /* Write the AQMemoryFePageTable register. */
2886 gcmkONERROR(
2887 gckOS_WriteRegisterEx(Hardware->os,
2888 Hardware->core,
2889 0x00400,
2890 address + baseAddress));
2891
2892 /* Write the AQMemoryRaPageTable register. */
2893 gcmkONERROR(
2894 gckOS_WriteRegisterEx(Hardware->os,
2895 Hardware->core,
2896 0x00410,
2897 address + baseAddress));
2898
2899 #ifndef VIVANTE_NO_3D
2900 /* Write the AQMemoryTxPageTable register. */
2901 gcmkONERROR(
2902 gckOS_WriteRegisterEx(Hardware->os,
2903 Hardware->core,
2904 0x00404,
2905 address + baseAddress));
2906 #endif
2907
2908 /* Write the AQMemoryPePageTable register. */
2909 gcmkONERROR(
2910 gckOS_WriteRegisterEx(Hardware->os,
2911 Hardware->core,
2912 0x00408,
2913 address + baseAddress));
2914
2915 #ifndef VIVANTE_NO_3D
2916 /* Write the AQMemoryPezPageTable register. */
2917 gcmkONERROR(
2918 gckOS_WriteRegisterEx(Hardware->os,
2919 Hardware->core,
2920 0x0040C,
2921 address + baseAddress));
2922 #endif
2923
2924 /* Return the status. */
2925 gcmkFOOTER_NO();
2926 return status;
2927
2928 OnError:
2929 /* Return the status. */
2930 gcmkFOOTER();
2931 return status;
2932 }
2933
2934 /*******************************************************************************
2935 **
2936 ** gckHARDWARE_FlushMMU
2937 **
2938 ** Flush the page table.
2939 **
2940 ** INPUT:
2941 **
2942 ** gckHARDWARE Harwdare
2943 ** Pointer to an gckHARDWARE object.
2944 **
2945 ** OUTPUT:
2946 **
2947 ** Nothing.
2948 */
2949 gceSTATUS
2950 gckHARDWARE_FlushMMU(
2951 IN gckHARDWARE Hardware
2952 )
2953 {
2954 gceSTATUS status;
2955 gckCOMMAND command;
2956 gctUINT32 reg, flush;
2957 gctUINT32_PTR buffer;
2958 gctSIZE_T bufferSize;
2959 gctBOOL commitEntered = gcvFALSE;
2960 gctPOINTER pointer = gcvNULL;
2961
2962 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
2963
2964 /* Verify the arguments. */
2965 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2966
2967 /* Flush the memory controller. */
2968 if (Hardware->mmuVersion == 0)
2969 {
2970 reg = 0x0E04;
2971
2972 flush = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
2973 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
2974 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)))
2975 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)))
2976 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
2977 }
2978 else
2979 {
2980 reg = 0x0061;
2981
2982 flush = (((((gctUINT32) (~0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) & ((((gctUINT32) (~0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) );
2983 }
2984
2985 /* Verify the gckCOMMAND object pointer. */
2986 command = Hardware->kernel->command;
2987
2988 /* Acquire the command queue. */
2989 gcmkONERROR(gckCOMMAND_EnterCommit(command, gcvFALSE));
2990 commitEntered = gcvTRUE;
2991
2992 gcmkONERROR(gckCOMMAND_Reserve(
2993 command, 8, &pointer, &bufferSize
2994 ));
2995
2996 buffer = pointer;
2997
2998 buffer[0]
2999 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3000 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (reg) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3001 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3002
3003 buffer[1] = flush;
3004
3005 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3006 "0x%x: FLUSH MMU(loadstate reg 0x%04x with 0x%08x)", buffer, reg, flush);
3007
3008 gcmkONERROR(gckCOMMAND_Execute(command, 8));
3009
3010 /* Release the command queue. */
3011 gcmkONERROR(gckCOMMAND_ExitCommit(command, gcvFALSE));
3012 commitEntered = gcvFALSE;
3013
3014 /* Success. */
3015 gcmkFOOTER_NO();
3016 return gcvSTATUS_OK;
3017
3018 OnError:
3019 if (commitEntered)
3020 {
3021 /* Release the command queue mutex. */
3022 gcmkVERIFY_OK(gckCOMMAND_ExitCommit(Hardware->kernel->command,
3023 gcvFALSE));
3024 }
3025
3026 /* Return the status. */
3027 gcmkFOOTER();
3028 return status;
3029 }
3030
3031 /*******************************************************************************
3032 **
3033 ** gckHARDWARE_SetMMUv2
3034 **
3035 ** Set the page table base address.
3036 **
3037 ** INPUT:
3038 **
3039 ** gckHARDWARE Harwdare
3040 ** Pointer to an gckHARDWARE object.
3041 **
3042 ** OUTPUT:
3043 **
3044 ** Nothing.
3045 */
3046 gceSTATUS
3047 gckHARDWARE_SetMMUv2(
3048 IN gckHARDWARE Hardware,
3049 IN gctBOOL Enable,
3050 IN gctPOINTER MtlbAddress,
3051 IN gceMMU_MODE Mode,
3052 IN gctPOINTER SafeAddress
3053 )
3054 {
3055 gceSTATUS status;
3056 gctUINT32 config, address;
3057 gckCOMMAND command;
3058 gctUINT32_PTR buffer;
3059 gctSIZE_T bufferSize;
3060 gctBOOL commitEntered = gcvFALSE;
3061 gctPOINTER pointer = gcvNULL;
3062
3063 gcmkHEADER_ARG("Hardware=0x%x Enable=%d", Hardware, Enable);
3064
3065 /* Verify the arguments. */
3066 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3067
3068 /* Convert logical address into physical address. */
3069 gcmkONERROR(
3070 gckOS_GetPhysicalAddress(Hardware->os, MtlbAddress, &config));
3071
3072 gcmkONERROR(
3073 gckOS_GetPhysicalAddress(Hardware->os, SafeAddress, &address));
3074
3075 if (address & 0x3F)
3076 {
3077 gcmkONERROR(gcvSTATUS_NOT_ALIGNED);
3078 }
3079
3080 switch (Mode)
3081 {
3082 case gcvMMU_MODE_1K:
3083 if (config & 0x3FF)
3084 {
3085 gcmkONERROR(gcvSTATUS_NOT_ALIGNED);
3086 }
3087
3088 config |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
3089
3090 break;
3091
3092 case gcvMMU_MODE_4K:
3093 if (config & 0xFFF)
3094 {
3095 gcmkONERROR(gcvSTATUS_NOT_ALIGNED);
3096 }
3097
3098 config |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
3099
3100 break;
3101
3102 default:
3103 gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
3104 }
3105
3106 /* Verify the gckCOMMAND object pointer. */
3107 command = Hardware->kernel->command;
3108
3109 /* Acquire the command queue. */
3110 gcmkONERROR(gckCOMMAND_EnterCommit(command, gcvFALSE));
3111 commitEntered = gcvTRUE;
3112
3113 gcmkONERROR(gckCOMMAND_Reserve(
3114 command, 16, &pointer, &bufferSize
3115 ));
3116
3117 buffer = pointer;
3118
3119 buffer[0]
3120 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3121 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0061) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3122 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3123
3124 buffer[1] = config;
3125
3126 buffer[2]
3127 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3128 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0060) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3129 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3130
3131 buffer[3] = address;
3132
3133 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3134 "Setup MMU: config=%08x, Safe Address=%08x\n.", config, address);
3135
3136 gcmkONERROR(gckCOMMAND_Execute(command, 16));
3137
3138 /* Release the command queue. */
3139 gcmkONERROR(gckCOMMAND_ExitCommit(command, gcvFALSE));
3140 commitEntered = gcvFALSE;
3141
3142 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3143 "call gckCOMMAND_Stall to make sure the config is done.\n ");
3144
3145 gcmkONERROR(gckCOMMAND_Stall(command, gcvFALSE));
3146
3147 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3148 "Enable MMU through GCREG_MMU_CONTROL.");
3149
3150 /* Enable MMU. */
3151 gcmkONERROR(
3152 gckOS_WriteRegisterEx(Hardware->os,
3153 Hardware->core,
3154 0x0018C,
3155 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (Enable) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))));
3156
3157 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3158 "call gckCOMMAND_Stall to check MMU available.\n");
3159
3160 gcmkONERROR(gckCOMMAND_Stall(command, gcvFALSE));
3161
3162 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3163 "The MMU is available.\n");
3164
3165 /* Return the status. */
3166 gcmkFOOTER_NO();
3167 return status;
3168
3169 OnError:
3170 if (commitEntered)
3171 {
3172 /* Release the command queue mutex. */
3173 gcmkVERIFY_OK(gckCOMMAND_ExitCommit(Hardware->kernel->command,
3174 gcvFALSE));
3175 }
3176
3177 /* Return the status. */
3178 gcmkFOOTER();
3179 return status;
3180 }
3181
3182 /*******************************************************************************
3183 **
3184 ** gckHARDWARE_BuildVirtualAddress
3185 **
3186 ** Build a virtual address.
3187 **
3188 ** INPUT:
3189 **
3190 ** gckHARDWARE Harwdare
3191 ** Pointer to an gckHARDWARE object.
3192 **
3193 ** gctUINT32 Index
3194 ** Index into page table.
3195 **
3196 ** gctUINT32 Offset
3197 ** Offset into page.
3198 **
3199 ** OUTPUT:
3200 **
3201 ** gctUINT32 * Address
3202 ** Pointer to a variable receiving te hardware address.
3203 */
3204 gceSTATUS
3205 gckHARDWARE_BuildVirtualAddress(
3206 IN gckHARDWARE Hardware,
3207 IN gctUINT32 Index,
3208 IN gctUINT32 Offset,
3209 OUT gctUINT32 * Address
3210 )
3211 {
3212 gcmkHEADER_ARG("Hardware=0x%x Index=%u Offset=%u", Hardware, Index, Offset);
3213
3214 /* Verify the arguments. */
3215 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3216 gcmkVERIFY_ARGUMENT(Address != gcvNULL);
3217
3218 /* Build virtual address. */
3219 *Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
3220 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (Offset | (Index << 12)) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
3221
3222 /* Success. */
3223 gcmkFOOTER_ARG("*Address=0x%08x", *Address);
3224 return gcvSTATUS_OK;
3225 }
3226
3227 gceSTATUS
3228 gckHARDWARE_GetIdle(
3229 IN gckHARDWARE Hardware,
3230 IN gctBOOL Wait,
3231 OUT gctUINT32 * Data
3232 )
3233 {
3234 gceSTATUS status;
3235 gctUINT32 idle = 0;
3236 gctINT retry, poll, pollCount;
3237
3238 gcmkHEADER_ARG("Hardware=0x%x Wait=%d", Hardware, Wait);
3239
3240 /* Verify the arguments. */
3241 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3242 gcmkVERIFY_ARGUMENT(Data != gcvNULL);
3243
3244
3245 /* If we have to wait, try 100 polls per millisecond. */
3246 pollCount = Wait ? 100 : 1;
3247
3248 /* At most, try for 1 second. */
3249 for (retry = 0; retry < 1000; ++retry)
3250 {
3251 /* If we have to wait, try 100 polls per millisecond. */
3252 for (poll = pollCount; poll > 0; --poll)
3253 {
3254 /* Read register. */
3255 gcmkONERROR(
3256 gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00004, &idle));
3257
3258 /* See if we have to wait for FE idle. */
3259 if ((((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
3260 {
3261 /* FE is idle. */
3262 break;
3263 }
3264 }
3265
3266 /* Check if we need to wait for FE and FE is busy. */
3267 if (Wait && !(((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
3268 {
3269 /* Wait a little. */
3270 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3271 "%s: Waiting for idle: 0x%08X",
3272 __FUNCTION__, idle);
3273
3274 gcmkVERIFY_OK(gckOS_Delay(Hardware->os, 1));
3275 }
3276 else
3277 {
3278 break;
3279 }
3280 }
3281
3282 /* Return idle to caller. */
3283 *Data = idle;
3284
3285 /* Success. */
3286 gcmkFOOTER_ARG("*Data=0x%08x", *Data);
3287 return gcvSTATUS_OK;
3288
3289 OnError:
3290 /* Return the status. */
3291 gcmkFOOTER();
3292 return status;
3293 }
3294
3295 /* Flush the caches. */
3296 gceSTATUS
3297 gckHARDWARE_Flush(
3298 IN gckHARDWARE Hardware,
3299 IN gceKERNEL_FLUSH Flush,
3300 IN gctPOINTER Logical,
3301 IN OUT gctSIZE_T * Bytes
3302 )
3303 {
3304 gctUINT32 pipe;
3305 gctUINT32 flush = 0;
3306 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
3307 gceSTATUS status;
3308
3309 gcmkHEADER_ARG("Hardware=0x%x Flush=0x%x Logical=0x%x *Bytes=%lu",
3310 Hardware, Flush, Logical, gcmOPT_VALUE(Bytes));
3311
3312 /* Verify the arguments. */
3313 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3314
3315 /* Get current pipe. */
3316 pipe = Hardware->kernel->command->pipeSelect;
3317
3318 /* Flush 3D color cache. */
3319 if ((Flush & gcvFLUSH_COLOR) && (pipe == 0x0))
3320 {
3321 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
3322 }
3323
3324 /* Flush 3D depth cache. */
3325 if ((Flush & gcvFLUSH_DEPTH) && (pipe == 0x0))
3326 {
3327 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
3328 }
3329
3330 /* Flush 3D texture cache. */
3331 if ((Flush & gcvFLUSH_TEXTURE) && (pipe == 0x0))
3332 {
3333 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)));
3334 }
3335
3336 /* Flush 2D cache. */
3337 if ((Flush & gcvFLUSH_2D) && (pipe == 0x1))
3338 {
3339 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)));
3340 }
3341
3342 /* See if there is a valid flush. */
3343 if (flush == 0)
3344 {
3345 if (Bytes != gcvNULL)
3346 {
3347 /* No bytes required. */
3348 *Bytes = 0;
3349 }
3350 }
3351
3352 else
3353 {
3354 /* Copy to command queue. */
3355 if (Logical != gcvNULL)
3356 {
3357 if (*Bytes < 8)
3358 {
3359 /* Command queue too small. */
3360 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
3361 }
3362
3363 /* Append LOAD_STATE to AQFlush. */
3364 logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3365 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3366 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3367
3368 logical[1] = flush;
3369
3370 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3371 "0x%x: FLUSH 0x%x", logical, flush);
3372 }
3373
3374 if (Bytes != gcvNULL)
3375 {
3376 /* 8 bytes required. */
3377 *Bytes = 8;
3378 }
3379 }
3380
3381 /* Success. */
3382 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
3383 return gcvSTATUS_OK;
3384
3385 OnError:
3386 /* Return the status. */
3387 gcmkFOOTER();
3388 return status;
3389 }
3390
3391 gceSTATUS
3392 gckHARDWARE_SetFastClear(
3393 IN gckHARDWARE Hardware,
3394 IN gctINT Enable,
3395 IN gctINT Compression
3396 )
3397 {
3398 #ifndef VIVANTE_NO_3D
3399 gctUINT32 debug;
3400 gceSTATUS status;
3401
3402 gcmkHEADER_ARG("Hardware=0x%x Enable=%d Compression=%d",
3403 Hardware, Enable, Compression);
3404
3405 /* Only process if fast clear is available. */
3406 if ((((((gctUINT32) (Hardware->chipFeatures)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
3407 {
3408 if (Enable == -1)
3409 {
3410 /* Determine automatic value for fast clear. */
3411 Enable = ((Hardware->chipModel != gcv500)
3412 || (Hardware->chipRevision >= 3)
3413 ) ? 1 : 0;
3414 }
3415
3416 if (Compression == -1)
3417 {
3418 /* Determine automatic value for compression. */
3419 Compression = Enable
3420 & (((((gctUINT32) (Hardware->chipFeatures)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) );
3421 }
3422
3423 /* Read AQMemoryDebug register. */
3424 gcmkONERROR(
3425 gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00414, &debug));
3426
3427 /* Set fast clear bypass. */
3428 debug = ((((gctUINT32) (debug)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1))))))) << (0 ? 20:20))) | (((gctUINT32) ((gctUINT32) (Enable == 0) & ((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1))))))) << (0 ? 20:20)));
3429
3430 /* Set compression bypass. */
3431 debug = ((((gctUINT32) (debug)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))) << (0 ? 21:21))) | (((gctUINT32) ((gctUINT32) (Compression == 0) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))) << (0 ? 21:21)));
3432
3433 /* Write back AQMemoryDebug register. */
3434 gcmkONERROR(
3435 gckOS_WriteRegisterEx(Hardware->os,
3436 Hardware->core,
3437 0x00414,
3438 debug));
3439
3440 /* Store fast clear and comprersison flags. */
3441 Hardware->allowFastClear = Enable;
3442 Hardware->allowCompression = Compression;
3443
3444 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3445 "FastClear=%d Compression=%d", Enable, Compression);
3446 }
3447
3448 /* Success. */
3449 gcmkFOOTER_NO();
3450 return gcvSTATUS_OK;
3451
3452 OnError:
3453 /* Return the status. */
3454 gcmkFOOTER();
3455 return status;
3456 #else
3457 return gcvSTATUS_OK;
3458 #endif
3459 }
3460
3461 typedef enum
3462 {
3463 gcvPOWER_FLAG_INITIALIZE = 1 << 0,
3464 gcvPOWER_FLAG_STALL = 1 << 1,
3465 gcvPOWER_FLAG_STOP = 1 << 2,
3466 gcvPOWER_FLAG_START = 1 << 3,
3467 gcvPOWER_FLAG_RELEASE = 1 << 4,
3468 gcvPOWER_FLAG_DELAY = 1 << 5,
3469 gcvPOWER_FLAG_SAVE = 1 << 6,
3470 gcvPOWER_FLAG_ACQUIRE = 1 << 7,
3471 gcvPOWER_FLAG_POWER_OFF = 1 << 8,
3472 gcvPOWER_FLAG_CLOCK_OFF = 1 << 9,
3473 gcvPOWER_FLAG_CLOCK_ON = 1 << 10,
3474 }
3475 gcePOWER_FLAGS;
3476
3477 #if gcmIS_DEBUG(gcdDEBUG_TRACE) && gcdPOWER_MANAGEMENT
3478 static gctCONST_STRING
3479 _PowerEnum(gceCHIPPOWERSTATE State)
3480 {
3481 const gctCONST_STRING states[] =
3482 {
3483 gcmSTRING(gcvPOWER_ON),
3484 gcmSTRING(gcvPOWER_OFF),
3485 gcmSTRING(gcvPOWER_IDLE),
3486 gcmSTRING(gcvPOWER_SUSPEND),
3487 gcmSTRING(gcvPOWER_SUSPEND_ATPOWERON),
3488 gcmSTRING(gcvPOWER_OFF_ATPOWERON),
3489 gcmSTRING(gcvPOWER_IDLE_BROADCAST),
3490 gcmSTRING(gcvPOWER_SUSPEND_BROADCAST),
3491 gcmSTRING(gcvPOWER_OFF_BROADCAST),
3492 gcmSTRING(gcvPOWER_OFF_RECOVERY),
3493 gcmSTRING(gcvPOWER_ON_AUTO)
3494 };
3495
3496 if ((State >= gcvPOWER_ON) && (State <= gcvPOWER_ON_AUTO))
3497 {
3498 return states[State - gcvPOWER_ON];
3499 }
3500
3501 return "unknown";
3502 }
3503 #endif
3504
3505 /*******************************************************************************
3506 **
3507 ** gckHARDWARE_SetPowerManagementState
3508 **
3509 ** Set GPU to a specified power state.
3510 **
3511 ** INPUT:
3512 **
3513 ** gckHARDWARE Harwdare
3514 ** Pointer to an gckHARDWARE object.
3515 **
3516 ** gceCHIPPOWERSTATE State
3517 ** Power State.
3518 **
3519 */
3520 gceSTATUS
3521 gckHARDWARE_SetPowerManagementState(
3522 IN gckHARDWARE Hardware,
3523 IN gceCHIPPOWERSTATE State
3524 )
3525 {
3526 #if gcdPOWER_MANAGEMENT
3527 gceSTATUS status;
3528 gckCOMMAND command = gcvNULL;
3529 gckOS os;
3530 gctUINT flag, clock;
3531 gctPOINTER buffer;
3532 gctSIZE_T bytes, requested;
3533 gctBOOL acquired = gcvFALSE;
3534 gctBOOL mutexAcquired = gcvFALSE;
3535 gctBOOL stall = gcvTRUE;
3536 gctBOOL broadcast = gcvFALSE;
3537 #if gcdPOWEROFF_TIMEOUT
3538 gctBOOL timeout = gcvFALSE;
3539 gctBOOL isAfter = gcvFALSE;
3540 gctUINT32 currentTime;
3541 #endif
3542 gctUINT32 process, thread;
3543 gctBOOL commitEntered = gcvFALSE;
3544 #if gcdENABLE_PROFILING
3545 gctUINT64 time, freq, mutexTime, onTime, stallTime, stopTime, delayTime,
3546 initTime, offTime, startTime, totalTime;
3547 #endif
3548 gctBOOL global = gcvFALSE;
3549 gctBOOL globalAcquired = gcvFALSE;
3550
3551 /* State transition flags. */
3552 static const gctUINT flags[4][4] =
3553 {
3554 /* gcvPOWER_ON */
3555 { /* ON */ 0,
3556 /* OFF */ gcvPOWER_FLAG_ACQUIRE |
3557 gcvPOWER_FLAG_STALL |
3558 gcvPOWER_FLAG_STOP |
3559 gcvPOWER_FLAG_POWER_OFF |
3560 gcvPOWER_FLAG_CLOCK_OFF,
3561 /* IDLE */ gcvPOWER_FLAG_ACQUIRE |
3562 gcvPOWER_FLAG_STALL,
3563 /* SUSPEND */ gcvPOWER_FLAG_ACQUIRE |
3564 gcvPOWER_FLAG_STALL |
3565 gcvPOWER_FLAG_STOP |
3566 gcvPOWER_FLAG_CLOCK_OFF,
3567 },
3568
3569 /* gcvPOWER_OFF */
3570 { /* ON */ gcvPOWER_FLAG_INITIALIZE |
3571 gcvPOWER_FLAG_START |
3572 gcvPOWER_FLAG_RELEASE |
3573 gcvPOWER_FLAG_DELAY,
3574 /* OFF */ 0,
3575 /* IDLE */ gcvPOWER_FLAG_INITIALIZE |
3576 gcvPOWER_FLAG_START |
3577 gcvPOWER_FLAG_DELAY,
3578 /* SUSPEND */ gcvPOWER_FLAG_INITIALIZE |
3579 gcvPOWER_FLAG_CLOCK_OFF,
3580 },
3581
3582 /* gcvPOWER_IDLE */
3583 { /* ON */ gcvPOWER_FLAG_RELEASE,
3584 /* OFF */ gcvPOWER_FLAG_STOP |
3585 gcvPOWER_FLAG_POWER_OFF |
3586 gcvPOWER_FLAG_CLOCK_OFF,
3587 /* IDLE */ 0,
3588 /* SUSPEND */ gcvPOWER_FLAG_STOP |
3589 gcvPOWER_FLAG_CLOCK_OFF,
3590 },
3591
3592 /* gcvPOWER_SUSPEND */
3593 { /* ON */ gcvPOWER_FLAG_START |
3594 gcvPOWER_FLAG_RELEASE |
3595 gcvPOWER_FLAG_DELAY |
3596 gcvPOWER_FLAG_CLOCK_ON,
3597 /* OFF */ gcvPOWER_FLAG_SAVE |
3598 gcvPOWER_FLAG_POWER_OFF |
3599 gcvPOWER_FLAG_CLOCK_OFF,
3600 /* IDLE */ gcvPOWER_FLAG_START |
3601 gcvPOWER_FLAG_DELAY |
3602 gcvPOWER_FLAG_CLOCK_ON,
3603 /* SUSPEND */ 0,
3604 },
3605 };
3606
3607 /* Clocks. */
3608 static const gctUINT clocks[4] =
3609 {
3610 /* gcvPOWER_ON */
3611 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
3612 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
3613 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (64) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
3614 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))),
3615
3616 /* gcvPOWER_OFF */
3617 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
3618 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
3619 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
3620 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))),
3621
3622 /* gcvPOWER_IDLE */
3623 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
3624 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
3625 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
3626 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))),
3627
3628 /* gcvPOWER_SUSPEND */
3629 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
3630 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
3631 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
3632 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))),
3633 };
3634
3635 gcmkHEADER_ARG("Hardware=0x%x State=%d", Hardware, State);
3636 #if gcmIS_DEBUG(gcdDEBUG_TRACE)
3637 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3638 "Switching to power state %d(%s)",
3639 State, _PowerEnum(State));
3640 #endif
3641
3642 /* Verify the arguments. */
3643 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3644
3645 /* Get the gckOS object pointer. */
3646 os = Hardware->os;
3647 gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
3648
3649 /* Get the gckCOMMAND object pointer. */
3650 gcmkVERIFY_OBJECT(Hardware->kernel, gcvOBJ_KERNEL);
3651 command = Hardware->kernel->command;
3652 gcmkVERIFY_OBJECT(command, gcvOBJ_COMMAND);
3653
3654 /* Start profiler. */
3655 gcmkPROFILE_INIT(freq, time);
3656
3657 /* Convert the broadcast power state. */
3658 switch (State)
3659 {
3660 case gcvPOWER_SUSPEND_ATPOWERON:
3661 /* Convert to SUSPEND and don't wait for STALL. */
3662 State = gcvPOWER_SUSPEND;
3663 stall = gcvFALSE;
3664 break;
3665
3666 case gcvPOWER_OFF_ATPOWERON:
3667 /* Convert to OFF and don't wait for STALL. */
3668 State = gcvPOWER_OFF;
3669 stall = gcvFALSE;
3670 break;
3671
3672 case gcvPOWER_IDLE_BROADCAST:
3673 /* Convert to IDLE and note we are inside broadcast. */
3674 State = gcvPOWER_IDLE;
3675 broadcast = gcvTRUE;
3676 break;
3677
3678 case gcvPOWER_SUSPEND_BROADCAST:
3679 /* Convert to SUSPEND and note we are inside broadcast. */
3680 State = gcvPOWER_SUSPEND;
3681 broadcast = gcvTRUE;
3682 break;
3683
3684 case gcvPOWER_OFF_BROADCAST:
3685 /* Convert to OFF and note we are inside broadcast. */
3686 State = gcvPOWER_OFF;
3687 broadcast = gcvTRUE;
3688 break;
3689
3690 case gcvPOWER_OFF_RECOVERY:
3691 /* Convert to OFF and note we are inside recovery. */
3692 State = gcvPOWER_OFF;
3693 stall = gcvFALSE;
3694 broadcast = gcvTRUE;
3695 break;
3696
3697 case gcvPOWER_ON_AUTO:
3698 /* Convert to ON and note we are inside recovery. */
3699 State = gcvPOWER_ON;
3700 break;
3701
3702 case gcvPOWER_ON:
3703 case gcvPOWER_IDLE:
3704 case gcvPOWER_SUSPEND:
3705 case gcvPOWER_OFF:
3706 /* Mark as global power management. */
3707 global = gcvTRUE;
3708 break;
3709
3710 #if gcdPOWEROFF_TIMEOUT
3711 case gcvPOWER_OFF_TIMEOUT:
3712 /* Convert to OFF and note we are inside broadcast. */
3713 State = gcvPOWER_OFF;
3714 broadcast = gcvTRUE;
3715 /* Check time out */
3716 timeout = gcvTRUE;
3717 break;
3718 #endif
3719
3720 default:
3721 break;
3722 }
3723
3724 /* Get current process and thread IDs. */
3725 gcmkONERROR(gckOS_GetProcessID(&process));
3726 gcmkONERROR(gckOS_GetThreadID(&thread));
3727
3728 if (broadcast)
3729 {
3730 /* Try to acquire the power mutex. */
3731 status = gckOS_AcquireMutex(os, Hardware->powerMutex, 0);
3732
3733 if (status == gcvSTATUS_TIMEOUT)
3734 {
3735 /* Check if we already own this mutex. */
3736 if ((Hardware->powerProcess == process)
3737 && (Hardware->powerThread == thread)
3738 )
3739 {
3740 /* Bail out on recursive power management. */
3741 gcmkFOOTER_NO();
3742 return gcvSTATUS_OK;
3743 }
3744 else if (State == gcvPOWER_IDLE)
3745 {
3746 /* gcvPOWER_IDLE_BROADCAST is from IST,
3747 ** so waiting here will cause deadlock,
3748 ** if lock holder call gckCOMMAND_Stall() */
3749 gcmkONERROR(gcvSTATUS_INVALID_REQUEST);
3750 }
3751 else
3752 {
3753 /* Acquire the power mutex. */
3754 gcmkONERROR(gckOS_AcquireMutex(os,
3755 Hardware->powerMutex,
3756 gcvINFINITE));
3757 }
3758 }
3759 }
3760 else
3761 {
3762 /* Acquire the power mutex. */
3763 gcmkONERROR(gckOS_AcquireMutex(os, Hardware->powerMutex, gcvINFINITE));
3764 }
3765
3766 /* Get time until mtuex acquired. */
3767 gcmkPROFILE_QUERY(time, mutexTime);
3768
3769 Hardware->powerProcess = process;
3770 Hardware->powerThread = thread;
3771 mutexAcquired = gcvTRUE;
3772
3773 /* Grab control flags and clock. */
3774 flag = flags[Hardware->chipPowerState][State];
3775 clock = clocks[State];
3776
3777 #if gcdPOWEROFF_TIMEOUT
3778 if (timeout)
3779 {
3780 gcmkONERROR(gckOS_GetTicks(&currentTime));
3781
3782 gcmkONERROR(
3783 gckOS_TicksAfter(Hardware->powerOffTime, currentTime, &isAfter));
3784
3785 if (isAfter || Hardware->chipPowerState != gcvPOWER_IDLE)
3786 {
3787 /* Release the power mutex. */
3788 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
3789
3790 /* No need to do anything. */
3791 gcmkFOOTER_NO();
3792 return gcvSTATUS_OK;
3793 }
3794
3795 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3796 "Power Off GPU at %i [supposed to be at %i]",
3797 currentTime, Hardware->powerOffTime);
3798 }
3799 #endif
3800
3801 if (flag == 0)
3802 {
3803 /* Release the power mutex. */
3804 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
3805
3806 /* No need to do anything. */
3807 gcmkFOOTER_NO();
3808 return gcvSTATUS_OK;
3809 }
3810
3811 /* If this is an internal power management, we have to check if we can grab
3812 ** the global power semaphore. If we cannot, we have to wait until the
3813 ** external world changes power management. */
3814 if (!global)
3815 {
3816 /* Try to acquire the global semaphore. */
3817 status = gckOS_TryAcquireSemaphore(os, Hardware->globalSemaphore);
3818 if (status == gcvSTATUS_TIMEOUT)
3819 {
3820 /* Release the power mutex. */
3821 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3822 "Releasing the power mutex.");
3823 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
3824 mutexAcquired = gcvFALSE;
3825
3826 /* Wait for the semaphore. */
3827 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3828 "Waiting for global semaphore.");
3829 gcmkONERROR(gckOS_AcquireSemaphore(os, Hardware->globalSemaphore));
3830 globalAcquired = gcvTRUE;
3831
3832 /* Acquire the power mutex. */
3833 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3834 "Reacquiring the power mutex.");
3835 gcmkONERROR(gckOS_AcquireMutex(os,
3836 Hardware->powerMutex,
3837 gcvINFINITE));
3838 mutexAcquired = gcvTRUE;
3839 }
3840 else
3841 {
3842 /* Error. */
3843 gcmkONERROR(status);
3844 }
3845
3846 /* Release the global semaphore again. */
3847 gcmkONERROR(gckOS_ReleaseSemaphore(os, Hardware->globalSemaphore));
3848 globalAcquired = gcvFALSE;
3849 }
3850
3851 if (flag & (gcvPOWER_FLAG_INITIALIZE | gcvPOWER_FLAG_CLOCK_ON))
3852 {
3853 /* Turn on the power. */
3854 gcmkONERROR(gckOS_SetGPUPower(os, gcvTRUE, gcvTRUE));
3855
3856 /* Mark clock and power as enabled. */
3857 Hardware->clockState = gcvTRUE;
3858 Hardware->powerState = gcvTRUE;
3859 }
3860
3861 /* Get time until powered on. */
3862 gcmkPROFILE_QUERY(time, onTime);
3863
3864 if ((flag & gcvPOWER_FLAG_STALL) && stall)
3865 {
3866 gctBOOL idle;
3867 gctINT32 atomValue;
3868
3869 /* Check commit atom. */
3870 gcmkONERROR(gckOS_AtomGet(os, command->atomCommit, &atomValue));
3871
3872 if (atomValue > 0)
3873 {
3874 /* Commits are pending - abort power management. */
3875 status = broadcast ? gcvSTATUS_CHIP_NOT_READY
3876 : gcvSTATUS_MORE_DATA;
3877 goto OnError;
3878 }
3879
3880 if (broadcast)
3881 {
3882 /* Check for idle. */
3883 gcmkONERROR(gckHARDWARE_QueryIdle(Hardware, &idle));
3884
3885 if (!idle)
3886 {
3887 status = gcvSTATUS_CHIP_NOT_READY;
3888 goto OnError;
3889 }
3890 }
3891
3892 else
3893 {
3894 /* Acquire the command queue. */
3895 gcmkONERROR(gckCOMMAND_EnterCommit(command, gcvTRUE));
3896 commitEntered = gcvTRUE;
3897
3898 /* Get the size of the flush command. */
3899 gcmkONERROR(gckHARDWARE_Flush(Hardware,
3900 gcvFLUSH_ALL,
3901 gcvNULL,
3902 &requested));
3903
3904 /* Reserve space in the command queue. */
3905 gcmkONERROR(gckCOMMAND_Reserve(command,
3906 requested,
3907 &buffer,
3908 &bytes));
3909
3910 /* Append a flush. */
3911 gcmkONERROR(gckHARDWARE_Flush(
3912 Hardware, gcvFLUSH_ALL, buffer, &bytes
3913 ));
3914
3915 /* Execute the command queue. */
3916 gcmkONERROR(gckCOMMAND_Execute(command, requested));
3917
3918 /* Release the command queue. */
3919 gcmkONERROR(gckCOMMAND_ExitCommit(command, gcvTRUE));
3920 commitEntered = gcvFALSE;
3921
3922 /* Wait to finish all commands. */
3923 gcmkONERROR(gckCOMMAND_Stall(command, gcvTRUE));
3924 }
3925 }
3926
3927 /* Get time until stalled. */
3928 gcmkPROFILE_QUERY(time, stallTime);
3929
3930 if (flag & gcvPOWER_FLAG_ACQUIRE)
3931 {
3932 /* Acquire the power management semaphore. */
3933 gcmkONERROR(gckOS_AcquireSemaphore(os, command->powerSemaphore));
3934 acquired = gcvTRUE;
3935
3936 if (global)
3937 {
3938 /* Acquire the global semaphore. */
3939 gcmkONERROR(gckOS_AcquireSemaphore(os, Hardware->globalSemaphore));
3940 globalAcquired = gcvTRUE;
3941 }
3942 }
3943
3944 if (flag & gcvPOWER_FLAG_STOP)
3945 {
3946 /* Stop the command parser. */
3947 gcmkONERROR(gckCOMMAND_Stop(command));
3948
3949 /* Stop the Isr. */
3950 gcmkONERROR(Hardware->stopIsr(Hardware->isrContext));
3951 }
3952
3953 /* Get time until stopped. */
3954 gcmkPROFILE_QUERY(time, stopTime);
3955
3956 /* Only process this when hardware is enabled. */
3957 if (Hardware->clockState && Hardware->powerState)
3958 {
3959 /* Write the clock control register. */
3960 gcmkONERROR(gckOS_WriteRegisterEx(os,
3961 Hardware->core,
3962 0x00000,
3963 clock));
3964
3965 /* Done loading the frequency scaler. */
3966 gcmkONERROR(gckOS_WriteRegisterEx(os,
3967 Hardware->core,
3968 0x00000,
3969 ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))));
3970 }
3971
3972 if (flag & gcvPOWER_FLAG_DELAY)
3973 {
3974 /* Wait for the specified amount of time to settle coming back from
3975 ** power-off or suspend state. */
3976 gcmkONERROR(gckOS_Delay(os, gcdPOWER_CONTROL_DELAY));
3977 }
3978
3979 /* Get time until delayed. */
3980 gcmkPROFILE_QUERY(time, delayTime);
3981
3982 if (flag & gcvPOWER_FLAG_INITIALIZE)
3983 {
3984 /* Initialize hardware. */
3985 gcmkONERROR(gckHARDWARE_InitializeHardware(Hardware));
3986
3987 gcmkONERROR(gckHARDWARE_SetFastClear(Hardware,
3988 Hardware->allowFastClear,
3989 Hardware->allowCompression));
3990
3991 /* Force the command queue to reload the next context. */
3992 command->currContext = gcvNULL;
3993 }
3994
3995 /* Get time until initialized. */
3996 gcmkPROFILE_QUERY(time, initTime);
3997
3998 if (flag & (gcvPOWER_FLAG_POWER_OFF | gcvPOWER_FLAG_CLOCK_OFF))
3999 {
4000 /* Turn off the GPU power. */
4001 gcmkONERROR(
4002 gckOS_SetGPUPower(os,
4003 (flag & gcvPOWER_FLAG_CLOCK_OFF) ? gcvFALSE
4004 : gcvTRUE,
4005 (flag & gcvPOWER_FLAG_POWER_OFF) ? gcvFALSE
4006 : gcvTRUE));
4007
4008 /* Save current hardware power and clock states. */
4009 Hardware->clockState = (flag & gcvPOWER_FLAG_CLOCK_OFF) ? gcvFALSE
4010 : gcvTRUE;
4011 Hardware->powerState = (flag & gcvPOWER_FLAG_POWER_OFF) ? gcvFALSE
4012 : gcvTRUE;
4013 }
4014
4015 /* Get time until off. */
4016 gcmkPROFILE_QUERY(time, offTime);
4017
4018 if (flag & gcvPOWER_FLAG_START)
4019 {
4020 /* Start the command processor. */
4021 gcmkONERROR(gckCOMMAND_Start(command));
4022
4023 /* Start the Isr. */
4024 gcmkONERROR(Hardware->startIsr(Hardware->isrContext));
4025 }
4026
4027 /* Get time until started. */
4028 gcmkPROFILE_QUERY(time, startTime);
4029
4030 if (flag & gcvPOWER_FLAG_RELEASE)
4031 {
4032 /* Release the power management semaphore. */
4033 gcmkONERROR(gckOS_ReleaseSemaphore(os, command->powerSemaphore));
4034 acquired = gcvFALSE;
4035
4036 if (global)
4037 {
4038 /* Release the global semaphore. */
4039 gcmkONERROR(gckOS_ReleaseSemaphore(os, Hardware->globalSemaphore));
4040 globalAcquired = gcvFALSE;
4041 }
4042 }
4043
4044 /* Save the new power state. */
4045 Hardware->chipPowerState = State;
4046
4047 #if gcdPOWEROFF_TIMEOUT
4048 /* Reset power off time */
4049 gcmkONERROR(gckOS_GetTicks(&currentTime));
4050
4051 Hardware->powerOffTime = currentTime + gcdPOWEROFF_TIMEOUT;
4052
4053 if (State == gcvPOWER_IDLE)
4054 {
4055 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerOffSema));
4056 }
4057 #endif
4058
4059 /* Release the power mutex. */
4060 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
4061
4062 /* Get total time. */
4063 gcmkPROFILE_QUERY(time, totalTime);
4064 #if gcdENABLE_PROFILING
4065 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4066 "PROF(%llu): mutex:%llu on:%llu stall:%llu stop:%llu",
4067 freq, mutexTime, onTime, stallTime, stopTime);
4068 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4069 " delay:%llu init:%llu off:%llu start:%llu total:%llu",
4070 delayTime, initTime, offTime, startTime, totalTime);
4071 #endif
4072
4073 /* Success. */
4074 gcmkFOOTER_NO();
4075 return gcvSTATUS_OK;
4076
4077 OnError:
4078 if (commitEntered)
4079 {
4080 /* Release the command queue mutex. */
4081 gcmkVERIFY_OK(gckCOMMAND_ExitCommit(command, gcvTRUE));
4082 }
4083
4084 if (acquired)
4085 {
4086 /* Release semaphore. */
4087 gcmkVERIFY_OK(gckOS_ReleaseSemaphore(Hardware->os,
4088 command->powerSemaphore));
4089 }
4090
4091 if (globalAcquired)
4092 {
4093 gcmkVERIFY_OK(gckOS_ReleaseSemaphore(Hardware->os,
4094 Hardware->globalSemaphore));
4095 }
4096
4097 if (mutexAcquired)
4098 {
4099 gcmkVERIFY_OK(gckOS_ReleaseMutex(Hardware->os, Hardware->powerMutex));
4100 }
4101
4102 /* Return the status. */
4103 gcmkFOOTER();
4104 return status;
4105 #else /* gcdPOWER_MANAGEMENT */
4106 /* Do nothing */
4107 return gcvSTATUS_OK;
4108 #endif
4109 }
4110
4111 /*******************************************************************************
4112 **
4113 ** gckHARDWARE_QueryPowerManagementState
4114 **
4115 ** Get GPU power state.
4116 **
4117 ** INPUT:
4118 **
4119 ** gckHARDWARE Harwdare
4120 ** Pointer to an gckHARDWARE object.
4121 **
4122 ** gceCHIPPOWERSTATE* State
4123 ** Power State.
4124 **
4125 */
4126 gceSTATUS
4127 gckHARDWARE_QueryPowerManagementState(
4128 IN gckHARDWARE Hardware,
4129 OUT gceCHIPPOWERSTATE* State
4130 )
4131 {
4132 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
4133
4134 /* Verify the arguments. */
4135 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4136 gcmkVERIFY_ARGUMENT(State != gcvNULL);
4137
4138 /* Return the statue. */
4139 *State = Hardware->chipPowerState;
4140
4141 /* Success. */
4142 gcmkFOOTER_ARG("*State=%d", *State);
4143 return gcvSTATUS_OK;
4144 }
4145
4146 gceSTATUS
4147 gckHARDWARE_QueryIdle(
4148 IN gckHARDWARE Hardware,
4149 OUT gctBOOL_PTR IsIdle
4150 )
4151 {
4152 gceSTATUS status;
4153 gctUINT32 idle, address;
4154
4155 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
4156
4157 /* Verify the arguments. */
4158 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4159 gcmkVERIFY_ARGUMENT(IsIdle != gcvNULL);
4160
4161 /* We are idle when the power is not ON. */
4162 if (Hardware->chipPowerState != gcvPOWER_ON)
4163 {
4164 *IsIdle = gcvTRUE;
4165 }
4166
4167 else
4168 {
4169 /* Read idle register. */
4170 gcmkONERROR(
4171 gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00004, &idle));
4172
4173 /* Pipe must be idle. */
4174 if (((((((gctUINT32) (idle)) >> (0 ? 1:1)) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1)))))) ) != 1)
4175 || ((((((gctUINT32) (idle)) >> (0 ? 3:3)) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) ) != 1)
4176 || ((((((gctUINT32) (idle)) >> (0 ? 4:4)) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1)))))) ) != 1)
4177 || ((((((gctUINT32) (idle)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) ) != 1)
4178 || ((((((gctUINT32) (idle)) >> (0 ? 6:6)) & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1)))))) ) != 1)
4179 || ((((((gctUINT32) (idle)) >> (0 ? 7:7)) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1)))))) ) != 1)
4180 || ((((((gctUINT32) (idle)) >> (0 ? 2:2)) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) ) != 1)
4181 )
4182 {
4183 /* Something is busy. */
4184 *IsIdle = gcvFALSE;
4185 }
4186
4187 else
4188 {
4189 /* Read the current FE address. */
4190 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
4191 Hardware->core,
4192 0x00664,
4193 &address));
4194
4195 /* Test if address is inside the last WAIT/LINK sequence. */
4196 if ((address >= Hardware->lastWaitLink)
4197 && (address <= Hardware->lastWaitLink + 16)
4198 )
4199 {
4200 /* FE is in last WAIT/LINK and the pipe is idle. */
4201 *IsIdle = gcvTRUE;
4202 }
4203 else
4204 {
4205 /* FE is not in WAIT/LINK yet. */
4206 *IsIdle = gcvFALSE;
4207 }
4208 }
4209 }
4210
4211 /* Success. */
4212 gcmkFOOTER_NO();
4213 return gcvSTATUS_OK;
4214
4215 OnError:
4216 /* Return the status. */
4217 gcmkFOOTER();
4218 return status;
4219 }
4220
4221 /*******************************************************************************
4222 ** Handy macros that will help in reading those debug registers.
4223 */
4224
4225 #define gcmkREAD_DEBUG_REGISTER(control, block, index, data) \
4226 gcmkONERROR(\
4227 gckOS_WriteRegisterEx(Hardware->os, \
4228 Hardware->core, \
4229 GC_DEBUG_CONTROL##control##_Address, \
4230 gcmSETFIELD(0, \
4231 GC_DEBUG_CONTROL##control, \
4232 block, \
4233 index))); \
4234 gcmkONERROR(\
4235 gckOS_ReadRegisterEx(Hardware->os, \
4236 Hardware->core, \
4237 GC_DEBUG_SIGNALS_##block##_Address, \
4238 &profiler->data))
4239
4240 #define gcmkRESET_DEBUG_REGISTER(control, block) \
4241 gcmkONERROR(\
4242 gckOS_WriteRegisterEx(Hardware->os, \
4243 Hardware->core, \
4244 GC_DEBUG_CONTROL##control##_Address, \
4245 gcmSETFIELD(0, \
4246 GC_DEBUG_CONTROL##control, \
4247 block, \
4248 15))); \
4249 gcmkONERROR(\
4250 gckOS_WriteRegisterEx(Hardware->os, \
4251 Hardware->core, \
4252 GC_DEBUG_CONTROL##control##_Address, \
4253 gcmSETFIELD(0, \
4254 GC_DEBUG_CONTROL##control, \
4255 block, \
4256 0)))
4257
4258 /*******************************************************************************
4259 **
4260 ** gckHARDWARE_ProfileEngine2D
4261 **
4262 ** Read the profile registers available in the 2D engine and sets them in the
4263 ** profile. The function will also reset the pixelsRendered counter every time.
4264 **
4265 ** INPUT:
4266 **
4267 ** gckHARDWARE Hardware
4268 ** Pointer to an gckHARDWARE object.
4269 **
4270 ** OPTIONAL gcs2D_PROFILE_PTR Profile
4271 ** Pointer to a gcs2D_Profile structure.
4272 **
4273 ** OUTPUT:
4274 **
4275 ** Nothing.
4276 */
4277 gceSTATUS
4278 gckHARDWARE_ProfileEngine2D(
4279 IN gckHARDWARE Hardware,
4280 OPTIONAL gcs2D_PROFILE_PTR Profile
4281 )
4282 {
4283 gceSTATUS status;
4284 gcs2D_PROFILE_PTR profiler = Profile;
4285
4286 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
4287
4288 /* Verify the arguments. */
4289 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4290
4291 if (Profile != gcvNULL)
4292 {
4293 /* Read the cycle count. */
4294 gcmkONERROR(
4295 gckOS_ReadRegisterEx(Hardware->os,
4296 Hardware->core,
4297 0x00438,
4298 &Profile->cycleCount));
4299
4300 /* Read pixels rendered by 2D engine. */
4301 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4302 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &profiler->pixelsRendered));
4303
4304 /* Reset counter. */
4305 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4306 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16)))
4307 )));
4308 }
4309
4310 /* Success. */
4311 gcmkFOOTER_NO();
4312 return gcvSTATUS_OK;
4313
4314 OnError:
4315 /* Return the status. */
4316 gcmkFOOTER();
4317 return status;
4318 }
4319
4320 #if VIVANTE_PROFILER
4321 gceSTATUS
4322 gckHARDWARE_QueryProfileRegisters(
4323 IN gckHARDWARE Hardware,
4324 OUT gcsPROFILER_COUNTERS * Counters
4325 )
4326 {
4327 gceSTATUS status;
4328 gcsPROFILER_COUNTERS * profiler = Counters;
4329
4330 gcmkHEADER_ARG("Hardware=0x%x Counters=0x%x", Hardware, Counters);
4331
4332 /* Verify the arguments. */
4333 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4334
4335 /* Read the counters. */
4336 gcmkONERROR(
4337 gckOS_ReadRegisterEx(Hardware->os,
4338 Hardware->core,
4339 0x00040,
4340 &profiler->gpuTotalRead64BytesPerFrame));
4341 gcmkONERROR(
4342 gckOS_ReadRegisterEx(Hardware->os,
4343 Hardware->core,
4344 0x00044,
4345 &profiler->gpuTotalWrite64BytesPerFrame));
4346 gcmkONERROR(
4347 gckOS_ReadRegisterEx(Hardware->os,
4348 Hardware->core,
4349 0x00438,
4350 &profiler->gpuCyclesCounter));
4351
4352 /* Reset counters. */
4353 gcmkONERROR(
4354 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 1));
4355 gcmkONERROR(
4356 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 0));
4357 gcmkONERROR(
4358 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00438, 0));
4359
4360 /* PE */
4361 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4362 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &profiler->pe_pixel_count_killed_by_color_pipe));
4363 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4364 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &profiler->pe_pixel_count_killed_by_depth_pipe));
4365 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4366 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &profiler->pe_pixel_count_drawn_by_color_pipe));
4367 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4368 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &profiler->pe_pixel_count_drawn_by_depth_pipe));
4369 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4370 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16)))
4371 )));
4372
4373 /* SH */
4374 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4375 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->ps_inst_counter));
4376 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4377 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_pixel_counter));
4378 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4379 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vs_inst_counter));
4380 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4381 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_vertice_counter));
4382 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4383 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_branch_inst_counter));
4384 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (12) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4385 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_texld_inst_counter));
4386 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (13) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4387 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_branch_inst_counter));
4388 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (14) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4389 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_texld_inst_counter));
4390 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4391 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24)))
4392 )));
4393
4394 /* PA */
4395 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4396 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_vtx_counter));
4397 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (4) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4398 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_prim_counter));
4399 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4400 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_output_prim_counter));
4401 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4402 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_depth_clipped_counter));
4403 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4404 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_trivial_rejected_counter));
4405 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4406 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_culled_counter));
4407 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4408 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0)))
4409 )));
4410
4411 /* SE */
4412 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
4413 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_triangle_count));
4414 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
4415 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_lines_count));
4416 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
4417 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8)))
4418 )));
4419
4420 /* RA */
4421 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4422 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_pixel_count));
4423 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4424 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_quad_count));
4425 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4426 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_quad_count_after_early_z));
4427 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4428 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_primitive_count));
4429 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4430 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_pipe_cache_miss_counter));
4431 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4432 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_prefetch_cache_miss_counter));
4433 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
4434 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16)))
4435 )));
4436
4437 /* TX */
4438 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4439 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_bilinear_requests));
4440 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4441 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_trilinear_requests));
4442 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4443 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_discarded_texture_requests));
4444 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4445 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_texture_requests));
4446 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4447 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_count));
4448 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4449 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_in_8B_count));
4450 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4451 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_count));
4452 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4453 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_hit_texel_count));
4454 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4455 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_texel_count));
4456 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
4457 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24)))
4458 )));
4459
4460 /* MC */
4461 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4462 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_pipeline));
4463 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4464 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_IP));
4465 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4466 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_write_req_8B_from_pipeline));
4467 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
4468 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0)))
4469 )));
4470
4471 /* HI */
4472 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
4473 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_read_request_stalled));
4474 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
4475 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_request_stalled));
4476 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
4477 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_data_stalled));
4478 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
4479 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, (((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8)))
4480 )));
4481
4482 /* Success. */
4483 gcmkFOOTER_NO();
4484 return gcvSTATUS_OK;
4485
4486 OnError:
4487 /* Return the status. */
4488 gcmkFOOTER();
4489 return status;
4490 }
4491 #endif
4492
4493 static gceSTATUS
4494 _ResetGPU(
4495 IN gckOS Os,
4496 IN gceCORE Core
4497 )
4498 {
4499 gctUINT32 control, idle;
4500 gceSTATUS status;
4501
4502 /* Read register. */
4503 gcmkONERROR(gckOS_ReadRegisterEx(Os,
4504 Core,
4505 0x00000,
4506 &control));
4507
4508 for (;;)
4509 {
4510 /* Isolate the GPU. */
4511 control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
4512
4513 gcmkONERROR(gckOS_WriteRegisterEx(Os,
4514 Core,
4515 0x00000,
4516 control));
4517
4518 /* Set soft reset. */
4519 gcmkONERROR(gckOS_WriteRegisterEx(Os,
4520 Core,
4521 0x00000,
4522 ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))));
4523
4524 /* Wait for reset. */
4525 gcmkONERROR(gckOS_Delay(Os, 1));
4526
4527 /* Reset soft reset bit. */
4528 gcmkONERROR(gckOS_WriteRegisterEx(Os,
4529 Core,
4530 0x00000,
4531 ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))));
4532
4533 /* Reset GPU isolation. */
4534 control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
4535
4536 gcmkONERROR(gckOS_WriteRegisterEx(Os,
4537 Core,
4538 0x00000,
4539 control));
4540
4541 /* Read idle register. */
4542 gcmkONERROR(gckOS_ReadRegisterEx(Os,
4543 Core,
4544 0x00004,
4545 &idle));
4546
4547 if ((((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ) == 0)
4548 {
4549 continue;
4550 }
4551
4552 /* Read reset register. */
4553 gcmkONERROR(gckOS_ReadRegisterEx(Os,
4554 Core,
4555 0x00000,
4556 &control));
4557
4558 if (((((((gctUINT32) (control)) >> (0 ? 16:16)) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) ) == 0)
4559 || ((((((gctUINT32) (control)) >> (0 ? 17:17)) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1)))))) ) == 0)
4560 )
4561 {
4562 continue;
4563 }
4564
4565 /* GPU is idle. */
4566 break;
4567 }
4568
4569 /* Success. */
4570 return gcvSTATUS_OK;
4571
4572 OnError:
4573
4574 /* Return the error. */
4575 return status;
4576 }
4577
4578 gceSTATUS
4579 gckHARDWARE_Reset(
4580 IN gckHARDWARE Hardware
4581 )
4582 {
4583 gceSTATUS status;
4584 gckCOMMAND command;
4585 gctBOOL acquired = gcvFALSE;
4586
4587 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
4588
4589 /* Verify the arguments. */
4590 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4591 gcmkVERIFY_OBJECT(Hardware->kernel, gcvOBJ_KERNEL);
4592 command = Hardware->kernel->command;
4593 gcmkVERIFY_OBJECT(command, gcvOBJ_COMMAND);
4594
4595 if (Hardware->chipRevision < 0x4600)
4596 {
4597 /* Not supported - we need the isolation bit. */
4598 gcmkONERROR(gcvSTATUS_NOT_SUPPORTED);
4599 }
4600
4601 if (Hardware->chipPowerState == gcvPOWER_ON)
4602 {
4603 /* Acquire the power management semaphore. */
4604 gcmkONERROR(
4605 gckOS_AcquireSemaphore(Hardware->os, command->powerSemaphore));
4606 acquired = gcvTRUE;
4607 }
4608
4609 if ((Hardware->chipPowerState == gcvPOWER_ON)
4610 || (Hardware->chipPowerState == gcvPOWER_IDLE)
4611 )
4612 {
4613 /* Stop the command processor. */
4614 gcmkONERROR(gckCOMMAND_Stop(command));
4615 }
4616
4617 gcmkONERROR(_ResetGPU(Hardware->os, Hardware->core));
4618
4619 /* Force an OFF to ON power switch. */
4620 Hardware->chipPowerState = gcvPOWER_OFF;
4621 gcmkONERROR(gckHARDWARE_SetPowerManagementState(Hardware, gcvPOWER_ON));
4622
4623 /* Success. */
4624 gcmkFOOTER_NO();
4625 return gcvSTATUS_OK;
4626
4627 OnError:
4628 if (acquired)
4629 {
4630 /* Release the power management semaphore. */
4631 gcmkVERIFY_OK(
4632 gckOS_ReleaseSemaphore(Hardware->os, command->powerSemaphore));
4633 }
4634
4635 /* Return the error. */
4636 gcmkFOOTER();
4637 return status;
4638 }
4639
4640 gceSTATUS
4641 gckHARDWARE_GetBaseAddress(
4642 IN gckHARDWARE Hardware,
4643 OUT gctUINT32_PTR BaseAddress
4644 )
4645 {
4646 gceSTATUS status;
4647
4648 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
4649
4650 /* Verify the arguments. */
4651 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4652 gcmkVERIFY_ARGUMENT(BaseAddress != gcvNULL);
4653
4654 /* Test if we have a new Memory Controller. */
4655 if (((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 22:22) & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))))
4656 {
4657 /* No base address required. */
4658 *BaseAddress = 0;
4659 }
4660 else
4661 {
4662 /* Get the base address from the OS. */
4663 gcmkONERROR(gckOS_GetBaseAddress(Hardware->os, BaseAddress));
4664 }
4665
4666 /* Success. */
4667 gcmkFOOTER_ARG("*BaseAddress=0x%08x", *BaseAddress);
4668 return gcvSTATUS_OK;
4669
4670 OnError:
4671 /* Return the status. */
4672 gcmkFOOTER();
4673 return status;
4674 }
4675
4676 gceSTATUS
4677 gckHARDWARE_NeedBaseAddress(
4678 IN gckHARDWARE Hardware,
4679 IN gctUINT32 State,
4680 OUT gctBOOL_PTR NeedBase
4681 )
4682 {
4683 gctBOOL need = gcvFALSE;
4684
4685 gcmkHEADER_ARG("Hardware=0x%x State=0x%08x", Hardware, State);
4686
4687 /* Verify the arguments. */
4688 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4689 gcmkVERIFY_ARGUMENT(NeedBase != gcvNULL);
4690
4691 /* Make sure this is a load state. */
4692 if (((((gctUINT32) (State)) >> (0 ? 31:27) & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))))
4693 {
4694 #ifndef VIVANTE_NO_3D
4695 /* Get the state address. */
4696 switch ((((((gctUINT32) (State)) >> (0 ? 15:0)) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1)))))) ))
4697 {
4698 case 0x0596:
4699 case 0x0597:
4700 case 0x0599:
4701 case 0x059A:
4702 case 0x05A9:
4703 /* These states need a TRUE physical address. */
4704 need = gcvTRUE;
4705 break;
4706 }
4707 #else
4708 /* 2D addresses don't need a base address. */
4709 #endif
4710 }
4711
4712 /* Return the flag. */
4713 *NeedBase = need;
4714
4715 /* Success. */
4716 gcmkFOOTER_ARG("*NeedBase=%d", *NeedBase);
4717 return gcvSTATUS_OK;
4718 }
4719
4720 gceSTATUS
4721 gckHARDWARE_SetIsrManager(
4722 IN gckHARDWARE Hardware,
4723 IN gctISRMANAGERFUNC StartIsr,
4724 IN gctISRMANAGERFUNC StopIsr,
4725 IN gctPOINTER Context
4726 )
4727 {
4728 gceSTATUS status = gcvSTATUS_OK;
4729
4730 gcmkHEADER_ARG("Hardware=0x%x, StartIsr=0x%x, StopIsr=0x%x, Context=0x%x",
4731 Hardware, StartIsr, StopIsr, Context);
4732
4733 /* Verify the arguments. */
4734 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4735
4736 if (StartIsr == gcvNULL ||
4737 StopIsr == gcvNULL ||
4738 Context == gcvNULL)
4739 {
4740 status = gcvSTATUS_INVALID_ARGUMENT;
4741
4742 gcmkFOOTER();
4743 return status;
4744 }
4745
4746 Hardware->startIsr = StartIsr;
4747 Hardware->stopIsr = StopIsr;
4748 Hardware->isrContext = Context;
4749
4750 /* Success. */
4751 gcmkFOOTER();
4752
4753 return status;
4754 }
4755
4756 /*******************************************************************************
4757 **
4758 ** gckHARDWARE_Compose
4759 **
4760 ** Start a composition.
4761 **
4762 ** INPUT:
4763 **
4764 ** gckHARDWARE Hardware
4765 ** Pointer to the gckHARDWARE object.
4766 **
4767 ** OUTPUT:
4768 **
4769 ** Nothing.
4770 */
4771 gceSTATUS
4772 gckHARDWARE_Compose(
4773 IN gckHARDWARE Hardware,
4774 IN gctUINT32 ProcessID,
4775 IN gctSIZE_T Size,
4776 IN gctPHYS_ADDR Physical,
4777 IN gctPOINTER Logical,
4778 IN gctUINT8 EventID
4779 )
4780 {
4781 #ifndef VIVANTE_NO_3D
4782 gceSTATUS status;
4783 gctUINT32_PTR sizeState;
4784 gctUINT32_PTR triggerState;
4785 gctUINT32_PTR dummyState;
4786 gctSIZE_T size;
4787
4788 gcmkHEADER_ARG("Hardware=0x%x Size=%d Physical=0x%x"
4789 " Logical=0x%x EventID=%d",
4790 Hardware, Size, Physical, Logical, EventID);
4791
4792 /* Verify the arguments. */
4793 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4794 gcmkVERIFY_ARGUMENT((Size & 7) == 0);
4795 gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
4796
4797 /* Make total state buffer size 64B aligned. */
4798 size = gcmALIGN(Size + 16, 64) - 8;
4799
4800 /* Program the size of the state buffer. */
4801 sizeState = (gctUINT32_PTR) Logical;
4802 sizeState[0] = 0xFFFFFFFF;
4803 sizeState[1] = size >> 3;
4804
4805 /* Program the trigger state. */
4806 triggerState = (gctUINT32_PTR) ((gctUINT8_PTR) Logical + Size);
4807 triggerState[0] = 0x0C03;
4808 triggerState[1]
4809 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:0) - (0 ? 1:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:0) - (0 ? 1:0) + 1))))))) << (0 ? 1:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:0) - (0 ? 1:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:0) - (0 ? 1:0) + 1))))))) << (0 ? 1:0)))
4810 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:4) - (0 ? 5:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:4) - (0 ? 5:4) + 1))))))) << (0 ? 5:4))) | (((gctUINT32) (0x3 & ((gctUINT32) ((((1 ? 5:4) - (0 ? 5:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:4) - (0 ? 5:4) + 1))))))) << (0 ? 5:4)))
4811 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))) << (0 ? 8:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))) << (0 ? 8:8)))
4812 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 24:24) - (0 ? 24:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 24:24) - (0 ? 24:24) + 1))))))) << (0 ? 24:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 24:24) - (0 ? 24:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 24:24) - (0 ? 24:24) + 1))))))) << (0 ? 24:24)))
4813 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))
4814 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 20:16) - (0 ? 20:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:16) - (0 ? 20:16) + 1))))))) << (0 ? 20:16))) | (((gctUINT32) ((gctUINT32) (EventID) & ((gctUINT32) ((((1 ? 20:16) - (0 ? 20:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:16) - (0 ? 20:16) + 1))))))) << (0 ? 20:16)))
4815 ;
4816
4817 /* Dummy state padding. */
4818 dummyState = triggerState + 2;
4819
4820 while (Size < size)
4821 {
4822 dummyState[0] = 0xFFFFFFFF;
4823 dummyState[1] = 0x00000000;
4824
4825 dummyState += 2;
4826 Size += 8;
4827 }
4828
4829 #if gcdNONPAGED_MEMORY_CACHEABLE
4830 /* Flush the cache for the wait/link. */
4831 gcmkONERROR(gckOS_CacheClean(
4832 Hardware->os, ProcessID, gcvNULL, Physical, Logical, size
4833 ));
4834 #endif
4835
4836 /* Start composition. */
4837 gcmkONERROR(gckOS_WriteRegisterEx(
4838 Hardware->os, Hardware->core, 0x00554,
4839 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:0) - (0 ? 1:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:0) - (0 ? 1:0) + 1))))))) << (0 ? 1:0))) | (((gctUINT32) (0x3 & ((gctUINT32) ((((1 ? 1:0) - (0 ? 1:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:0) - (0 ? 1:0) + 1))))))) << (0 ? 1:0)))
4840 ));
4841
4842 /* Success. */
4843 gcmkFOOTER_NO();
4844 return gcvSTATUS_OK;
4845
4846 OnError:
4847 /* Return the status. */
4848 gcmkFOOTER();
4849 return status;
4850 #else
4851 /* Return the status. */
4852 return gcvSTATUS_NOT_SUPPORTED;
4853 #endif
4854 }
4855
4856 /*******************************************************************************
4857 **
4858 ** gckHARDWARE_IsFeatureAvailable
4859 **
4860 ** Verifies whether the specified feature is available in hardware.
4861 **
4862 ** INPUT:
4863 **
4864 ** gckHARDWARE Hardware
4865 ** Pointer to an gckHARDWARE object.
4866 **
4867 ** gceFEATURE Feature
4868 ** Feature to be verified.
4869 */
4870 gceSTATUS
4871 gckHARDWARE_IsFeatureAvailable(
4872 IN gckHARDWARE Hardware,
4873 IN gceFEATURE Feature
4874 )
4875 {
4876 gctBOOL available;
4877
4878 gcmkHEADER_ARG("Hardware=0x%x Feature=%d", Hardware, Feature);
4879
4880 /* Verify the arguments. */
4881 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4882
4883 /* Only features needed by common kernel logic added here. */
4884 switch (Feature)
4885 {
4886 case gcvFEATURE_END_EVENT:
4887 /*available = gcmVERIFYFIELDVALUE(Hardware->chipMinorFeatures2,
4888 GC_MINOR_FEATURES2, END_EVENT, AVAILABLE
4889 );*/
4890 available = gcvFALSE;
4891 break;
4892
4893 default:
4894 gcmkFATAL("Invalid feature has been requested.");
4895 available = gcvFALSE;
4896 }
4897
4898 /* Return result. */
4899 gcmkFOOTER_ARG("%d", available ? gcvSTATUS_TRUE : gcvSTATUS_OK);
4900 return available ? gcvSTATUS_TRUE : gcvSTATUS_OK;
4901 }
4902
4903 #if gcdFRAME_DB
4904 static gceSTATUS
4905 gckHARDWARE_ReadPerformanceRegister(
4906 IN gckHARDWARE Hardware,
4907 IN gctUINT PerformanceAddress,
4908 IN gctUINT IndexAddress,
4909 IN gctUINT IndexShift,
4910 IN gctUINT Index,
4911 OUT gctUINT32_PTR Value
4912 )
4913 {
4914 gceSTATUS status;
4915
4916 gcmkHEADER_ARG("Hardware=0x%x PerformanceAddress=0x%x IndexAddress=0x%x "
4917 "IndexShift=%u Index=%u",
4918 Hardware, PerformanceAddress, IndexAddress, IndexShift,
4919 Index);
4920
4921 /* Write the index. */
4922 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
4923 Hardware->core,
4924 IndexAddress,
4925 Index << IndexShift));
4926
4927 /* Read the register. */
4928 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
4929 Hardware->core,
4930 PerformanceAddress,
4931 Value));
4932
4933 /* Test for reset. */
4934 if (Index == 15)
4935 {
4936 /* Index another register to get out of reset. */
4937 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, IndexAddress, 0));
4938 }
4939
4940 /* Success. */
4941 gcmkFOOTER_ARG("*Value=0x%x", *Value);
4942 return gcvSTATUS_OK;
4943
4944 OnError:
4945 /* Return the status. */
4946 gcmkFOOTER();
4947 return status;
4948 }
4949
4950 gceSTATUS
4951 gckHARDWARE_GetFrameInfo(
4952 IN gckHARDWARE Hardware,
4953 OUT gcsHAL_FRAME_INFO * FrameInfo
4954 )
4955 {
4956 gceSTATUS status;
4957 gctUINT i, clock;
4958 gcsHAL_FRAME_INFO info;
4959 #if gcdFRAME_DB_RESET
4960 gctUINT reset;
4961 #endif
4962
4963 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
4964
4965 /* Get profile tick. */
4966 gcmkONERROR(gckOS_GetProfileTick(&info.ticks));
4967
4968 /* Read SH counters and reset them. */
4969 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
4970 Hardware,
4971 0x0045C,
4972 0x00470,
4973 24,
4974 4,
4975 &info.shaderCycles));
4976 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
4977 Hardware,
4978 0x0045C,
4979 0x00470,
4980 24,
4981 9,
4982 &info.vsInstructionCount));
4983 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
4984 Hardware,
4985 0x0045C,
4986 0x00470,
4987 24,
4988 12,
4989 &info.vsTextureCount));
4990 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
4991 Hardware,
4992 0x0045C,
4993 0x00470,
4994 24,
4995 7,
4996 &info.psInstructionCount));
4997 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
4998 Hardware,
4999 0x0045C,
5000 0x00470,
5001 24,
5002 14,
5003 &info.psTextureCount));
5004 #if gcdFRAME_DB_RESET
5005 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5006 Hardware,
5007 0x0045C,
5008 0x00470,
5009 24,
5010 15,
5011 &reset));
5012 #endif
5013
5014 /* Read PA counters and reset them. */
5015 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5016 Hardware,
5017 0x00460,
5018 0x00474,
5019 0,
5020 3,
5021 &info.vertexCount));
5022 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5023 Hardware,
5024 0x00460,
5025 0x00474,
5026 0,
5027 4,
5028 &info.primitiveCount));
5029 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5030 Hardware,
5031 0x00460,
5032 0x00474,
5033 0,
5034 7,
5035 &info.rejectedPrimitives));
5036 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5037 Hardware,
5038 0x00460,
5039 0x00474,
5040 0,
5041 8,
5042 &info.culledPrimitives));
5043 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5044 Hardware,
5045 0x00460,
5046 0x00474,
5047 0,
5048 6,
5049 &info.clippedPrimitives));
5050 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5051 Hardware,
5052 0x00460,
5053 0x00474,
5054 0,
5055 5,
5056 &info.outPrimitives));
5057 #if gcdFRAME_DB_RESET
5058 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5059 Hardware,
5060 0x00460,
5061 0x00474,
5062 0,
5063 15,
5064 &reset));
5065 #endif
5066
5067 /* Read RA counters and reset them. */
5068 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5069 Hardware,
5070 0x00448,
5071 0x00474,
5072 16,
5073 3,
5074 &info.inPrimitives));
5075 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5076 Hardware,
5077 0x00448,
5078 0x00474,
5079 16,
5080 11,
5081 &info.culledQuadCount));
5082 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5083 Hardware,
5084 0x00448,
5085 0x00474,
5086 16,
5087 1,
5088 &info.totalQuadCount));
5089 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5090 Hardware,
5091 0x00448,
5092 0x00474,
5093 16,
5094 2,
5095 &info.quadCount));
5096 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5097 Hardware,
5098 0x00448,
5099 0x00474,
5100 16,
5101 0,
5102 &info.totalPixelCount));
5103 #if gcdFRAME_DB_RESET
5104 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5105 Hardware,
5106 0x00448,
5107 0x00474,
5108 16,
5109 15,
5110 &reset));
5111 #endif
5112
5113 /* Read TX counters and reset them. */
5114 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5115 Hardware,
5116 0x0044C,
5117 0x00474,
5118 24,
5119 0,
5120 &info.bilinearRequests));
5121 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5122 Hardware,
5123 0x0044C,
5124 0x00474,
5125 24,
5126 1,
5127 &info.trilinearRequests));
5128 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5129 Hardware,
5130 0x0044C,
5131 0x00474,
5132 24,
5133 8,
5134 &info.txHitCount));
5135 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5136 Hardware,
5137 0x0044C,
5138 0x00474,
5139 24,
5140 9,
5141 &info.txMissCount));
5142 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5143 Hardware,
5144 0x0044C,
5145 0x00474,
5146 24,
5147 6,
5148 &info.txBytes8));
5149 #if gcdFRAME_DB_RESET
5150 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5151 Hardware,
5152 0x0044C,
5153 0x00474,
5154 24,
5155 15,
5156 &reset));
5157 #endif
5158
5159 /* Read clock control register. */
5160 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5161 Hardware->core,
5162 0x00000,
5163 &clock));
5164
5165 /* Walk through all avaiable pixel pipes. */
5166 for (i = 0; i < Hardware->pixelPipes; ++i)
5167 {
5168 /* Select proper pipe. */
5169 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5170 Hardware->core,
5171 0x00000,
5172 ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20))) | (((gctUINT32) ((gctUINT32) (i) & ((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20)))));
5173
5174 /* Read cycle registers. */
5175 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5176 Hardware->core,
5177 0x00078,
5178 &info.cycles[i]));
5179 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5180 Hardware->core,
5181 0x0007C,
5182 &info.idleCycles[i]));
5183 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5184 Hardware->core,
5185 0x00438,
5186 &info.mcCycles[i]));
5187
5188 /* Read bandwidth registers. */
5189 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5190 Hardware->core,
5191 0x0005C,
5192 &info.readRequests[i]));
5193 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5194 Hardware->core,
5195 0x00040,
5196 &info.readBytes8[i]));
5197 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5198 Hardware->core,
5199 0x00050,
5200 &info.writeRequests[i]));
5201 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5202 Hardware->core,
5203 0x00044,
5204 &info.writeBytes8[i]));
5205
5206 /* Read PE counters. */
5207 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5208 Hardware,
5209 0x00454,
5210 0x00470,
5211 16,
5212 0,
5213 &info.colorKilled[i]));
5214 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5215 Hardware,
5216 0x00454,
5217 0x00470,
5218 16,
5219 2,
5220 &info.colorDrawn[i]));
5221 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5222 Hardware,
5223 0x00454,
5224 0x00470,
5225 16,
5226 1,
5227 &info.depthKilled[i]));
5228 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5229 Hardware,
5230 0x00454,
5231 0x00470,
5232 16,
5233 3,
5234 &info.depthDrawn[i]));
5235 }
5236
5237 /* Zero out remaning reserved counters. */
5238 for (; i < 8; ++i)
5239 {
5240 info.readBytes8[i] = 0;
5241 info.writeBytes8[i] = 0;
5242 info.cycles[i] = 0;
5243 info.idleCycles[i] = 0;
5244 info.mcCycles[i] = 0;
5245 info.readRequests[i] = 0;
5246 info.writeRequests[i] = 0;
5247 info.colorKilled[i] = 0;
5248 info.colorDrawn[i] = 0;
5249 info.depthKilled[i] = 0;
5250 info.depthDrawn[i] = 0;
5251 }
5252
5253 /* Reset clock control register. */
5254 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5255 Hardware->core,
5256 0x00000,
5257 clock));
5258
5259 /* Reset cycle and bandwidth counters. */
5260 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5261 Hardware->core,
5262 0x0003C,
5263 1));
5264 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5265 Hardware->core,
5266 0x0003C,
5267 0));
5268 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5269 Hardware->core,
5270 0x00078,
5271 0));
5272
5273 #if gcdFRAME_DB_RESET
5274 /* Reset PE counters. */
5275 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
5276 Hardware,
5277 0x00454,
5278 0x00470,
5279 16,
5280 15,
5281 &reset));
5282 #endif
5283
5284 /* Copy to user. */
5285 gcmkONERROR(gckOS_CopyToUserData(Hardware->os,
5286 &info,
5287 FrameInfo,
5288 gcmSIZEOF(info)));
5289
5290 /* Success. */
5291 gcmkFOOTER_NO();
5292 return gcvSTATUS_OK;
5293
5294 OnError:
5295 /* Return the status. */
5296 gcmkFOOTER();
5297 return status;
5298 }
5299 #endif
5300
WandBoard kernel