descriptionMOVED TO GITHUB (A High Performance MIPS I Compatible Soft-core RISC Processor)
homepage URL
last changeWed, 2 Jan 2013 23:38:25 +0000 (2 15:38 -0800)
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YARI is a high performance soft-core RISC implementation, binary compatible with MIPS I. Please see the homepage for more information.

2013-01-02 Tommy ThornYARI bugfix: the shadow of a ld/st hazard wasn't flushedmaster
2012-11-30 Tommy ThornMerge pull request #1 from schoeberl/master
2012-11-30 Martin SchoeberlYARISIM: nor is not (s or t)
2012-11-08 Martin SchoeberlYARISIM: drop R29 initialization
2012-11-08 Martin SchoeberlYARISIM: add plain register dump
2010-12-20 Tommy ThornCORE: Fix a bug that slipped in with a clean up
2010-12-07 Tommy ThornCORE: suppress some warnings
2010-12-07 Tommy Thornsoclib: suppress some warnings
2010-12-07 Tommy ThornBiMicro: suppress some warnings
2010-12-01 Tommy ThornBeMicroSDK: an empty shell for now, but at least the...
2010-12-01 Tommy ThornAdd missing
2010-12-01 Tommy ThornCORE: propagate frequency from configuration down to...
2010-12-01 Tommy ThornBeMicro: suppress a couple of warnings
2010-12-01 Tommy ThornBeMicro: add more dependencies on the Verilog source
2010-12-01 Tommy ThornBeMicro: filter much of the Quartus II messages
2010-12-01 Tommy ThornBeMicro: capture the building of the programming file...
10 years ago yari-1.0
10 years ago jtres08
10 years ago yari-0.1-rc2
10 years ago yari-0.1-rc1
5 years ago master
7 years ago ML401
8 years ago demo/puzzlebobble
9 years ago jop-usb
9 years ago cacao
10 years ago mob