the R_X86_64_GOTOFF64 relocation was missing
[tinycc.git] / x86_64-gen.c
blob584fd0715cab0ca45504ac0438c5a9d8512e267e
1 /*
2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
26 #define NB_REGS 25
27 #define NB_ASM_REGS 16
28 #define CONFIG_TCC_ASM
30 /* a register can belong to several classes. The classes must be
31 sorted from more general to more precise (see gv2() code which does
32 assumptions on it). */
33 #define RC_INT 0x0001 /* generic integer register */
34 #define RC_FLOAT 0x0002 /* generic float register */
35 #define RC_RAX 0x0004
36 #define RC_RCX 0x0008
37 #define RC_RDX 0x0010
38 #define RC_ST0 0x0080 /* only for long double */
39 #define RC_R8 0x0100
40 #define RC_R9 0x0200
41 #define RC_R10 0x0400
42 #define RC_R11 0x0800
43 #define RC_XMM0 0x1000
44 #define RC_XMM1 0x2000
45 #define RC_XMM2 0x4000
46 #define RC_XMM3 0x8000
47 #define RC_XMM4 0x10000
48 #define RC_XMM5 0x20000
49 #define RC_XMM6 0x40000
50 #define RC_XMM7 0x80000
51 #define RC_IRET RC_RAX /* function return: integer register */
52 #define RC_LRET RC_RDX /* function return: second integer register */
53 #define RC_FRET RC_XMM0 /* function return: float register */
54 #define RC_QRET RC_XMM1 /* function return: second float register */
56 /* pretty names for the registers */
57 enum {
58 TREG_RAX = 0,
59 TREG_RCX = 1,
60 TREG_RDX = 2,
61 TREG_RSP = 4,
62 TREG_RSI = 6,
63 TREG_RDI = 7,
65 TREG_R8 = 8,
66 TREG_R9 = 9,
67 TREG_R10 = 10,
68 TREG_R11 = 11,
70 TREG_XMM0 = 16,
71 TREG_XMM1 = 17,
72 TREG_XMM2 = 18,
73 TREG_XMM3 = 19,
74 TREG_XMM4 = 20,
75 TREG_XMM5 = 21,
76 TREG_XMM6 = 22,
77 TREG_XMM7 = 23,
79 TREG_ST0 = 24,
81 TREG_MEM = 0x20
84 #define REX_BASE(reg) (((reg) >> 3) & 1)
85 #define REG_VALUE(reg) ((reg) & 7)
87 /* return registers for function */
88 #define REG_IRET TREG_RAX /* single word int return register */
89 #define REG_LRET TREG_RDX /* second word return register (for long long) */
90 #define REG_FRET TREG_XMM0 /* float return register */
91 #define REG_QRET TREG_XMM1 /* second float return register */
93 /* defined if function parameters must be evaluated in reverse order */
94 #define INVERT_FUNC_PARAMS
96 /* pointer size, in bytes */
97 #define PTR_SIZE 8
99 /* long double size and alignment, in bytes */
100 #define LDOUBLE_SIZE 16
101 #define LDOUBLE_ALIGN 16
102 /* maximum alignment (for aligned attribute support) */
103 #define MAX_ALIGN 16
105 /******************************************************/
106 #else /* ! TARGET_DEFS_ONLY */
107 /******************************************************/
108 #include "tcc.h"
109 #include <assert.h>
111 ST_DATA const int reg_classes[NB_REGS] = {
112 /* eax */ RC_INT | RC_RAX,
113 /* ecx */ RC_INT | RC_RCX,
114 /* edx */ RC_INT | RC_RDX,
120 RC_R8,
121 RC_R9,
122 RC_R10,
123 RC_R11,
128 /* xmm0 */ RC_FLOAT | RC_XMM0,
129 /* xmm1 */ RC_FLOAT | RC_XMM1,
130 /* xmm2 */ RC_FLOAT | RC_XMM2,
131 /* xmm3 */ RC_FLOAT | RC_XMM3,
132 /* xmm4 */ RC_FLOAT | RC_XMM4,
133 /* xmm5 */ RC_FLOAT | RC_XMM5,
134 /* xmm6 an xmm7 are included so gv() can be used on them,
135 but they are not tagged with RC_FLOAT because they are
136 callee saved on Windows */
137 RC_XMM6,
138 RC_XMM7,
139 /* st0 */ RC_ST0
142 static unsigned long func_sub_sp_offset;
143 static int func_ret_sub;
145 /* XXX: make it faster ? */
146 ST_FUNC void g(int c)
148 int ind1;
149 if (nocode_wanted)
150 return;
151 ind1 = ind + 1;
152 if (ind1 > cur_text_section->data_allocated)
153 section_realloc(cur_text_section, ind1);
154 cur_text_section->data[ind] = c;
155 ind = ind1;
158 ST_FUNC void o(unsigned int c)
160 while (c) {
161 g(c);
162 c = c >> 8;
166 ST_FUNC void gen_le16(int v)
168 g(v);
169 g(v >> 8);
172 ST_FUNC void gen_le32(int c)
174 g(c);
175 g(c >> 8);
176 g(c >> 16);
177 g(c >> 24);
180 ST_FUNC void gen_le64(int64_t c)
182 g(c);
183 g(c >> 8);
184 g(c >> 16);
185 g(c >> 24);
186 g(c >> 32);
187 g(c >> 40);
188 g(c >> 48);
189 g(c >> 56);
192 static void orex(int ll, int r, int r2, int b)
194 if ((r & VT_VALMASK) >= VT_CONST)
195 r = 0;
196 if ((r2 & VT_VALMASK) >= VT_CONST)
197 r2 = 0;
198 if (ll || REX_BASE(r) || REX_BASE(r2))
199 o(0x40 | REX_BASE(r) | (REX_BASE(r2) << 2) | (ll << 3));
200 o(b);
203 /* output a symbol and patch all calls to it */
204 ST_FUNC void gsym_addr(int t, int a)
206 while (t) {
207 unsigned char *ptr = cur_text_section->data + t;
208 uint32_t n = read32le(ptr); /* next value */
209 write32le(ptr, a - t - 4);
210 t = n;
214 void gsym(int t)
216 gsym_addr(t, ind);
220 static int is64_type(int t)
222 return ((t & VT_BTYPE) == VT_PTR ||
223 (t & VT_BTYPE) == VT_FUNC ||
224 (t & VT_BTYPE) == VT_LLONG);
227 /* instruction + 4 bytes data. Return the address of the data */
228 static int oad(int c, int s)
230 int t;
231 if (nocode_wanted)
232 return s;
233 o(c);
234 t = ind;
235 gen_le32(s);
236 return t;
239 /* generate jmp to a label */
240 #define gjmp2(instr,lbl) oad(instr,lbl)
242 ST_FUNC void gen_addr32(int r, Sym *sym, long c)
244 if (r & VT_SYM)
245 greloca(cur_text_section, sym, ind, R_X86_64_32S, c), c=0;
246 gen_le32(c);
249 /* output constant with relocation if 'r & VT_SYM' is true */
250 ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c)
252 if (r & VT_SYM)
253 greloca(cur_text_section, sym, ind, R_X86_64_64, c), c=0;
254 gen_le64(c);
257 /* output constant with relocation if 'r & VT_SYM' is true */
258 ST_FUNC void gen_addrpc32(int r, Sym *sym, long c)
260 if (r & VT_SYM)
261 greloca(cur_text_section, sym, ind, R_X86_64_PC32, c-4), c=4;
262 gen_le32(c-4);
265 /* output got address with relocation */
266 static void gen_gotpcrel(int r, Sym *sym, int c)
268 #ifdef TCC_TARGET_PE
269 tcc_error("internal error: no GOT on PE: %s %x %x | %02x %02x %02x\n",
270 get_tok_str(sym->v, NULL), c, r,
271 cur_text_section->data[ind-3],
272 cur_text_section->data[ind-2],
273 cur_text_section->data[ind-1]
275 #endif
276 greloca(cur_text_section, sym, ind, R_X86_64_GOTPCREL, -4);
277 gen_le32(0);
278 if (c) {
279 /* we use add c, %xxx for displacement */
280 orex(1, r, 0, 0x81);
281 o(0xc0 + REG_VALUE(r));
282 gen_le32(c);
286 static void gen_modrm_impl(int op_reg, int r, Sym *sym, int c, int is_got)
288 op_reg = REG_VALUE(op_reg) << 3;
289 if ((r & VT_VALMASK) == VT_CONST) {
290 /* constant memory reference */
291 o(0x05 | op_reg);
292 if (is_got) {
293 gen_gotpcrel(r, sym, c);
294 } else {
295 gen_addrpc32(r, sym, c);
297 } else if ((r & VT_VALMASK) == VT_LOCAL) {
298 /* currently, we use only ebp as base */
299 if (c == (char)c) {
300 /* short reference */
301 o(0x45 | op_reg);
302 g(c);
303 } else {
304 oad(0x85 | op_reg, c);
306 } else if ((r & VT_VALMASK) >= TREG_MEM) {
307 if (c) {
308 g(0x80 | op_reg | REG_VALUE(r));
309 gen_le32(c);
310 } else {
311 g(0x00 | op_reg | REG_VALUE(r));
313 } else {
314 g(0x00 | op_reg | REG_VALUE(r));
318 /* generate a modrm reference. 'op_reg' contains the addtional 3
319 opcode bits */
320 static void gen_modrm(int op_reg, int r, Sym *sym, int c)
322 gen_modrm_impl(op_reg, r, sym, c, 0);
325 /* generate a modrm reference. 'op_reg' contains the addtional 3
326 opcode bits */
327 static void gen_modrm64(int opcode, int op_reg, int r, Sym *sym, int c)
329 int is_got;
330 is_got = (op_reg & TREG_MEM) && !(sym->type.t & VT_STATIC);
331 orex(1, r, op_reg, opcode);
332 gen_modrm_impl(op_reg, r, sym, c, is_got);
336 /* load 'r' from value 'sv' */
337 void load(int r, SValue *sv)
339 int v, t, ft, fc, fr;
340 SValue v1;
342 #ifdef TCC_TARGET_PE
343 SValue v2;
344 sv = pe_getimport(sv, &v2);
345 #endif
347 fr = sv->r;
348 ft = sv->type.t & ~VT_DEFSIGN;
349 fc = sv->c.i;
350 if (fc != sv->c.i && (fr & VT_SYM))
351 tcc_error("64 bit addend in load");
353 ft &= ~(VT_VOLATILE | VT_CONSTANT);
355 #ifndef TCC_TARGET_PE
356 /* we use indirect access via got */
357 if ((fr & VT_VALMASK) == VT_CONST && (fr & VT_SYM) &&
358 (fr & VT_LVAL) && !(sv->sym->type.t & VT_STATIC)) {
359 /* use the result register as a temporal register */
360 int tr = r | TREG_MEM;
361 if (is_float(ft)) {
362 /* we cannot use float registers as a temporal register */
363 tr = get_reg(RC_INT) | TREG_MEM;
365 gen_modrm64(0x8b, tr, fr, sv->sym, 0);
367 /* load from the temporal register */
368 fr = tr | VT_LVAL;
370 #endif
372 v = fr & VT_VALMASK;
373 if (fr & VT_LVAL) {
374 int b, ll;
375 if (v == VT_LLOCAL) {
376 v1.type.t = VT_PTR;
377 v1.r = VT_LOCAL | VT_LVAL;
378 v1.c.i = fc;
379 fr = r;
380 if (!(reg_classes[fr] & (RC_INT|RC_R11)))
381 fr = get_reg(RC_INT);
382 load(fr, &v1);
384 ll = 0;
385 /* Like GCC we can load from small enough properly sized
386 structs and unions as well.
387 XXX maybe move to generic operand handling, but should
388 occur only with asm, so tccasm.c might also be a better place */
389 if ((ft & VT_BTYPE) == VT_STRUCT) {
390 int align;
391 switch (type_size(&sv->type, &align)) {
392 case 1: ft = VT_BYTE; break;
393 case 2: ft = VT_SHORT; break;
394 case 4: ft = VT_INT; break;
395 case 8: ft = VT_LLONG; break;
396 default:
397 tcc_error("invalid aggregate type for register load");
398 break;
401 if ((ft & VT_BTYPE) == VT_FLOAT) {
402 b = 0x6e0f66;
403 r = REG_VALUE(r); /* movd */
404 } else if ((ft & VT_BTYPE) == VT_DOUBLE) {
405 b = 0x7e0ff3; /* movq */
406 r = REG_VALUE(r);
407 } else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
408 b = 0xdb, r = 5; /* fldt */
409 } else if ((ft & VT_TYPE) == VT_BYTE || (ft & VT_TYPE) == VT_BOOL) {
410 b = 0xbe0f; /* movsbl */
411 } else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED)) {
412 b = 0xb60f; /* movzbl */
413 } else if ((ft & VT_TYPE) == VT_SHORT) {
414 b = 0xbf0f; /* movswl */
415 } else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED)) {
416 b = 0xb70f; /* movzwl */
417 } else {
418 assert(((ft & VT_BTYPE) == VT_INT) || ((ft & VT_BTYPE) == VT_LLONG)
419 || ((ft & VT_BTYPE) == VT_PTR) || ((ft & VT_BTYPE) == VT_ENUM)
420 || ((ft & VT_BTYPE) == VT_FUNC));
421 ll = is64_type(ft);
422 b = 0x8b;
424 if (ll) {
425 gen_modrm64(b, r, fr, sv->sym, fc);
426 } else {
427 orex(ll, fr, r, b);
428 gen_modrm(r, fr, sv->sym, fc);
430 } else {
431 if (v == VT_CONST) {
432 if (fr & VT_SYM) {
433 #ifdef TCC_TARGET_PE
434 orex(1,0,r,0x8d);
435 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
436 gen_addrpc32(fr, sv->sym, fc);
437 #else
438 if (sv->sym->type.t & VT_STATIC) {
439 orex(1,0,r,0x8d);
440 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
441 gen_addrpc32(fr, sv->sym, fc);
442 } else {
443 orex(1,0,r,0x8b);
444 o(0x05 + REG_VALUE(r) * 8); /* mov xx(%rip), r */
445 gen_gotpcrel(r, sv->sym, fc);
447 #endif
448 } else if (is64_type(ft)) {
449 orex(1,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
450 gen_le64(sv->c.i);
451 } else {
452 orex(0,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
453 gen_le32(fc);
455 } else if (v == VT_LOCAL) {
456 orex(1,0,r,0x8d); /* lea xxx(%ebp), r */
457 gen_modrm(r, VT_LOCAL, sv->sym, fc);
458 } else if (v == VT_CMP) {
459 orex(0,r,0,0);
460 if ((fc & ~0x100) != TOK_NE)
461 oad(0xb8 + REG_VALUE(r), 0); /* mov $0, r */
462 else
463 oad(0xb8 + REG_VALUE(r), 1); /* mov $1, r */
464 if (fc & 0x100)
466 /* This was a float compare. If the parity bit is
467 set the result was unordered, meaning false for everything
468 except TOK_NE, and true for TOK_NE. */
469 fc &= ~0x100;
470 o(0x037a + (REX_BASE(r) << 8));
472 orex(0,r,0, 0x0f); /* setxx %br */
473 o(fc);
474 o(0xc0 + REG_VALUE(r));
475 } else if (v == VT_JMP || v == VT_JMPI) {
476 t = v & 1;
477 orex(0,r,0,0);
478 oad(0xb8 + REG_VALUE(r), t); /* mov $1, r */
479 o(0x05eb + (REX_BASE(r) << 8)); /* jmp after */
480 gsym(fc);
481 orex(0,r,0,0);
482 oad(0xb8 + REG_VALUE(r), t ^ 1); /* mov $0, r */
483 } else if (v != r) {
484 if ((r >= TREG_XMM0) && (r <= TREG_XMM7)) {
485 if (v == TREG_ST0) {
486 /* gen_cvt_ftof(VT_DOUBLE); */
487 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
488 /* movsd -0x10(%rsp),%xmmN */
489 o(0x100ff2);
490 o(0x44 + REG_VALUE(r)*8); /* %xmmN */
491 o(0xf024);
492 } else {
493 assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
494 if ((ft & VT_BTYPE) == VT_FLOAT) {
495 o(0x100ff3);
496 } else {
497 assert((ft & VT_BTYPE) == VT_DOUBLE);
498 o(0x100ff2);
500 o(0xc0 + REG_VALUE(v) + REG_VALUE(r)*8);
502 } else if (r == TREG_ST0) {
503 assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
504 /* gen_cvt_ftof(VT_LDOUBLE); */
505 /* movsd %xmmN,-0x10(%rsp) */
506 o(0x110ff2);
507 o(0x44 + REG_VALUE(r)*8); /* %xmmN */
508 o(0xf024);
509 o(0xf02444dd); /* fldl -0x10(%rsp) */
510 } else {
511 orex(1,r,v, 0x89);
512 o(0xc0 + REG_VALUE(r) + REG_VALUE(v) * 8); /* mov v, r */
518 /* store register 'r' in lvalue 'v' */
519 void store(int r, SValue *v)
521 int fr, bt, ft, fc;
522 int op64 = 0;
523 /* store the REX prefix in this variable when PIC is enabled */
524 int pic = 0;
526 #ifdef TCC_TARGET_PE
527 SValue v2;
528 v = pe_getimport(v, &v2);
529 #endif
531 fr = v->r & VT_VALMASK;
532 ft = v->type.t;
533 fc = v->c.i;
534 if (fc != v->c.i && (fr & VT_SYM))
535 tcc_error("64 bit addend in store");
536 ft &= ~(VT_VOLATILE | VT_CONSTANT);
537 bt = ft & VT_BTYPE;
539 #ifndef TCC_TARGET_PE
540 /* we need to access the variable via got */
541 if (fr == VT_CONST && (v->r & VT_SYM)) {
542 /* mov xx(%rip), %r11 */
543 o(0x1d8b4c);
544 gen_gotpcrel(TREG_R11, v->sym, v->c.i);
545 pic = is64_type(bt) ? 0x49 : 0x41;
547 #endif
549 /* XXX: incorrect if float reg to reg */
550 if (bt == VT_FLOAT) {
551 o(0x66);
552 o(pic);
553 o(0x7e0f); /* movd */
554 r = REG_VALUE(r);
555 } else if (bt == VT_DOUBLE) {
556 o(0x66);
557 o(pic);
558 o(0xd60f); /* movq */
559 r = REG_VALUE(r);
560 } else if (bt == VT_LDOUBLE) {
561 o(0xc0d9); /* fld %st(0) */
562 o(pic);
563 o(0xdb); /* fstpt */
564 r = 7;
565 } else {
566 if (bt == VT_SHORT)
567 o(0x66);
568 o(pic);
569 if (bt == VT_BYTE || bt == VT_BOOL)
570 orex(0, 0, r, 0x88);
571 else if (is64_type(bt))
572 op64 = 0x89;
573 else
574 orex(0, 0, r, 0x89);
576 if (pic) {
577 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
578 if (op64)
579 o(op64);
580 o(3 + (r << 3));
581 } else if (op64) {
582 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
583 gen_modrm64(op64, r, v->r, v->sym, fc);
584 } else if (fr != r) {
585 /* XXX: don't we really come here? */
586 abort();
587 o(0xc0 + fr + r * 8); /* mov r, fr */
589 } else {
590 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
591 gen_modrm(r, v->r, v->sym, fc);
592 } else if (fr != r) {
593 /* XXX: don't we really come here? */
594 abort();
595 o(0xc0 + fr + r * 8); /* mov r, fr */
600 /* 'is_jmp' is '1' if it is a jump */
601 static void gcall_or_jmp(int is_jmp)
603 int r;
604 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST &&
605 ((vtop->r & VT_SYM) || (vtop->c.i-4) == (int)(vtop->c.i-4))) {
606 /* constant case */
607 if (vtop->r & VT_SYM) {
608 /* relocation case */
609 #ifdef TCC_TARGET_PE
610 greloca(cur_text_section, vtop->sym, ind + 1, R_X86_64_PC32, (int)(vtop->c.i-4));
611 #else
612 greloca(cur_text_section, vtop->sym, ind + 1, R_X86_64_PLT32, (int)(vtop->c.i-4));
613 #endif
614 } else {
615 /* put an empty PC32 relocation */
616 put_elf_reloca(symtab_section, cur_text_section,
617 ind + 1, R_X86_64_PC32, 0, (int)(vtop->c.i-4));
619 oad(0xe8 + is_jmp, 0); /* call/jmp im */
620 } else {
621 /* otherwise, indirect call */
622 r = TREG_R11;
623 load(r, vtop);
624 o(0x41); /* REX */
625 o(0xff); /* call/jmp *r */
626 o(0xd0 + REG_VALUE(r) + (is_jmp << 4));
630 #if defined(CONFIG_TCC_BCHECK)
631 #ifndef TCC_TARGET_PE
632 static addr_t func_bound_offset;
633 static unsigned long func_bound_ind;
634 #endif
636 static void gen_static_call(int v)
638 Sym *sym = external_global_sym(v, &func_old_type, 0);
639 oad(0xe8, 0);
640 greloca(cur_text_section, sym, ind-4, R_X86_64_PC32, -4);
643 /* generate a bounded pointer addition */
644 ST_FUNC void gen_bounded_ptr_add(void)
646 /* save all temporary registers */
647 save_regs(0);
649 /* prepare fast x86_64 function call */
650 gv(RC_RAX);
651 o(0xc68948); // mov %rax,%rsi ## second arg in %rsi, this must be size
652 vtop--;
654 gv(RC_RAX);
655 o(0xc78948); // mov %rax,%rdi ## first arg in %rdi, this must be ptr
656 vtop--;
658 /* do a fast function call */
659 gen_static_call(TOK___bound_ptr_add);
661 /* returned pointer is in rax */
662 vtop++;
663 vtop->r = TREG_RAX | VT_BOUNDED;
666 /* relocation offset of the bounding function call point */
667 vtop->c.i = (cur_text_section->reloc->data_offset - sizeof(ElfW(Rela)));
670 /* patch pointer addition in vtop so that pointer dereferencing is
671 also tested */
672 ST_FUNC void gen_bounded_ptr_deref(void)
674 addr_t func;
675 int size, align;
676 ElfW(Rela) *rel;
677 Sym *sym;
679 size = 0;
680 /* XXX: put that code in generic part of tcc */
681 if (!is_float(vtop->type.t)) {
682 if (vtop->r & VT_LVAL_BYTE)
683 size = 1;
684 else if (vtop->r & VT_LVAL_SHORT)
685 size = 2;
687 if (!size)
688 size = type_size(&vtop->type, &align);
689 switch(size) {
690 case 1: func = TOK___bound_ptr_indir1; break;
691 case 2: func = TOK___bound_ptr_indir2; break;
692 case 4: func = TOK___bound_ptr_indir4; break;
693 case 8: func = TOK___bound_ptr_indir8; break;
694 case 12: func = TOK___bound_ptr_indir12; break;
695 case 16: func = TOK___bound_ptr_indir16; break;
696 default:
697 tcc_error("unhandled size when dereferencing bounded pointer");
698 func = 0;
699 break;
702 sym = external_global_sym(func, &func_old_type, 0);
703 if (!sym->c)
704 put_extern_sym(sym, NULL, 0, 0);
706 /* patch relocation */
707 /* XXX: find a better solution ? */
709 rel = (ElfW(Rela) *)(cur_text_section->reloc->data + vtop->c.i);
710 rel->r_info = ELF64_R_INFO(sym->c, ELF64_R_TYPE(rel->r_info));
712 #endif
714 #ifdef TCC_TARGET_PE
716 #define REGN 4
717 static const uint8_t arg_regs[REGN] = {
718 TREG_RCX, TREG_RDX, TREG_R8, TREG_R9
721 /* Prepare arguments in R10 and R11 rather than RCX and RDX
722 because gv() will not ever use these */
723 static int arg_prepare_reg(int idx) {
724 if (idx == 0 || idx == 1)
725 /* idx=0: r10, idx=1: r11 */
726 return idx + 10;
727 else
728 return arg_regs[idx];
731 static int func_scratch;
733 /* Generate function call. The function address is pushed first, then
734 all the parameters in call order. This functions pops all the
735 parameters and the function address. */
737 void gen_offs_sp(int b, int r, int d)
739 orex(1,0,r & 0x100 ? 0 : r, b);
740 if (d == (char)d) {
741 o(0x2444 | (REG_VALUE(r) << 3));
742 g(d);
743 } else {
744 o(0x2484 | (REG_VALUE(r) << 3));
745 gen_le32(d);
749 /* Return the number of registers needed to return the struct, or 0 if
750 returning via struct pointer. */
751 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize)
753 int size, align;
754 *ret_align = 1; // Never have to re-align return values for x86-64
755 *regsize = 8;
756 size = type_size(vt, &align);
757 if (size > 8 || (size & (size - 1)))
758 return 0;
759 if (size == 8)
760 ret->t = VT_LLONG;
761 else if (size == 4)
762 ret->t = VT_INT;
763 else if (size == 2)
764 ret->t = VT_SHORT;
765 else
766 ret->t = VT_BYTE;
767 ret->ref = NULL;
768 return 1;
771 static int is_sse_float(int t) {
772 int bt;
773 bt = t & VT_BTYPE;
774 return bt == VT_DOUBLE || bt == VT_FLOAT;
777 int gfunc_arg_size(CType *type) {
778 int align;
779 if (type->t & (VT_ARRAY|VT_BITFIELD))
780 return 8;
781 return type_size(type, &align);
784 void gfunc_call(int nb_args)
786 int size, r, args_size, i, d, bt, struct_size;
787 int arg;
789 args_size = (nb_args < REGN ? REGN : nb_args) * PTR_SIZE;
790 arg = nb_args;
792 /* for struct arguments, we need to call memcpy and the function
793 call breaks register passing arguments we are preparing.
794 So, we process arguments which will be passed by stack first. */
795 struct_size = args_size;
796 for(i = 0; i < nb_args; i++) {
797 SValue *sv;
799 --arg;
800 sv = &vtop[-i];
801 bt = (sv->type.t & VT_BTYPE);
802 size = gfunc_arg_size(&sv->type);
804 if (size <= 8)
805 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
807 if (bt == VT_STRUCT) {
808 /* align to stack align size */
809 size = (size + 15) & ~15;
810 /* generate structure store */
811 r = get_reg(RC_INT);
812 gen_offs_sp(0x8d, r, struct_size);
813 struct_size += size;
815 /* generate memcpy call */
816 vset(&sv->type, r | VT_LVAL, 0);
817 vpushv(sv);
818 vstore();
819 --vtop;
820 } else if (bt == VT_LDOUBLE) {
821 gv(RC_ST0);
822 gen_offs_sp(0xdb, 0x107, struct_size);
823 struct_size += 16;
827 if (func_scratch < struct_size)
828 func_scratch = struct_size;
830 arg = nb_args;
831 struct_size = args_size;
833 for(i = 0; i < nb_args; i++) {
834 --arg;
835 bt = (vtop->type.t & VT_BTYPE);
837 size = gfunc_arg_size(&vtop->type);
838 if (size > 8) {
839 /* align to stack align size */
840 size = (size + 15) & ~15;
841 if (arg >= REGN) {
842 d = get_reg(RC_INT);
843 gen_offs_sp(0x8d, d, struct_size);
844 gen_offs_sp(0x89, d, arg*8);
845 } else {
846 d = arg_prepare_reg(arg);
847 gen_offs_sp(0x8d, d, struct_size);
849 struct_size += size;
850 } else {
851 if (is_sse_float(vtop->type.t)) {
852 if (tcc_state->nosse)
853 tcc_error("SSE disabled");
854 gv(RC_XMM0); /* only use one float register */
855 if (arg >= REGN) {
856 /* movq %xmm0, j*8(%rsp) */
857 gen_offs_sp(0xd60f66, 0x100, arg*8);
858 } else {
859 /* movaps %xmm0, %xmmN */
860 o(0x280f);
861 o(0xc0 + (arg << 3));
862 d = arg_prepare_reg(arg);
863 /* mov %xmm0, %rxx */
864 o(0x66);
865 orex(1,d,0, 0x7e0f);
866 o(0xc0 + REG_VALUE(d));
868 } else {
869 if (bt == VT_STRUCT) {
870 vtop->type.ref = NULL;
871 vtop->type.t = size > 4 ? VT_LLONG : size > 2 ? VT_INT
872 : size > 1 ? VT_SHORT : VT_BYTE;
875 r = gv(RC_INT);
876 if (arg >= REGN) {
877 gen_offs_sp(0x89, r, arg*8);
878 } else {
879 d = arg_prepare_reg(arg);
880 orex(1,d,r,0x89); /* mov */
881 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
885 vtop--;
887 save_regs(0);
889 /* Copy R10 and R11 into RCX and RDX, respectively */
890 if (nb_args > 0) {
891 o(0xd1894c); /* mov %r10, %rcx */
892 if (nb_args > 1) {
893 o(0xda894c); /* mov %r11, %rdx */
897 gcall_or_jmp(0);
898 /* other compilers don't clear the upper bits when returning char/short */
899 bt = vtop->type.ref->type.t & (VT_BTYPE | VT_UNSIGNED);
900 if (bt == (VT_BYTE | VT_UNSIGNED))
901 o(0xc0b60f); /* movzbl %al, %eax */
902 else if (bt == VT_BYTE)
903 o(0xc0be0f); /* movsbl %al, %eax */
904 else if (bt == VT_SHORT)
905 o(0x98); /* cwtl */
906 else if (bt == (VT_SHORT | VT_UNSIGNED))
907 o(0xc0b70f); /* movzbl %al, %eax */
908 #if 0 /* handled in gen_cast() */
909 else if (bt == VT_INT)
910 o(0x9848); /* cltq */
911 else if (bt == (VT_INT | VT_UNSIGNED))
912 o(0xc089); /* mov %eax,%eax */
913 #endif
914 vtop--;
918 #define FUNC_PROLOG_SIZE 11
920 /* generate function prolog of type 't' */
921 void gfunc_prolog(CType *func_type)
923 int addr, reg_param_index, bt, size;
924 Sym *sym;
925 CType *type;
927 func_ret_sub = 0;
928 func_scratch = 0;
929 loc = 0;
931 addr = PTR_SIZE * 2;
932 ind += FUNC_PROLOG_SIZE;
933 func_sub_sp_offset = ind;
934 reg_param_index = 0;
936 sym = func_type->ref;
938 /* if the function returns a structure, then add an
939 implicit pointer parameter */
940 func_vt = sym->type;
941 func_var = (sym->c == FUNC_ELLIPSIS);
942 size = gfunc_arg_size(&func_vt);
943 if (size > 8) {
944 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
945 func_vc = addr;
946 reg_param_index++;
947 addr += 8;
950 /* define parameters */
951 while ((sym = sym->next) != NULL) {
952 type = &sym->type;
953 bt = type->t & VT_BTYPE;
954 size = gfunc_arg_size(type);
955 if (size > 8) {
956 if (reg_param_index < REGN) {
957 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
959 sym_push(sym->v & ~SYM_FIELD, type, VT_LLOCAL | VT_LVAL, addr);
960 } else {
961 if (reg_param_index < REGN) {
962 /* save arguments passed by register */
963 if ((bt == VT_FLOAT) || (bt == VT_DOUBLE)) {
964 if (tcc_state->nosse)
965 tcc_error("SSE disabled");
966 o(0xd60f66); /* movq */
967 gen_modrm(reg_param_index, VT_LOCAL, NULL, addr);
968 } else {
969 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
972 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL, addr);
974 addr += 8;
975 reg_param_index++;
978 while (reg_param_index < REGN) {
979 if (func_type->ref->c == FUNC_ELLIPSIS) {
980 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
981 addr += 8;
983 reg_param_index++;
987 /* generate function epilog */
988 void gfunc_epilog(void)
990 int v, saved_ind;
992 o(0xc9); /* leave */
993 if (func_ret_sub == 0) {
994 o(0xc3); /* ret */
995 } else {
996 o(0xc2); /* ret n */
997 g(func_ret_sub);
998 g(func_ret_sub >> 8);
1001 saved_ind = ind;
1002 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
1003 /* align local size to word & save local variables */
1004 v = (func_scratch + -loc + 15) & -16;
1006 if (v >= 4096) {
1007 Sym *sym = external_global_sym(TOK___chkstk, &func_old_type, 0);
1008 oad(0xb8, v); /* mov stacksize, %eax */
1009 oad(0xe8, 0); /* call __chkstk, (does the stackframe too) */
1010 greloca(cur_text_section, sym, ind-4, R_X86_64_PC32, -4);
1011 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
1012 } else {
1013 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1014 o(0xec8148); /* sub rsp, stacksize */
1015 gen_le32(v);
1018 cur_text_section->data_offset = saved_ind;
1019 pe_add_unwind_data(ind, saved_ind, v);
1020 ind = cur_text_section->data_offset;
1023 #else
1025 static void gadd_sp(int val)
1027 if (val == (char)val) {
1028 o(0xc48348);
1029 g(val);
1030 } else {
1031 oad(0xc48148, val); /* add $xxx, %rsp */
1035 typedef enum X86_64_Mode {
1036 x86_64_mode_none,
1037 x86_64_mode_memory,
1038 x86_64_mode_integer,
1039 x86_64_mode_sse,
1040 x86_64_mode_x87
1041 } X86_64_Mode;
1043 static X86_64_Mode classify_x86_64_merge(X86_64_Mode a, X86_64_Mode b)
1045 if (a == b)
1046 return a;
1047 else if (a == x86_64_mode_none)
1048 return b;
1049 else if (b == x86_64_mode_none)
1050 return a;
1051 else if ((a == x86_64_mode_memory) || (b == x86_64_mode_memory))
1052 return x86_64_mode_memory;
1053 else if ((a == x86_64_mode_integer) || (b == x86_64_mode_integer))
1054 return x86_64_mode_integer;
1055 else if ((a == x86_64_mode_x87) || (b == x86_64_mode_x87))
1056 return x86_64_mode_memory;
1057 else
1058 return x86_64_mode_sse;
1061 static X86_64_Mode classify_x86_64_inner(CType *ty)
1063 X86_64_Mode mode;
1064 Sym *f;
1066 switch (ty->t & VT_BTYPE) {
1067 case VT_VOID: return x86_64_mode_none;
1069 case VT_INT:
1070 case VT_BYTE:
1071 case VT_SHORT:
1072 case VT_LLONG:
1073 case VT_BOOL:
1074 case VT_PTR:
1075 case VT_FUNC:
1076 case VT_ENUM: return x86_64_mode_integer;
1078 case VT_FLOAT:
1079 case VT_DOUBLE: return x86_64_mode_sse;
1081 case VT_LDOUBLE: return x86_64_mode_x87;
1083 case VT_STRUCT:
1084 f = ty->ref;
1086 mode = x86_64_mode_none;
1087 for (f = f->next; f; f = f->next)
1088 mode = classify_x86_64_merge(mode, classify_x86_64_inner(&f->type));
1090 return mode;
1092 assert(0);
1093 return 0;
1096 static X86_64_Mode classify_x86_64_arg(CType *ty, CType *ret, int *psize, int *palign, int *reg_count)
1098 X86_64_Mode mode;
1099 int size, align, ret_t = 0;
1101 if (ty->t & (VT_BITFIELD|VT_ARRAY)) {
1102 *psize = 8;
1103 *palign = 8;
1104 *reg_count = 1;
1105 ret_t = ty->t;
1106 mode = x86_64_mode_integer;
1107 } else {
1108 size = type_size(ty, &align);
1109 *psize = (size + 7) & ~7;
1110 *palign = (align + 7) & ~7;
1112 if (size > 16) {
1113 mode = x86_64_mode_memory;
1114 } else {
1115 mode = classify_x86_64_inner(ty);
1116 switch (mode) {
1117 case x86_64_mode_integer:
1118 if (size > 8) {
1119 *reg_count = 2;
1120 ret_t = VT_QLONG;
1121 } else {
1122 *reg_count = 1;
1123 ret_t = (size > 4) ? VT_LLONG : VT_INT;
1125 break;
1127 case x86_64_mode_x87:
1128 *reg_count = 1;
1129 ret_t = VT_LDOUBLE;
1130 break;
1132 case x86_64_mode_sse:
1133 if (size > 8) {
1134 *reg_count = 2;
1135 ret_t = VT_QFLOAT;
1136 } else {
1137 *reg_count = 1;
1138 ret_t = (size > 4) ? VT_DOUBLE : VT_FLOAT;
1140 break;
1141 default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1146 if (ret) {
1147 ret->ref = NULL;
1148 ret->t = ret_t;
1151 return mode;
1154 ST_FUNC int classify_x86_64_va_arg(CType *ty)
1156 /* This definition must be synced with stdarg.h */
1157 enum __va_arg_type {
1158 __va_gen_reg, __va_float_reg, __va_stack
1160 int size, align, reg_count;
1161 X86_64_Mode mode = classify_x86_64_arg(ty, NULL, &size, &align, &reg_count);
1162 switch (mode) {
1163 default: return __va_stack;
1164 case x86_64_mode_integer: return __va_gen_reg;
1165 case x86_64_mode_sse: return __va_float_reg;
1169 /* Return the number of registers needed to return the struct, or 0 if
1170 returning via struct pointer. */
1171 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize)
1173 int size, align, reg_count;
1174 *ret_align = 1; // Never have to re-align return values for x86-64
1175 *regsize = 8;
1176 return (classify_x86_64_arg(vt, ret, &size, &align, &reg_count) != x86_64_mode_memory);
1179 #define REGN 6
1180 static const uint8_t arg_regs[REGN] = {
1181 TREG_RDI, TREG_RSI, TREG_RDX, TREG_RCX, TREG_R8, TREG_R9
1184 static int arg_prepare_reg(int idx) {
1185 if (idx == 2 || idx == 3)
1186 /* idx=2: r10, idx=3: r11 */
1187 return idx + 8;
1188 else
1189 return arg_regs[idx];
1192 /* Generate function call. The function address is pushed first, then
1193 all the parameters in call order. This functions pops all the
1194 parameters and the function address. */
1195 void gfunc_call(int nb_args)
1197 X86_64_Mode mode;
1198 CType type;
1199 int size, align, r, args_size, stack_adjust, run_start, run_end, i, reg_count;
1200 int nb_reg_args = 0;
1201 int nb_sse_args = 0;
1202 int sse_reg, gen_reg;
1204 /* calculate the number of integer/float register arguments */
1205 for(i = 0; i < nb_args; i++) {
1206 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1207 if (mode == x86_64_mode_sse)
1208 nb_sse_args += reg_count;
1209 else if (mode == x86_64_mode_integer)
1210 nb_reg_args += reg_count;
1213 if (nb_sse_args && tcc_state->nosse)
1214 tcc_error("SSE disabled but floating point arguments passed");
1216 /* arguments are collected in runs. Each run is a collection of 8-byte aligned arguments
1217 and ended by a 16-byte aligned argument. This is because, from the point of view of
1218 the callee, argument alignment is computed from the bottom up. */
1219 /* for struct arguments, we need to call memcpy and the function
1220 call breaks register passing arguments we are preparing.
1221 So, we process arguments which will be passed by stack first. */
1222 gen_reg = nb_reg_args;
1223 sse_reg = nb_sse_args;
1224 run_start = 0;
1225 args_size = 0;
1226 while (run_start != nb_args) {
1227 int run_gen_reg = gen_reg, run_sse_reg = sse_reg;
1229 run_end = nb_args;
1230 stack_adjust = 0;
1231 for(i = run_start; (i < nb_args) && (run_end == nb_args); i++) {
1232 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1233 switch (mode) {
1234 case x86_64_mode_memory:
1235 case x86_64_mode_x87:
1236 stack_arg:
1237 if (align == 16)
1238 run_end = i;
1239 else
1240 stack_adjust += size;
1241 break;
1243 case x86_64_mode_sse:
1244 sse_reg -= reg_count;
1245 if (sse_reg + reg_count > 8) goto stack_arg;
1246 break;
1248 case x86_64_mode_integer:
1249 gen_reg -= reg_count;
1250 if (gen_reg + reg_count > REGN) goto stack_arg;
1251 break;
1252 default: break; /* nothing to be done for x86_64_mode_none */
1256 gen_reg = run_gen_reg;
1257 sse_reg = run_sse_reg;
1259 /* adjust stack to align SSE boundary */
1260 if (stack_adjust &= 15) {
1261 /* fetch cpu flag before the following sub will change the value */
1262 if (vtop >= vstack && (vtop->r & VT_VALMASK) == VT_CMP)
1263 gv(RC_INT);
1265 stack_adjust = 16 - stack_adjust;
1266 o(0x48);
1267 oad(0xec81, stack_adjust); /* sub $xxx, %rsp */
1268 args_size += stack_adjust;
1271 for(i = run_start; i < run_end;) {
1272 /* Swap argument to top, it will possibly be changed here,
1273 and might use more temps. At the end of the loop we keep
1274 in on the stack and swap it back to its original position
1275 if it is a register. */
1276 SValue tmp = vtop[0];
1277 int arg_stored = 1;
1279 vtop[0] = vtop[-i];
1280 vtop[-i] = tmp;
1281 mode = classify_x86_64_arg(&vtop->type, NULL, &size, &align, &reg_count);
1283 switch (vtop->type.t & VT_BTYPE) {
1284 case VT_STRUCT:
1285 if (mode == x86_64_mode_sse) {
1286 if (sse_reg > 8)
1287 sse_reg -= reg_count;
1288 else
1289 arg_stored = 0;
1290 } else if (mode == x86_64_mode_integer) {
1291 if (gen_reg > REGN)
1292 gen_reg -= reg_count;
1293 else
1294 arg_stored = 0;
1297 if (arg_stored) {
1298 /* allocate the necessary size on stack */
1299 o(0x48);
1300 oad(0xec81, size); /* sub $xxx, %rsp */
1301 /* generate structure store */
1302 r = get_reg(RC_INT);
1303 orex(1, r, 0, 0x89); /* mov %rsp, r */
1304 o(0xe0 + REG_VALUE(r));
1305 vset(&vtop->type, r | VT_LVAL, 0);
1306 vswap();
1307 vstore();
1308 args_size += size;
1310 break;
1312 case VT_LDOUBLE:
1313 assert(0);
1314 break;
1316 case VT_FLOAT:
1317 case VT_DOUBLE:
1318 assert(mode == x86_64_mode_sse);
1319 if (sse_reg > 8) {
1320 --sse_reg;
1321 r = gv(RC_FLOAT);
1322 o(0x50); /* push $rax */
1323 /* movq %xmmN, (%rsp) */
1324 o(0xd60f66);
1325 o(0x04 + REG_VALUE(r)*8);
1326 o(0x24);
1327 args_size += size;
1328 } else {
1329 arg_stored = 0;
1331 break;
1333 default:
1334 assert(mode == x86_64_mode_integer);
1335 /* simple type */
1336 /* XXX: implicit cast ? */
1337 if (gen_reg > REGN) {
1338 --gen_reg;
1339 r = gv(RC_INT);
1340 orex(0,r,0,0x50 + REG_VALUE(r)); /* push r */
1341 args_size += size;
1342 } else {
1343 arg_stored = 0;
1345 break;
1348 /* And swap the argument back to it's original position. */
1349 tmp = vtop[0];
1350 vtop[0] = vtop[-i];
1351 vtop[-i] = tmp;
1353 if (arg_stored) {
1354 vrotb(i+1);
1355 assert((vtop->type.t == tmp.type.t) && (vtop->r == tmp.r));
1356 vpop();
1357 --nb_args;
1358 --run_end;
1359 } else {
1360 ++i;
1364 /* handle 16 byte aligned arguments at end of run */
1365 run_start = i = run_end;
1366 while (i < nb_args) {
1367 /* Rotate argument to top since it will always be popped */
1368 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1369 if (align != 16)
1370 break;
1372 vrotb(i+1);
1374 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1375 gv(RC_ST0);
1376 oad(0xec8148, size); /* sub $xxx, %rsp */
1377 o(0x7cdb); /* fstpt 0(%rsp) */
1378 g(0x24);
1379 g(0x00);
1380 args_size += size;
1381 } else {
1382 assert(mode == x86_64_mode_memory);
1384 /* allocate the necessary size on stack */
1385 o(0x48);
1386 oad(0xec81, size); /* sub $xxx, %rsp */
1387 /* generate structure store */
1388 r = get_reg(RC_INT);
1389 orex(1, r, 0, 0x89); /* mov %rsp, r */
1390 o(0xe0 + REG_VALUE(r));
1391 vset(&vtop->type, r | VT_LVAL, 0);
1392 vswap();
1393 vstore();
1394 args_size += size;
1397 vpop();
1398 --nb_args;
1402 /* XXX This should be superfluous. */
1403 save_regs(0); /* save used temporary registers */
1405 /* then, we prepare register passing arguments.
1406 Note that we cannot set RDX and RCX in this loop because gv()
1407 may break these temporary registers. Let's use R10 and R11
1408 instead of them */
1409 assert(gen_reg <= REGN);
1410 assert(sse_reg <= 8);
1411 for(i = 0; i < nb_args; i++) {
1412 mode = classify_x86_64_arg(&vtop->type, &type, &size, &align, &reg_count);
1413 /* Alter stack entry type so that gv() knows how to treat it */
1414 vtop->type = type;
1415 if (mode == x86_64_mode_sse) {
1416 if (reg_count == 2) {
1417 sse_reg -= 2;
1418 gv(RC_FRET); /* Use pair load into xmm0 & xmm1 */
1419 if (sse_reg) { /* avoid redundant movaps %xmm0, %xmm0 */
1420 /* movaps %xmm0, %xmmN */
1421 o(0x280f);
1422 o(0xc0 + (sse_reg << 3));
1423 /* movaps %xmm1, %xmmN */
1424 o(0x280f);
1425 o(0xc1 + ((sse_reg+1) << 3));
1427 } else {
1428 assert(reg_count == 1);
1429 --sse_reg;
1430 /* Load directly to register */
1431 gv(RC_XMM0 << sse_reg);
1433 } else if (mode == x86_64_mode_integer) {
1434 /* simple type */
1435 /* XXX: implicit cast ? */
1436 int d;
1437 gen_reg -= reg_count;
1438 r = gv(RC_INT);
1439 d = arg_prepare_reg(gen_reg);
1440 orex(1,d,r,0x89); /* mov */
1441 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
1442 if (reg_count == 2) {
1443 d = arg_prepare_reg(gen_reg+1);
1444 orex(1,d,vtop->r2,0x89); /* mov */
1445 o(0xc0 + REG_VALUE(vtop->r2) * 8 + REG_VALUE(d));
1448 vtop--;
1450 assert(gen_reg == 0);
1451 assert(sse_reg == 0);
1453 /* We shouldn't have many operands on the stack anymore, but the
1454 call address itself is still there, and it might be in %eax
1455 (or edx/ecx) currently, which the below writes would clobber.
1456 So evict all remaining operands here. */
1457 save_regs(0);
1459 /* Copy R10 and R11 into RDX and RCX, respectively */
1460 if (nb_reg_args > 2) {
1461 o(0xd2894c); /* mov %r10, %rdx */
1462 if (nb_reg_args > 3) {
1463 o(0xd9894c); /* mov %r11, %rcx */
1467 if (vtop->type.ref->c != FUNC_NEW) /* implies FUNC_OLD or FUNC_ELLIPSIS */
1468 oad(0xb8, nb_sse_args < 8 ? nb_sse_args : 8); /* mov nb_sse_args, %eax */
1469 gcall_or_jmp(0);
1470 if (args_size)
1471 gadd_sp(args_size);
1472 vtop--;
1476 #define FUNC_PROLOG_SIZE 11
1478 static void push_arg_reg(int i) {
1479 loc -= 8;
1480 gen_modrm64(0x89, arg_regs[i], VT_LOCAL, NULL, loc);
1483 /* generate function prolog of type 't' */
1484 void gfunc_prolog(CType *func_type)
1486 X86_64_Mode mode;
1487 int i, addr, align, size, reg_count;
1488 int param_addr = 0, reg_param_index, sse_param_index;
1489 Sym *sym;
1490 CType *type;
1492 sym = func_type->ref;
1493 addr = PTR_SIZE * 2;
1494 loc = 0;
1495 ind += FUNC_PROLOG_SIZE;
1496 func_sub_sp_offset = ind;
1497 func_ret_sub = 0;
1499 if (func_type->ref->c == FUNC_ELLIPSIS) {
1500 int seen_reg_num, seen_sse_num, seen_stack_size;
1501 seen_reg_num = seen_sse_num = 0;
1502 /* frame pointer and return address */
1503 seen_stack_size = PTR_SIZE * 2;
1504 /* count the number of seen parameters */
1505 sym = func_type->ref;
1506 while ((sym = sym->next) != NULL) {
1507 type = &sym->type;
1508 mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
1509 switch (mode) {
1510 default:
1511 stack_arg:
1512 seen_stack_size = ((seen_stack_size + align - 1) & -align) + size;
1513 break;
1515 case x86_64_mode_integer:
1516 if (seen_reg_num + reg_count <= 8) {
1517 seen_reg_num += reg_count;
1518 } else {
1519 seen_reg_num = 8;
1520 goto stack_arg;
1522 break;
1524 case x86_64_mode_sse:
1525 if (seen_sse_num + reg_count <= 8) {
1526 seen_sse_num += reg_count;
1527 } else {
1528 seen_sse_num = 8;
1529 goto stack_arg;
1531 break;
1535 loc -= 16;
1536 /* movl $0x????????, -0x10(%rbp) */
1537 o(0xf045c7);
1538 gen_le32(seen_reg_num * 8);
1539 /* movl $0x????????, -0xc(%rbp) */
1540 o(0xf445c7);
1541 gen_le32(seen_sse_num * 16 + 48);
1542 /* movl $0x????????, -0x8(%rbp) */
1543 o(0xf845c7);
1544 gen_le32(seen_stack_size);
1546 /* save all register passing arguments */
1547 for (i = 0; i < 8; i++) {
1548 loc -= 16;
1549 if (!tcc_state->nosse) {
1550 o(0xd60f66); /* movq */
1551 gen_modrm(7 - i, VT_LOCAL, NULL, loc);
1553 /* movq $0, loc+8(%rbp) */
1554 o(0x85c748);
1555 gen_le32(loc + 8);
1556 gen_le32(0);
1558 for (i = 0; i < REGN; i++) {
1559 push_arg_reg(REGN-1-i);
1563 sym = func_type->ref;
1564 reg_param_index = 0;
1565 sse_param_index = 0;
1567 /* if the function returns a structure, then add an
1568 implicit pointer parameter */
1569 func_vt = sym->type;
1570 mode = classify_x86_64_arg(&func_vt, NULL, &size, &align, &reg_count);
1571 if (mode == x86_64_mode_memory) {
1572 push_arg_reg(reg_param_index);
1573 func_vc = loc;
1574 reg_param_index++;
1576 /* define parameters */
1577 while ((sym = sym->next) != NULL) {
1578 type = &sym->type;
1579 mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
1580 switch (mode) {
1581 case x86_64_mode_sse:
1582 if (tcc_state->nosse)
1583 tcc_error("SSE disabled but floating point arguments used");
1584 if (sse_param_index + reg_count <= 8) {
1585 /* save arguments passed by register */
1586 loc -= reg_count * 8;
1587 param_addr = loc;
1588 for (i = 0; i < reg_count; ++i) {
1589 o(0xd60f66); /* movq */
1590 gen_modrm(sse_param_index, VT_LOCAL, NULL, param_addr + i*8);
1591 ++sse_param_index;
1593 } else {
1594 addr = (addr + align - 1) & -align;
1595 param_addr = addr;
1596 addr += size;
1598 break;
1600 case x86_64_mode_memory:
1601 case x86_64_mode_x87:
1602 addr = (addr + align - 1) & -align;
1603 param_addr = addr;
1604 addr += size;
1605 break;
1607 case x86_64_mode_integer: {
1608 if (reg_param_index + reg_count <= REGN) {
1609 /* save arguments passed by register */
1610 loc -= reg_count * 8;
1611 param_addr = loc;
1612 for (i = 0; i < reg_count; ++i) {
1613 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, param_addr + i*8);
1614 ++reg_param_index;
1616 } else {
1617 addr = (addr + align - 1) & -align;
1618 param_addr = addr;
1619 addr += size;
1621 break;
1623 default: break; /* nothing to be done for x86_64_mode_none */
1625 sym_push(sym->v & ~SYM_FIELD, type,
1626 VT_LOCAL | VT_LVAL, param_addr);
1629 #ifdef CONFIG_TCC_BCHECK
1630 /* leave some room for bound checking code */
1631 if (tcc_state->do_bounds_check) {
1632 func_bound_offset = lbounds_section->data_offset;
1633 func_bound_ind = ind;
1634 oad(0xb8, 0); /* lbound section pointer */
1635 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1636 oad(0xb8, 0); /* call to function */
1638 #endif
1641 /* generate function epilog */
1642 void gfunc_epilog(void)
1644 int v, saved_ind;
1646 #ifdef CONFIG_TCC_BCHECK
1647 if (tcc_state->do_bounds_check
1648 && func_bound_offset != lbounds_section->data_offset)
1650 addr_t saved_ind;
1651 addr_t *bounds_ptr;
1652 Sym *sym_data;
1654 /* add end of table info */
1655 bounds_ptr = section_ptr_add(lbounds_section, sizeof(addr_t));
1656 *bounds_ptr = 0;
1658 /* generate bound local allocation */
1659 sym_data = get_sym_ref(&char_pointer_type, lbounds_section,
1660 func_bound_offset, lbounds_section->data_offset);
1661 saved_ind = ind;
1662 ind = func_bound_ind;
1663 greloca(cur_text_section, sym_data, ind + 1, R_X86_64_64, 0);
1664 ind = ind + 5 + 3;
1665 gen_static_call(TOK___bound_local_new);
1666 ind = saved_ind;
1668 /* generate bound check local freeing */
1669 o(0x5250); /* save returned value, if any */
1670 greloca(cur_text_section, sym_data, ind + 1, R_X86_64_64, 0);
1671 oad(0xb8, 0); /* mov xxx, %rax */
1672 o(0xc78948); /* mov %rax,%rdi # first arg in %rdi, this must be ptr */
1673 gen_static_call(TOK___bound_local_delete);
1674 o(0x585a); /* restore returned value, if any */
1676 #endif
1677 o(0xc9); /* leave */
1678 if (func_ret_sub == 0) {
1679 o(0xc3); /* ret */
1680 } else {
1681 o(0xc2); /* ret n */
1682 g(func_ret_sub);
1683 g(func_ret_sub >> 8);
1685 /* align local size to word & save local variables */
1686 v = (-loc + 15) & -16;
1687 saved_ind = ind;
1688 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
1689 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1690 o(0xec8148); /* sub rsp, stacksize */
1691 gen_le32(v);
1692 ind = saved_ind;
1695 #endif /* not PE */
1697 /* generate a jump to a label */
1698 int gjmp(int t)
1700 return gjmp2(0xe9, t);
1703 /* generate a jump to a fixed address */
1704 void gjmp_addr(int a)
1706 int r;
1707 r = a - ind - 2;
1708 if (r == (char)r) {
1709 g(0xeb);
1710 g(r);
1711 } else {
1712 oad(0xe9, a - ind - 5);
1716 ST_FUNC void gtst_addr(int inv, int a)
1718 int v = vtop->r & VT_VALMASK;
1719 if (v == VT_CMP) {
1720 inv ^= (vtop--)->c.i;
1721 a -= ind + 2;
1722 if (a == (char)a) {
1723 g(inv - 32);
1724 g(a);
1725 } else {
1726 g(0x0f);
1727 oad(inv - 16, a - 4);
1729 } else if ((v & ~1) == VT_JMP) {
1730 if ((v & 1) != inv) {
1731 gjmp_addr(a);
1732 gsym(vtop->c.i);
1733 } else {
1734 gsym(vtop->c.i);
1735 o(0x05eb);
1736 gjmp_addr(a);
1738 vtop--;
1742 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1743 ST_FUNC int gtst(int inv, int t)
1745 int v = vtop->r & VT_VALMASK;
1747 if (nocode_wanted) {
1749 } else if (v == VT_CMP) {
1750 /* fast case : can jump directly since flags are set */
1751 if (vtop->c.i & 0x100)
1753 /* This was a float compare. If the parity flag is set
1754 the result was unordered. For anything except != this
1755 means false and we don't jump (anding both conditions).
1756 For != this means true (oring both).
1757 Take care about inverting the test. We need to jump
1758 to our target if the result was unordered and test wasn't NE,
1759 otherwise if unordered we don't want to jump. */
1760 vtop->c.i &= ~0x100;
1761 if (inv == (vtop->c.i == TOK_NE))
1762 o(0x067a); /* jp +6 */
1763 else
1765 g(0x0f);
1766 t = gjmp2(0x8a, t); /* jp t */
1769 g(0x0f);
1770 t = gjmp2((vtop->c.i - 16) ^ inv, t);
1771 } else if (v == VT_JMP || v == VT_JMPI) {
1772 /* && or || optimization */
1773 if ((v & 1) == inv) {
1774 /* insert vtop->c jump list in t */
1775 uint32_t n1, n = vtop->c.i;
1776 if (n) {
1777 while ((n1 = read32le(cur_text_section->data + n)))
1778 n = n1;
1779 write32le(cur_text_section->data + n, t);
1780 t = vtop->c.i;
1782 } else {
1783 t = gjmp(t);
1784 gsym(vtop->c.i);
1787 vtop--;
1788 return t;
1791 /* generate an integer binary operation */
1792 void gen_opi(int op)
1794 int r, fr, opc, c;
1795 int ll, uu, cc;
1797 ll = is64_type(vtop[-1].type.t);
1798 uu = (vtop[-1].type.t & VT_UNSIGNED) != 0;
1799 cc = (vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST;
1801 switch(op) {
1802 case '+':
1803 case TOK_ADDC1: /* add with carry generation */
1804 opc = 0;
1805 gen_op8:
1806 if (cc && (!ll || (int)vtop->c.i == vtop->c.i)) {
1807 /* constant case */
1808 vswap();
1809 r = gv(RC_INT);
1810 vswap();
1811 c = vtop->c.i;
1812 if (c == (char)c) {
1813 /* XXX: generate inc and dec for smaller code ? */
1814 orex(ll, r, 0, 0x83);
1815 o(0xc0 | (opc << 3) | REG_VALUE(r));
1816 g(c);
1817 } else {
1818 orex(ll, r, 0, 0x81);
1819 oad(0xc0 | (opc << 3) | REG_VALUE(r), c);
1821 } else {
1822 gv2(RC_INT, RC_INT);
1823 r = vtop[-1].r;
1824 fr = vtop[0].r;
1825 orex(ll, r, fr, (opc << 3) | 0x01);
1826 o(0xc0 + REG_VALUE(r) + REG_VALUE(fr) * 8);
1828 vtop--;
1829 if (op >= TOK_ULT && op <= TOK_GT) {
1830 vtop->r = VT_CMP;
1831 vtop->c.i = op;
1833 break;
1834 case '-':
1835 case TOK_SUBC1: /* sub with carry generation */
1836 opc = 5;
1837 goto gen_op8;
1838 case TOK_ADDC2: /* add with carry use */
1839 opc = 2;
1840 goto gen_op8;
1841 case TOK_SUBC2: /* sub with carry use */
1842 opc = 3;
1843 goto gen_op8;
1844 case '&':
1845 opc = 4;
1846 goto gen_op8;
1847 case '^':
1848 opc = 6;
1849 goto gen_op8;
1850 case '|':
1851 opc = 1;
1852 goto gen_op8;
1853 case '*':
1854 gv2(RC_INT, RC_INT);
1855 r = vtop[-1].r;
1856 fr = vtop[0].r;
1857 orex(ll, fr, r, 0xaf0f); /* imul fr, r */
1858 o(0xc0 + REG_VALUE(fr) + REG_VALUE(r) * 8);
1859 vtop--;
1860 break;
1861 case TOK_SHL:
1862 opc = 4;
1863 goto gen_shift;
1864 case TOK_SHR:
1865 opc = 5;
1866 goto gen_shift;
1867 case TOK_SAR:
1868 opc = 7;
1869 gen_shift:
1870 opc = 0xc0 | (opc << 3);
1871 if (cc) {
1872 /* constant case */
1873 vswap();
1874 r = gv(RC_INT);
1875 vswap();
1876 orex(ll, r, 0, 0xc1); /* shl/shr/sar $xxx, r */
1877 o(opc | REG_VALUE(r));
1878 g(vtop->c.i & (ll ? 63 : 31));
1879 } else {
1880 /* we generate the shift in ecx */
1881 gv2(RC_INT, RC_RCX);
1882 r = vtop[-1].r;
1883 orex(ll, r, 0, 0xd3); /* shl/shr/sar %cl, r */
1884 o(opc | REG_VALUE(r));
1886 vtop--;
1887 break;
1888 case TOK_UDIV:
1889 case TOK_UMOD:
1890 uu = 1;
1891 goto divmod;
1892 case '/':
1893 case '%':
1894 case TOK_PDIV:
1895 uu = 0;
1896 divmod:
1897 /* first operand must be in eax */
1898 /* XXX: need better constraint for second operand */
1899 gv2(RC_RAX, RC_RCX);
1900 r = vtop[-1].r;
1901 fr = vtop[0].r;
1902 vtop--;
1903 save_reg(TREG_RDX);
1904 orex(ll, 0, 0, uu ? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1905 orex(ll, fr, 0, 0xf7); /* div fr, %eax */
1906 o((uu ? 0xf0 : 0xf8) + REG_VALUE(fr));
1907 if (op == '%' || op == TOK_UMOD)
1908 r = TREG_RDX;
1909 else
1910 r = TREG_RAX;
1911 vtop->r = r;
1912 break;
1913 default:
1914 opc = 7;
1915 goto gen_op8;
1919 void gen_opl(int op)
1921 gen_opi(op);
1924 /* generate a floating point operation 'v = t1 op t2' instruction. The
1925 two operands are guaranteed to have the same floating point type */
1926 /* XXX: need to use ST1 too */
1927 void gen_opf(int op)
1929 int a, ft, fc, swapped, r;
1930 int float_type =
1931 (vtop->type.t & VT_BTYPE) == VT_LDOUBLE ? RC_ST0 : RC_FLOAT;
1933 /* convert constants to memory references */
1934 if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
1935 vswap();
1936 gv(float_type);
1937 vswap();
1939 if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
1940 gv(float_type);
1942 /* must put at least one value in the floating point register */
1943 if ((vtop[-1].r & VT_LVAL) &&
1944 (vtop[0].r & VT_LVAL)) {
1945 vswap();
1946 gv(float_type);
1947 vswap();
1949 swapped = 0;
1950 /* swap the stack if needed so that t1 is the register and t2 is
1951 the memory reference */
1952 if (vtop[-1].r & VT_LVAL) {
1953 vswap();
1954 swapped = 1;
1956 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1957 if (op >= TOK_ULT && op <= TOK_GT) {
1958 /* load on stack second operand */
1959 load(TREG_ST0, vtop);
1960 save_reg(TREG_RAX); /* eax is used by FP comparison code */
1961 if (op == TOK_GE || op == TOK_GT)
1962 swapped = !swapped;
1963 else if (op == TOK_EQ || op == TOK_NE)
1964 swapped = 0;
1965 if (swapped)
1966 o(0xc9d9); /* fxch %st(1) */
1967 if (op == TOK_EQ || op == TOK_NE)
1968 o(0xe9da); /* fucompp */
1969 else
1970 o(0xd9de); /* fcompp */
1971 o(0xe0df); /* fnstsw %ax */
1972 if (op == TOK_EQ) {
1973 o(0x45e480); /* and $0x45, %ah */
1974 o(0x40fC80); /* cmp $0x40, %ah */
1975 } else if (op == TOK_NE) {
1976 o(0x45e480); /* and $0x45, %ah */
1977 o(0x40f480); /* xor $0x40, %ah */
1978 op = TOK_NE;
1979 } else if (op == TOK_GE || op == TOK_LE) {
1980 o(0x05c4f6); /* test $0x05, %ah */
1981 op = TOK_EQ;
1982 } else {
1983 o(0x45c4f6); /* test $0x45, %ah */
1984 op = TOK_EQ;
1986 vtop--;
1987 vtop->r = VT_CMP;
1988 vtop->c.i = op;
1989 } else {
1990 /* no memory reference possible for long double operations */
1991 load(TREG_ST0, vtop);
1992 swapped = !swapped;
1994 switch(op) {
1995 default:
1996 case '+':
1997 a = 0;
1998 break;
1999 case '-':
2000 a = 4;
2001 if (swapped)
2002 a++;
2003 break;
2004 case '*':
2005 a = 1;
2006 break;
2007 case '/':
2008 a = 6;
2009 if (swapped)
2010 a++;
2011 break;
2013 ft = vtop->type.t;
2014 fc = vtop->c.i;
2015 o(0xde); /* fxxxp %st, %st(1) */
2016 o(0xc1 + (a << 3));
2017 vtop--;
2019 } else {
2020 if (op >= TOK_ULT && op <= TOK_GT) {
2021 /* if saved lvalue, then we must reload it */
2022 r = vtop->r;
2023 fc = vtop->c.i;
2024 if ((r & VT_VALMASK) == VT_LLOCAL) {
2025 SValue v1;
2026 r = get_reg(RC_INT);
2027 v1.type.t = VT_PTR;
2028 v1.r = VT_LOCAL | VT_LVAL;
2029 v1.c.i = fc;
2030 load(r, &v1);
2031 fc = 0;
2034 if (op == TOK_EQ || op == TOK_NE) {
2035 swapped = 0;
2036 } else {
2037 if (op == TOK_LE || op == TOK_LT)
2038 swapped = !swapped;
2039 if (op == TOK_LE || op == TOK_GE) {
2040 op = 0x93; /* setae */
2041 } else {
2042 op = 0x97; /* seta */
2046 if (swapped) {
2047 gv(RC_FLOAT);
2048 vswap();
2050 assert(!(vtop[-1].r & VT_LVAL));
2052 if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
2053 o(0x66);
2054 if (op == TOK_EQ || op == TOK_NE)
2055 o(0x2e0f); /* ucomisd */
2056 else
2057 o(0x2f0f); /* comisd */
2059 if (vtop->r & VT_LVAL) {
2060 gen_modrm(vtop[-1].r, r, vtop->sym, fc);
2061 } else {
2062 o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
2065 vtop--;
2066 vtop->r = VT_CMP;
2067 vtop->c.i = op | 0x100;
2068 } else {
2069 assert((vtop->type.t & VT_BTYPE) != VT_LDOUBLE);
2070 switch(op) {
2071 default:
2072 case '+':
2073 a = 0;
2074 break;
2075 case '-':
2076 a = 4;
2077 break;
2078 case '*':
2079 a = 1;
2080 break;
2081 case '/':
2082 a = 6;
2083 break;
2085 ft = vtop->type.t;
2086 fc = vtop->c.i;
2087 assert((ft & VT_BTYPE) != VT_LDOUBLE);
2089 r = vtop->r;
2090 /* if saved lvalue, then we must reload it */
2091 if ((vtop->r & VT_VALMASK) == VT_LLOCAL) {
2092 SValue v1;
2093 r = get_reg(RC_INT);
2094 v1.type.t = VT_PTR;
2095 v1.r = VT_LOCAL | VT_LVAL;
2096 v1.c.i = fc;
2097 load(r, &v1);
2098 fc = 0;
2101 assert(!(vtop[-1].r & VT_LVAL));
2102 if (swapped) {
2103 assert(vtop->r & VT_LVAL);
2104 gv(RC_FLOAT);
2105 vswap();
2108 if ((ft & VT_BTYPE) == VT_DOUBLE) {
2109 o(0xf2);
2110 } else {
2111 o(0xf3);
2113 o(0x0f);
2114 o(0x58 + a);
2116 if (vtop->r & VT_LVAL) {
2117 gen_modrm(vtop[-1].r, r, vtop->sym, fc);
2118 } else {
2119 o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
2122 vtop--;
2127 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
2128 and 'long long' cases. */
2129 void gen_cvt_itof(int t)
2131 if ((t & VT_BTYPE) == VT_LDOUBLE) {
2132 save_reg(TREG_ST0);
2133 gv(RC_INT);
2134 if ((vtop->type.t & VT_BTYPE) == VT_LLONG) {
2135 /* signed long long to float/double/long double (unsigned case
2136 is handled generically) */
2137 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2138 o(0x242cdf); /* fildll (%rsp) */
2139 o(0x08c48348); /* add $8, %rsp */
2140 } else if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
2141 (VT_INT | VT_UNSIGNED)) {
2142 /* unsigned int to float/double/long double */
2143 o(0x6a); /* push $0 */
2144 g(0x00);
2145 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2146 o(0x242cdf); /* fildll (%rsp) */
2147 o(0x10c48348); /* add $16, %rsp */
2148 } else {
2149 /* int to float/double/long double */
2150 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2151 o(0x2404db); /* fildl (%rsp) */
2152 o(0x08c48348); /* add $8, %rsp */
2154 vtop->r = TREG_ST0;
2155 } else {
2156 int r = get_reg(RC_FLOAT);
2157 gv(RC_INT);
2158 o(0xf2 + ((t & VT_BTYPE) == VT_FLOAT?1:0));
2159 if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
2160 (VT_INT | VT_UNSIGNED) ||
2161 (vtop->type.t & VT_BTYPE) == VT_LLONG) {
2162 o(0x48); /* REX */
2164 o(0x2a0f);
2165 o(0xc0 + (vtop->r & VT_VALMASK) + REG_VALUE(r)*8); /* cvtsi2sd */
2166 vtop->r = r;
2170 /* convert from one floating point type to another */
2171 void gen_cvt_ftof(int t)
2173 int ft, bt, tbt;
2175 ft = vtop->type.t;
2176 bt = ft & VT_BTYPE;
2177 tbt = t & VT_BTYPE;
2179 if (bt == VT_FLOAT) {
2180 gv(RC_FLOAT);
2181 if (tbt == VT_DOUBLE) {
2182 o(0x140f); /* unpcklps */
2183 o(0xc0 + REG_VALUE(vtop->r)*9);
2184 o(0x5a0f); /* cvtps2pd */
2185 o(0xc0 + REG_VALUE(vtop->r)*9);
2186 } else if (tbt == VT_LDOUBLE) {
2187 save_reg(RC_ST0);
2188 /* movss %xmm0,-0x10(%rsp) */
2189 o(0x110ff3);
2190 o(0x44 + REG_VALUE(vtop->r)*8);
2191 o(0xf024);
2192 o(0xf02444d9); /* flds -0x10(%rsp) */
2193 vtop->r = TREG_ST0;
2195 } else if (bt == VT_DOUBLE) {
2196 gv(RC_FLOAT);
2197 if (tbt == VT_FLOAT) {
2198 o(0x140f66); /* unpcklpd */
2199 o(0xc0 + REG_VALUE(vtop->r)*9);
2200 o(0x5a0f66); /* cvtpd2ps */
2201 o(0xc0 + REG_VALUE(vtop->r)*9);
2202 } else if (tbt == VT_LDOUBLE) {
2203 save_reg(RC_ST0);
2204 /* movsd %xmm0,-0x10(%rsp) */
2205 o(0x110ff2);
2206 o(0x44 + REG_VALUE(vtop->r)*8);
2207 o(0xf024);
2208 o(0xf02444dd); /* fldl -0x10(%rsp) */
2209 vtop->r = TREG_ST0;
2211 } else {
2212 int r;
2213 gv(RC_ST0);
2214 r = get_reg(RC_FLOAT);
2215 if (tbt == VT_DOUBLE) {
2216 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2217 /* movsd -0x10(%rsp),%xmm0 */
2218 o(0x100ff2);
2219 o(0x44 + REG_VALUE(r)*8);
2220 o(0xf024);
2221 vtop->r = r;
2222 } else if (tbt == VT_FLOAT) {
2223 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2224 /* movss -0x10(%rsp),%xmm0 */
2225 o(0x100ff3);
2226 o(0x44 + REG_VALUE(r)*8);
2227 o(0xf024);
2228 vtop->r = r;
2233 /* convert fp to int 't' type */
2234 void gen_cvt_ftoi(int t)
2236 int ft, bt, size, r;
2237 ft = vtop->type.t;
2238 bt = ft & VT_BTYPE;
2239 if (bt == VT_LDOUBLE) {
2240 gen_cvt_ftof(VT_DOUBLE);
2241 bt = VT_DOUBLE;
2244 gv(RC_FLOAT);
2245 if (t != VT_INT)
2246 size = 8;
2247 else
2248 size = 4;
2250 r = get_reg(RC_INT);
2251 if (bt == VT_FLOAT) {
2252 o(0xf3);
2253 } else if (bt == VT_DOUBLE) {
2254 o(0xf2);
2255 } else {
2256 assert(0);
2258 orex(size == 8, r, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2259 o(0xc0 + REG_VALUE(vtop->r) + REG_VALUE(r)*8);
2260 vtop->r = r;
2263 /* computed goto support */
2264 void ggoto(void)
2266 gcall_or_jmp(1);
2267 vtop--;
2270 /* Save the stack pointer onto the stack and return the location of its address */
2271 ST_FUNC void gen_vla_sp_save(int addr) {
2272 /* mov %rsp,addr(%rbp)*/
2273 gen_modrm64(0x89, TREG_RSP, VT_LOCAL, NULL, addr);
2276 /* Restore the SP from a location on the stack */
2277 ST_FUNC void gen_vla_sp_restore(int addr) {
2278 gen_modrm64(0x8b, TREG_RSP, VT_LOCAL, NULL, addr);
2281 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2282 ST_FUNC void gen_vla_alloc(CType *type, int align) {
2283 #ifdef TCC_TARGET_PE
2284 /* alloca does more than just adjust %rsp on Windows */
2285 vpush_global_sym(&func_old_type, TOK_alloca);
2286 vswap(); /* Move alloca ref past allocation size */
2287 gfunc_call(1);
2288 #else
2289 int r;
2290 r = gv(RC_INT); /* allocation size */
2291 /* sub r,%rsp */
2292 o(0x2b48);
2293 o(0xe0 | REG_VALUE(r));
2294 /* We align to 16 bytes rather than align */
2295 /* and ~15, %rsp */
2296 o(0xf0e48348);
2297 vpop();
2298 #endif
2302 /* end of x86-64 code generator */
2303 /*************************************************************/
2304 #endif /* ! TARGET_DEFS_ONLY */
2305 /******************************************************/