SECTION_ALIGNMENT -> RUN_SECTION_ALIGNMENT, and tweaks
[tinycc.git] / x86_64-gen.c
blobc94eb0516da0877c5c6473b1f534eec797f55ecf
1 /*
2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
26 #define NB_REGS 25
27 #define NB_ASM_REGS 16
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
34 #define RC_RAX 0x0004
35 #define RC_RCX 0x0008
36 #define RC_RDX 0x0010
37 #define RC_ST0 0x0080 /* only for long double */
38 #define RC_R8 0x0100
39 #define RC_R9 0x0200
40 #define RC_R10 0x0400
41 #define RC_R11 0x0800
42 #define RC_XMM0 0x1000
43 #define RC_XMM1 0x2000
44 #define RC_XMM2 0x4000
45 #define RC_XMM3 0x8000
46 #define RC_XMM4 0x10000
47 #define RC_XMM5 0x20000
48 #define RC_XMM6 0x40000
49 #define RC_XMM7 0x80000
50 #define RC_IRET RC_RAX /* function return: integer register */
51 #define RC_LRET RC_RDX /* function return: second integer register */
52 #define RC_FRET RC_XMM0 /* function return: float register */
53 #define RC_QRET RC_XMM1 /* function return: second float register */
55 /* pretty names for the registers */
56 enum {
57 TREG_RAX = 0,
58 TREG_RCX = 1,
59 TREG_RDX = 2,
60 TREG_RSP = 4,
61 TREG_RSI = 6,
62 TREG_RDI = 7,
64 TREG_R8 = 8,
65 TREG_R9 = 9,
66 TREG_R10 = 10,
67 TREG_R11 = 11,
69 TREG_XMM0 = 16,
70 TREG_XMM1 = 17,
71 TREG_XMM2 = 18,
72 TREG_XMM3 = 19,
73 TREG_XMM4 = 20,
74 TREG_XMM5 = 21,
75 TREG_XMM6 = 22,
76 TREG_XMM7 = 23,
78 TREG_ST0 = 24,
80 TREG_MEM = 0x20
83 #define REX_BASE(reg) (((reg) >> 3) & 1)
84 #define REG_VALUE(reg) ((reg) & 7)
86 /* return registers for function */
87 #define REG_IRET TREG_RAX /* single word int return register */
88 #define REG_LRET TREG_RDX /* second word return register (for long long) */
89 #define REG_FRET TREG_XMM0 /* float return register */
90 #define REG_QRET TREG_XMM1 /* second float return register */
92 /* defined if function parameters must be evaluated in reverse order */
93 #define INVERT_FUNC_PARAMS
95 /* pointer size, in bytes */
96 #define PTR_SIZE 8
98 /* long double size and alignment, in bytes */
99 #define LDOUBLE_SIZE 16
100 #define LDOUBLE_ALIGN 16
101 /* maximum alignment (for aligned attribute support) */
102 #define MAX_ALIGN 16
104 /******************************************************/
105 #else /* ! TARGET_DEFS_ONLY */
106 /******************************************************/
107 #include "tcc.h"
108 #include <assert.h>
110 ST_DATA const int reg_classes[NB_REGS] = {
111 /* eax */ RC_INT | RC_RAX,
112 /* ecx */ RC_INT | RC_RCX,
113 /* edx */ RC_INT | RC_RDX,
119 RC_R8,
120 RC_R9,
121 RC_R10,
122 RC_R11,
127 /* xmm0 */ RC_FLOAT | RC_XMM0,
128 /* xmm1 */ RC_FLOAT | RC_XMM1,
129 /* xmm2 */ RC_FLOAT | RC_XMM2,
130 /* xmm3 */ RC_FLOAT | RC_XMM3,
131 /* xmm4 */ RC_FLOAT | RC_XMM4,
132 /* xmm5 */ RC_FLOAT | RC_XMM5,
133 /* xmm6 an xmm7 are included so gv() can be used on them,
134 but they are not tagged with RC_FLOAT because they are
135 callee saved on Windows */
136 RC_XMM6,
137 RC_XMM7,
138 /* st0 */ RC_ST0
141 static unsigned long func_sub_sp_offset;
142 static int func_ret_sub;
144 /* XXX: make it faster ? */
145 ST_FUNC void g(int c)
147 int ind1;
148 if (nocode_wanted)
149 return;
150 ind1 = ind + 1;
151 if (ind1 > cur_text_section->data_allocated)
152 section_realloc(cur_text_section, ind1);
153 cur_text_section->data[ind] = c;
154 ind = ind1;
157 ST_FUNC void o(unsigned int c)
159 while (c) {
160 g(c);
161 c = c >> 8;
165 ST_FUNC void gen_le16(int v)
167 g(v);
168 g(v >> 8);
171 ST_FUNC void gen_le32(int c)
173 g(c);
174 g(c >> 8);
175 g(c >> 16);
176 g(c >> 24);
179 ST_FUNC void gen_le64(int64_t c)
181 g(c);
182 g(c >> 8);
183 g(c >> 16);
184 g(c >> 24);
185 g(c >> 32);
186 g(c >> 40);
187 g(c >> 48);
188 g(c >> 56);
191 static void orex(int ll, int r, int r2, int b)
193 if ((r & VT_VALMASK) >= VT_CONST)
194 r = 0;
195 if ((r2 & VT_VALMASK) >= VT_CONST)
196 r2 = 0;
197 if (ll || REX_BASE(r) || REX_BASE(r2))
198 o(0x40 | REX_BASE(r) | (REX_BASE(r2) << 2) | (ll << 3));
199 o(b);
202 /* output a symbol and patch all calls to it */
203 ST_FUNC void gsym_addr(int t, int a)
205 while (t) {
206 unsigned char *ptr = cur_text_section->data + t;
207 uint32_t n = read32le(ptr); /* next value */
208 write32le(ptr, a - t - 4);
209 t = n;
213 void gsym(int t)
215 gsym_addr(t, ind);
219 static int is64_type(int t)
221 return ((t & VT_BTYPE) == VT_PTR ||
222 (t & VT_BTYPE) == VT_FUNC ||
223 (t & VT_BTYPE) == VT_LLONG);
226 /* instruction + 4 bytes data. Return the address of the data */
227 ST_FUNC int oad(int c, int s)
229 int t;
230 if (nocode_wanted)
231 return s;
232 o(c);
233 t = ind;
234 gen_le32(s);
235 return t;
238 /* generate jmp to a label */
239 #define gjmp2(instr,lbl) oad(instr,lbl)
241 ST_FUNC void gen_addr32(int r, Sym *sym, long c)
243 if (r & VT_SYM)
244 greloca(cur_text_section, sym, ind, R_X86_64_32S, c), c=0;
245 gen_le32(c);
248 /* output constant with relocation if 'r & VT_SYM' is true */
249 ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c)
251 if (r & VT_SYM)
252 greloca(cur_text_section, sym, ind, R_X86_64_64, c), c=0;
253 gen_le64(c);
256 /* output constant with relocation if 'r & VT_SYM' is true */
257 ST_FUNC void gen_addrpc32(int r, Sym *sym, long c)
259 if (r & VT_SYM)
260 greloca(cur_text_section, sym, ind, R_X86_64_PC32, c-4), c=4;
261 gen_le32(c-4);
264 /* output got address with relocation */
265 static void gen_gotpcrel(int r, Sym *sym, int c)
267 #ifndef TCC_TARGET_PE
268 greloca(cur_text_section, sym, ind, R_X86_64_GOTPCREL, -4);
269 #else
270 tcc_error("internal error: no GOT on PE: %s %x %x | %02x %02x %02x\n",
271 get_tok_str(sym->v, NULL), c, r,
272 cur_text_section->data[ind-3],
273 cur_text_section->data[ind-2],
274 cur_text_section->data[ind-1]
276 greloc(cur_text_section, sym, ind, R_X86_64_PC32);
277 #endif
278 gen_le32(0);
279 if (c) {
280 /* we use add c, %xxx for displacement */
281 orex(1, r, 0, 0x81);
282 o(0xc0 + REG_VALUE(r));
283 gen_le32(c);
287 static void gen_modrm_impl(int op_reg, int r, Sym *sym, int c, int is_got)
289 op_reg = REG_VALUE(op_reg) << 3;
290 if ((r & VT_VALMASK) == VT_CONST) {
291 /* constant memory reference */
292 o(0x05 | op_reg);
293 if (is_got) {
294 gen_gotpcrel(r, sym, c);
295 } else {
296 gen_addrpc32(r, sym, c);
298 } else if ((r & VT_VALMASK) == VT_LOCAL) {
299 /* currently, we use only ebp as base */
300 if (c == (char)c) {
301 /* short reference */
302 o(0x45 | op_reg);
303 g(c);
304 } else {
305 oad(0x85 | op_reg, c);
307 } else if ((r & VT_VALMASK) >= TREG_MEM) {
308 if (c) {
309 g(0x80 | op_reg | REG_VALUE(r));
310 gen_le32(c);
311 } else {
312 g(0x00 | op_reg | REG_VALUE(r));
314 } else {
315 g(0x00 | op_reg | REG_VALUE(r));
319 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
320 opcode bits */
321 static void gen_modrm(int op_reg, int r, Sym *sym, int c)
323 gen_modrm_impl(op_reg, r, sym, c, 0);
326 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
327 opcode bits */
328 static void gen_modrm64(int opcode, int op_reg, int r, Sym *sym, int c)
330 int is_got;
331 is_got = (op_reg & TREG_MEM) && !(sym->type.t & VT_STATIC);
332 orex(1, r, op_reg, opcode);
333 gen_modrm_impl(op_reg, r, sym, c, is_got);
337 /* load 'r' from value 'sv' */
338 void load(int r, SValue *sv)
340 int v, t, ft, fc, fr;
341 SValue v1;
343 #ifdef TCC_TARGET_PE
344 SValue v2;
345 sv = pe_getimport(sv, &v2);
346 #endif
348 fr = sv->r;
349 ft = sv->type.t & ~VT_DEFSIGN;
350 fc = sv->c.i;
351 if (fc != sv->c.i && (fr & VT_SYM))
352 tcc_error("64 bit addend in load");
354 ft &= ~(VT_VOLATILE | VT_CONSTANT);
356 #ifndef TCC_TARGET_PE
357 /* we use indirect access via got */
358 if ((fr & VT_VALMASK) == VT_CONST && (fr & VT_SYM) &&
359 (fr & VT_LVAL) && !(sv->sym->type.t & VT_STATIC)) {
360 /* use the result register as a temporal register */
361 int tr = r | TREG_MEM;
362 if (is_float(ft)) {
363 /* we cannot use float registers as a temporal register */
364 tr = get_reg(RC_INT) | TREG_MEM;
366 gen_modrm64(0x8b, tr, fr, sv->sym, 0);
368 /* load from the temporal register */
369 fr = tr | VT_LVAL;
371 #endif
373 v = fr & VT_VALMASK;
374 if (fr & VT_LVAL) {
375 int b, ll;
376 if (v == VT_LLOCAL) {
377 v1.type.t = VT_PTR;
378 v1.r = VT_LOCAL | VT_LVAL;
379 v1.c.i = fc;
380 fr = r;
381 if (!(reg_classes[fr] & (RC_INT|RC_R11)))
382 fr = get_reg(RC_INT);
383 load(fr, &v1);
385 ll = 0;
386 /* Like GCC we can load from small enough properly sized
387 structs and unions as well.
388 XXX maybe move to generic operand handling, but should
389 occur only with asm, so tccasm.c might also be a better place */
390 if ((ft & VT_BTYPE) == VT_STRUCT) {
391 int align;
392 switch (type_size(&sv->type, &align)) {
393 case 1: ft = VT_BYTE; break;
394 case 2: ft = VT_SHORT; break;
395 case 4: ft = VT_INT; break;
396 case 8: ft = VT_LLONG; break;
397 default:
398 tcc_error("invalid aggregate type for register load");
399 break;
402 if ((ft & VT_BTYPE) == VT_FLOAT) {
403 b = 0x6e0f66;
404 r = REG_VALUE(r); /* movd */
405 } else if ((ft & VT_BTYPE) == VT_DOUBLE) {
406 b = 0x7e0ff3; /* movq */
407 r = REG_VALUE(r);
408 } else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
409 b = 0xdb, r = 5; /* fldt */
410 } else if ((ft & VT_TYPE) == VT_BYTE || (ft & VT_TYPE) == VT_BOOL) {
411 b = 0xbe0f; /* movsbl */
412 } else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED)) {
413 b = 0xb60f; /* movzbl */
414 } else if ((ft & VT_TYPE) == VT_SHORT) {
415 b = 0xbf0f; /* movswl */
416 } else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED)) {
417 b = 0xb70f; /* movzwl */
418 } else {
419 assert(((ft & VT_BTYPE) == VT_INT) || ((ft & VT_BTYPE) == VT_LLONG)
420 || ((ft & VT_BTYPE) == VT_PTR) || ((ft & VT_BTYPE) == VT_ENUM)
421 || ((ft & VT_BTYPE) == VT_FUNC));
422 ll = is64_type(ft);
423 b = 0x8b;
425 if (ll) {
426 gen_modrm64(b, r, fr, sv->sym, fc);
427 } else {
428 orex(ll, fr, r, b);
429 gen_modrm(r, fr, sv->sym, fc);
431 } else {
432 if (v == VT_CONST) {
433 if (fr & VT_SYM) {
434 #ifdef TCC_TARGET_PE
435 orex(1,0,r,0x8d);
436 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
437 gen_addrpc32(fr, sv->sym, fc);
438 #else
439 if (sv->sym->type.t & VT_STATIC) {
440 orex(1,0,r,0x8d);
441 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
442 gen_addrpc32(fr, sv->sym, fc);
443 } else {
444 orex(1,0,r,0x8b);
445 o(0x05 + REG_VALUE(r) * 8); /* mov xx(%rip), r */
446 gen_gotpcrel(r, sv->sym, fc);
448 #endif
449 } else if (is64_type(ft)) {
450 orex(1,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
451 gen_le64(sv->c.i);
452 } else {
453 orex(0,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
454 gen_le32(fc);
456 } else if (v == VT_LOCAL) {
457 orex(1,0,r,0x8d); /* lea xxx(%ebp), r */
458 gen_modrm(r, VT_LOCAL, sv->sym, fc);
459 } else if (v == VT_CMP) {
460 orex(0,r,0,0);
461 if ((fc & ~0x100) != TOK_NE)
462 oad(0xb8 + REG_VALUE(r), 0); /* mov $0, r */
463 else
464 oad(0xb8 + REG_VALUE(r), 1); /* mov $1, r */
465 if (fc & 0x100)
467 /* This was a float compare. If the parity bit is
468 set the result was unordered, meaning false for everything
469 except TOK_NE, and true for TOK_NE. */
470 fc &= ~0x100;
471 o(0x037a + (REX_BASE(r) << 8));
473 orex(0,r,0, 0x0f); /* setxx %br */
474 o(fc);
475 o(0xc0 + REG_VALUE(r));
476 } else if (v == VT_JMP || v == VT_JMPI) {
477 t = v & 1;
478 orex(0,r,0,0);
479 oad(0xb8 + REG_VALUE(r), t); /* mov $1, r */
480 o(0x05eb + (REX_BASE(r) << 8)); /* jmp after */
481 gsym(fc);
482 orex(0,r,0,0);
483 oad(0xb8 + REG_VALUE(r), t ^ 1); /* mov $0, r */
484 } else if (v != r) {
485 if ((r >= TREG_XMM0) && (r <= TREG_XMM7)) {
486 if (v == TREG_ST0) {
487 /* gen_cvt_ftof(VT_DOUBLE); */
488 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
489 /* movsd -0x10(%rsp),%xmmN */
490 o(0x100ff2);
491 o(0x44 + REG_VALUE(r)*8); /* %xmmN */
492 o(0xf024);
493 } else {
494 assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
495 if ((ft & VT_BTYPE) == VT_FLOAT) {
496 o(0x100ff3);
497 } else {
498 assert((ft & VT_BTYPE) == VT_DOUBLE);
499 o(0x100ff2);
501 o(0xc0 + REG_VALUE(v) + REG_VALUE(r)*8);
503 } else if (r == TREG_ST0) {
504 assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
505 /* gen_cvt_ftof(VT_LDOUBLE); */
506 /* movsd %xmmN,-0x10(%rsp) */
507 o(0x110ff2);
508 o(0x44 + REG_VALUE(r)*8); /* %xmmN */
509 o(0xf024);
510 o(0xf02444dd); /* fldl -0x10(%rsp) */
511 } else {
512 orex(1,r,v, 0x89);
513 o(0xc0 + REG_VALUE(r) + REG_VALUE(v) * 8); /* mov v, r */
519 /* store register 'r' in lvalue 'v' */
520 void store(int r, SValue *v)
522 int fr, bt, ft, fc;
523 int op64 = 0;
524 /* store the REX prefix in this variable when PIC is enabled */
525 int pic = 0;
527 #ifdef TCC_TARGET_PE
528 SValue v2;
529 v = pe_getimport(v, &v2);
530 #endif
532 fr = v->r & VT_VALMASK;
533 ft = v->type.t;
534 fc = v->c.i;
535 if (fc != v->c.i && (fr & VT_SYM))
536 tcc_error("64 bit addend in store");
537 ft &= ~(VT_VOLATILE | VT_CONSTANT);
538 bt = ft & VT_BTYPE;
540 #ifndef TCC_TARGET_PE
541 /* we need to access the variable via got */
542 if (fr == VT_CONST && (v->r & VT_SYM)) {
543 /* mov xx(%rip), %r11 */
544 o(0x1d8b4c);
545 gen_gotpcrel(TREG_R11, v->sym, v->c.i);
546 pic = is64_type(bt) ? 0x49 : 0x41;
548 #endif
550 /* XXX: incorrect if float reg to reg */
551 if (bt == VT_FLOAT) {
552 o(0x66);
553 o(pic);
554 o(0x7e0f); /* movd */
555 r = REG_VALUE(r);
556 } else if (bt == VT_DOUBLE) {
557 o(0x66);
558 o(pic);
559 o(0xd60f); /* movq */
560 r = REG_VALUE(r);
561 } else if (bt == VT_LDOUBLE) {
562 o(0xc0d9); /* fld %st(0) */
563 o(pic);
564 o(0xdb); /* fstpt */
565 r = 7;
566 } else {
567 if (bt == VT_SHORT)
568 o(0x66);
569 o(pic);
570 if (bt == VT_BYTE || bt == VT_BOOL)
571 orex(0, 0, r, 0x88);
572 else if (is64_type(bt))
573 op64 = 0x89;
574 else
575 orex(0, 0, r, 0x89);
577 if (pic) {
578 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
579 if (op64)
580 o(op64);
581 o(3 + (r << 3));
582 } else if (op64) {
583 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
584 gen_modrm64(op64, r, v->r, v->sym, fc);
585 } else if (fr != r) {
586 /* XXX: don't we really come here? */
587 abort();
588 o(0xc0 + fr + r * 8); /* mov r, fr */
590 } else {
591 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
592 gen_modrm(r, v->r, v->sym, fc);
593 } else if (fr != r) {
594 /* XXX: don't we really come here? */
595 abort();
596 o(0xc0 + fr + r * 8); /* mov r, fr */
601 /* 'is_jmp' is '1' if it is a jump */
602 static void gcall_or_jmp(int is_jmp)
604 int r;
605 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST &&
606 ((vtop->r & VT_SYM) || (vtop->c.i-4) == (int)(vtop->c.i-4))) {
607 /* constant case */
608 if (vtop->r & VT_SYM) {
609 /* relocation case */
610 #ifdef TCC_TARGET_PE
611 greloca(cur_text_section, vtop->sym, ind + 1, R_X86_64_PC32, (int)(vtop->c.i-4));
612 #else
613 greloca(cur_text_section, vtop->sym, ind + 1, R_X86_64_PLT32, (int)(vtop->c.i-4));
614 #endif
615 } else {
616 /* put an empty PC32 relocation */
617 put_elf_reloca(symtab_section, cur_text_section,
618 ind + 1, R_X86_64_PC32, 0, (int)(vtop->c.i-4));
620 oad(0xe8 + is_jmp, 0); /* call/jmp im */
621 } else {
622 /* otherwise, indirect call */
623 r = TREG_R11;
624 load(r, vtop);
625 o(0x41); /* REX */
626 o(0xff); /* call/jmp *r */
627 o(0xd0 + REG_VALUE(r) + (is_jmp << 4));
631 #if defined(CONFIG_TCC_BCHECK)
632 #ifndef TCC_TARGET_PE
633 static addr_t func_bound_offset;
634 static unsigned long func_bound_ind;
635 #endif
637 static void gen_static_call(int v)
639 Sym *sym = external_global_sym(v, &func_old_type, 0);
640 oad(0xe8, 0);
641 greloca(cur_text_section, sym, ind-4, R_X86_64_PC32, -4);
644 /* generate a bounded pointer addition */
645 ST_FUNC void gen_bounded_ptr_add(void)
647 /* save all temporary registers */
648 save_regs(0);
650 /* prepare fast x86_64 function call */
651 gv(RC_RAX);
652 o(0xc68948); // mov %rax,%rsi ## second arg in %rsi, this must be size
653 vtop--;
655 gv(RC_RAX);
656 o(0xc78948); // mov %rax,%rdi ## first arg in %rdi, this must be ptr
657 vtop--;
659 /* do a fast function call */
660 gen_static_call(TOK___bound_ptr_add);
662 /* returned pointer is in rax */
663 vtop++;
664 vtop->r = TREG_RAX | VT_BOUNDED;
667 /* relocation offset of the bounding function call point */
668 vtop->c.i = (cur_text_section->reloc->data_offset - sizeof(ElfW(Rela)));
671 /* patch pointer addition in vtop so that pointer dereferencing is
672 also tested */
673 ST_FUNC void gen_bounded_ptr_deref(void)
675 addr_t func;
676 int size, align;
677 ElfW(Rela) *rel;
678 Sym *sym;
680 size = 0;
681 /* XXX: put that code in generic part of tcc */
682 if (!is_float(vtop->type.t)) {
683 if (vtop->r & VT_LVAL_BYTE)
684 size = 1;
685 else if (vtop->r & VT_LVAL_SHORT)
686 size = 2;
688 if (!size)
689 size = type_size(&vtop->type, &align);
690 switch(size) {
691 case 1: func = TOK___bound_ptr_indir1; break;
692 case 2: func = TOK___bound_ptr_indir2; break;
693 case 4: func = TOK___bound_ptr_indir4; break;
694 case 8: func = TOK___bound_ptr_indir8; break;
695 case 12: func = TOK___bound_ptr_indir12; break;
696 case 16: func = TOK___bound_ptr_indir16; break;
697 default:
698 tcc_error("unhandled size when dereferencing bounded pointer");
699 func = 0;
700 break;
703 sym = external_global_sym(func, &func_old_type, 0);
704 if (!sym->c)
705 put_extern_sym(sym, NULL, 0, 0);
707 /* patch relocation */
708 /* XXX: find a better solution ? */
710 rel = (ElfW(Rela) *)(cur_text_section->reloc->data + vtop->c.i);
711 rel->r_info = ELF64_R_INFO(sym->c, ELF64_R_TYPE(rel->r_info));
713 #endif
715 #ifdef TCC_TARGET_PE
717 #define REGN 4
718 static const uint8_t arg_regs[REGN] = {
719 TREG_RCX, TREG_RDX, TREG_R8, TREG_R9
722 /* Prepare arguments in R10 and R11 rather than RCX and RDX
723 because gv() will not ever use these */
724 static int arg_prepare_reg(int idx) {
725 if (idx == 0 || idx == 1)
726 /* idx=0: r10, idx=1: r11 */
727 return idx + 10;
728 else
729 return arg_regs[idx];
732 static int func_scratch;
734 /* Generate function call. The function address is pushed first, then
735 all the parameters in call order. This functions pops all the
736 parameters and the function address. */
738 void gen_offs_sp(int b, int r, int d)
740 orex(1,0,r & 0x100 ? 0 : r, b);
741 if (d == (char)d) {
742 o(0x2444 | (REG_VALUE(r) << 3));
743 g(d);
744 } else {
745 o(0x2484 | (REG_VALUE(r) << 3));
746 gen_le32(d);
750 /* Return the number of registers needed to return the struct, or 0 if
751 returning via struct pointer. */
752 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize)
754 int size, align;
755 *regsize = 8;
756 *ret_align = 1; // Never have to re-align return values for x86-64
757 size = type_size(vt, &align);
758 ret->ref = NULL;
759 if (size > 8) {
760 return 0;
761 } else if (size > 4) {
762 ret->t = VT_LLONG;
763 return 1;
764 } else if (size > 2) {
765 ret->t = VT_INT;
766 return 1;
767 } else if (size > 1) {
768 ret->t = VT_SHORT;
769 return 1;
770 } else {
771 ret->t = VT_BYTE;
772 return 1;
776 static int is_sse_float(int t) {
777 int bt;
778 bt = t & VT_BTYPE;
779 return bt == VT_DOUBLE || bt == VT_FLOAT;
782 int gfunc_arg_size(CType *type) {
783 int align;
784 if (type->t & (VT_ARRAY|VT_BITFIELD))
785 return 8;
786 return type_size(type, &align);
789 void gfunc_call(int nb_args)
791 int size, r, args_size, i, d, bt, struct_size;
792 int arg;
794 args_size = (nb_args < REGN ? REGN : nb_args) * PTR_SIZE;
795 arg = nb_args;
797 /* for struct arguments, we need to call memcpy and the function
798 call breaks register passing arguments we are preparing.
799 So, we process arguments which will be passed by stack first. */
800 struct_size = args_size;
801 for(i = 0; i < nb_args; i++) {
802 SValue *sv;
804 --arg;
805 sv = &vtop[-i];
806 bt = (sv->type.t & VT_BTYPE);
807 size = gfunc_arg_size(&sv->type);
809 if (size <= 8)
810 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
812 if (bt == VT_STRUCT) {
813 /* align to stack align size */
814 size = (size + 15) & ~15;
815 /* generate structure store */
816 r = get_reg(RC_INT);
817 gen_offs_sp(0x8d, r, struct_size);
818 struct_size += size;
820 /* generate memcpy call */
821 vset(&sv->type, r | VT_LVAL, 0);
822 vpushv(sv);
823 vstore();
824 --vtop;
825 } else if (bt == VT_LDOUBLE) {
826 gv(RC_ST0);
827 gen_offs_sp(0xdb, 0x107, struct_size);
828 struct_size += 16;
832 if (func_scratch < struct_size)
833 func_scratch = struct_size;
835 arg = nb_args;
836 struct_size = args_size;
838 for(i = 0; i < nb_args; i++) {
839 --arg;
840 bt = (vtop->type.t & VT_BTYPE);
842 size = gfunc_arg_size(&vtop->type);
843 if (size > 8) {
844 /* align to stack align size */
845 size = (size + 15) & ~15;
846 if (arg >= REGN) {
847 d = get_reg(RC_INT);
848 gen_offs_sp(0x8d, d, struct_size);
849 gen_offs_sp(0x89, d, arg*8);
850 } else {
851 d = arg_prepare_reg(arg);
852 gen_offs_sp(0x8d, d, struct_size);
854 struct_size += size;
855 } else {
856 if (is_sse_float(vtop->type.t)) {
857 if (tcc_state->nosse)
858 tcc_error("SSE disabled");
859 gv(RC_XMM0); /* only use one float register */
860 if (arg >= REGN) {
861 /* movq %xmm0, j*8(%rsp) */
862 gen_offs_sp(0xd60f66, 0x100, arg*8);
863 } else {
864 /* movaps %xmm0, %xmmN */
865 o(0x280f);
866 o(0xc0 + (arg << 3));
867 d = arg_prepare_reg(arg);
868 /* mov %xmm0, %rxx */
869 o(0x66);
870 orex(1,d,0, 0x7e0f);
871 o(0xc0 + REG_VALUE(d));
873 } else {
874 if (bt == VT_STRUCT) {
875 vtop->type.ref = NULL;
876 vtop->type.t = size > 4 ? VT_LLONG : size > 2 ? VT_INT
877 : size > 1 ? VT_SHORT : VT_BYTE;
880 r = gv(RC_INT);
881 if (arg >= REGN) {
882 gen_offs_sp(0x89, r, arg*8);
883 } else {
884 d = arg_prepare_reg(arg);
885 orex(1,d,r,0x89); /* mov */
886 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
890 vtop--;
892 save_regs(0);
894 /* Copy R10 and R11 into RCX and RDX, respectively */
895 if (nb_args > 0) {
896 o(0xd1894c); /* mov %r10, %rcx */
897 if (nb_args > 1) {
898 o(0xda894c); /* mov %r11, %rdx */
902 gcall_or_jmp(0);
903 /* other compilers don't clear the upper bits when returning char/short */
904 bt = vtop->type.ref->type.t & (VT_BTYPE | VT_UNSIGNED);
905 if (bt == (VT_BYTE | VT_UNSIGNED))
906 o(0xc0b60f); /* movzbl %al, %eax */
907 else if (bt == VT_BYTE)
908 o(0xc0be0f); /* movsbl %al, %eax */
909 else if (bt == VT_SHORT)
910 o(0x98); /* cwtl */
911 else if (bt == (VT_SHORT | VT_UNSIGNED))
912 o(0xc0b70f); /* movzbl %al, %eax */
913 #if 0 /* handled in gen_cast() */
914 else if (bt == VT_INT)
915 o(0x9848); /* cltq */
916 else if (bt == (VT_INT | VT_UNSIGNED))
917 o(0xc089); /* mov %eax,%eax */
918 #endif
919 vtop--;
923 #define FUNC_PROLOG_SIZE 11
925 /* generate function prolog of type 't' */
926 void gfunc_prolog(CType *func_type)
928 int addr, reg_param_index, bt, size;
929 Sym *sym;
930 CType *type;
932 func_ret_sub = 0;
933 func_scratch = 0;
934 loc = 0;
936 addr = PTR_SIZE * 2;
937 ind += FUNC_PROLOG_SIZE;
938 func_sub_sp_offset = ind;
939 reg_param_index = 0;
941 sym = func_type->ref;
943 /* if the function returns a structure, then add an
944 implicit pointer parameter */
945 func_vt = sym->type;
946 func_var = (sym->c == FUNC_ELLIPSIS);
947 size = gfunc_arg_size(&func_vt);
948 if (size > 8) {
949 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
950 func_vc = addr;
951 reg_param_index++;
952 addr += 8;
955 /* define parameters */
956 while ((sym = sym->next) != NULL) {
957 type = &sym->type;
958 bt = type->t & VT_BTYPE;
959 size = gfunc_arg_size(type);
960 if (size > 8) {
961 if (reg_param_index < REGN) {
962 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
964 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL | VT_REF, addr);
965 } else {
966 if (reg_param_index < REGN) {
967 /* save arguments passed by register */
968 if ((bt == VT_FLOAT) || (bt == VT_DOUBLE)) {
969 if (tcc_state->nosse)
970 tcc_error("SSE disabled");
971 o(0xd60f66); /* movq */
972 gen_modrm(reg_param_index, VT_LOCAL, NULL, addr);
973 } else {
974 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
977 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL, addr);
979 addr += 8;
980 reg_param_index++;
983 while (reg_param_index < REGN) {
984 if (func_type->ref->c == FUNC_ELLIPSIS) {
985 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
986 addr += 8;
988 reg_param_index++;
992 /* generate function epilog */
993 void gfunc_epilog(void)
995 int v, saved_ind;
997 o(0xc9); /* leave */
998 if (func_ret_sub == 0) {
999 o(0xc3); /* ret */
1000 } else {
1001 o(0xc2); /* ret n */
1002 g(func_ret_sub);
1003 g(func_ret_sub >> 8);
1006 saved_ind = ind;
1007 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
1008 /* align local size to word & save local variables */
1009 v = (func_scratch + -loc + 15) & -16;
1011 if (v >= 4096) {
1012 Sym *sym = external_global_sym(TOK___chkstk, &func_old_type, 0);
1013 oad(0xb8, v); /* mov stacksize, %eax */
1014 oad(0xe8, 0); /* call __chkstk, (does the stackframe too) */
1015 greloca(cur_text_section, sym, ind-4, R_X86_64_PC32, -4);
1016 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
1017 } else {
1018 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1019 o(0xec8148); /* sub rsp, stacksize */
1020 gen_le32(v);
1023 cur_text_section->data_offset = saved_ind;
1024 pe_add_unwind_data(ind, saved_ind, v);
1025 ind = cur_text_section->data_offset;
1028 #else
1030 static void gadd_sp(int val)
1032 if (val == (char)val) {
1033 o(0xc48348);
1034 g(val);
1035 } else {
1036 oad(0xc48148, val); /* add $xxx, %rsp */
1040 typedef enum X86_64_Mode {
1041 x86_64_mode_none,
1042 x86_64_mode_memory,
1043 x86_64_mode_integer,
1044 x86_64_mode_sse,
1045 x86_64_mode_x87
1046 } X86_64_Mode;
1048 static X86_64_Mode classify_x86_64_merge(X86_64_Mode a, X86_64_Mode b)
1050 if (a == b)
1051 return a;
1052 else if (a == x86_64_mode_none)
1053 return b;
1054 else if (b == x86_64_mode_none)
1055 return a;
1056 else if ((a == x86_64_mode_memory) || (b == x86_64_mode_memory))
1057 return x86_64_mode_memory;
1058 else if ((a == x86_64_mode_integer) || (b == x86_64_mode_integer))
1059 return x86_64_mode_integer;
1060 else if ((a == x86_64_mode_x87) || (b == x86_64_mode_x87))
1061 return x86_64_mode_memory;
1062 else
1063 return x86_64_mode_sse;
1066 static X86_64_Mode classify_x86_64_inner(CType *ty)
1068 X86_64_Mode mode;
1069 Sym *f;
1071 switch (ty->t & VT_BTYPE) {
1072 case VT_VOID: return x86_64_mode_none;
1074 case VT_INT:
1075 case VT_BYTE:
1076 case VT_SHORT:
1077 case VT_LLONG:
1078 case VT_BOOL:
1079 case VT_PTR:
1080 case VT_FUNC:
1081 case VT_ENUM: return x86_64_mode_integer;
1083 case VT_FLOAT:
1084 case VT_DOUBLE: return x86_64_mode_sse;
1086 case VT_LDOUBLE: return x86_64_mode_x87;
1088 case VT_STRUCT:
1089 f = ty->ref;
1091 mode = x86_64_mode_none;
1092 for (f = f->next; f; f = f->next)
1093 mode = classify_x86_64_merge(mode, classify_x86_64_inner(&f->type));
1095 return mode;
1097 assert(0);
1098 return 0;
1101 static X86_64_Mode classify_x86_64_arg(CType *ty, CType *ret, int *psize, int *palign, int *reg_count)
1103 X86_64_Mode mode;
1104 int size, align, ret_t = 0;
1106 if (ty->t & (VT_BITFIELD|VT_ARRAY)) {
1107 *psize = 8;
1108 *palign = 8;
1109 *reg_count = 1;
1110 ret_t = ty->t;
1111 mode = x86_64_mode_integer;
1112 } else {
1113 size = type_size(ty, &align);
1114 *psize = (size + 7) & ~7;
1115 *palign = (align + 7) & ~7;
1117 if (size > 16) {
1118 mode = x86_64_mode_memory;
1119 } else {
1120 mode = classify_x86_64_inner(ty);
1121 switch (mode) {
1122 case x86_64_mode_integer:
1123 if (size > 8) {
1124 *reg_count = 2;
1125 ret_t = VT_QLONG;
1126 } else {
1127 *reg_count = 1;
1128 ret_t = (size > 4) ? VT_LLONG : VT_INT;
1130 break;
1132 case x86_64_mode_x87:
1133 *reg_count = 1;
1134 ret_t = VT_LDOUBLE;
1135 break;
1137 case x86_64_mode_sse:
1138 if (size > 8) {
1139 *reg_count = 2;
1140 ret_t = VT_QFLOAT;
1141 } else {
1142 *reg_count = 1;
1143 ret_t = (size > 4) ? VT_DOUBLE : VT_FLOAT;
1145 break;
1146 default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1151 if (ret) {
1152 ret->ref = NULL;
1153 ret->t = ret_t;
1156 return mode;
1159 ST_FUNC int classify_x86_64_va_arg(CType *ty)
1161 /* This definition must be synced with stdarg.h */
1162 enum __va_arg_type {
1163 __va_gen_reg, __va_float_reg, __va_stack
1165 int size, align, reg_count;
1166 X86_64_Mode mode = classify_x86_64_arg(ty, NULL, &size, &align, &reg_count);
1167 switch (mode) {
1168 default: return __va_stack;
1169 case x86_64_mode_integer: return __va_gen_reg;
1170 case x86_64_mode_sse: return __va_float_reg;
1174 /* Return the number of registers needed to return the struct, or 0 if
1175 returning via struct pointer. */
1176 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize)
1178 int size, align, reg_count;
1179 *ret_align = 1; // Never have to re-align return values for x86-64
1180 *regsize = 8;
1181 return (classify_x86_64_arg(vt, ret, &size, &align, &reg_count) != x86_64_mode_memory);
1184 #define REGN 6
1185 static const uint8_t arg_regs[REGN] = {
1186 TREG_RDI, TREG_RSI, TREG_RDX, TREG_RCX, TREG_R8, TREG_R9
1189 static int arg_prepare_reg(int idx) {
1190 if (idx == 2 || idx == 3)
1191 /* idx=2: r10, idx=3: r11 */
1192 return idx + 8;
1193 else
1194 return arg_regs[idx];
1197 /* Generate function call. The function address is pushed first, then
1198 all the parameters in call order. This functions pops all the
1199 parameters and the function address. */
1200 void gfunc_call(int nb_args)
1202 X86_64_Mode mode;
1203 CType type;
1204 int size, align, r, args_size, stack_adjust, run_start, run_end, i, reg_count;
1205 int nb_reg_args = 0;
1206 int nb_sse_args = 0;
1207 int sse_reg, gen_reg;
1209 /* calculate the number of integer/float register arguments */
1210 for(i = 0; i < nb_args; i++) {
1211 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1212 if (mode == x86_64_mode_sse)
1213 nb_sse_args += reg_count;
1214 else if (mode == x86_64_mode_integer)
1215 nb_reg_args += reg_count;
1218 if (nb_sse_args && tcc_state->nosse)
1219 tcc_error("SSE disabled but floating point arguments passed");
1221 /* arguments are collected in runs. Each run is a collection of 8-byte aligned arguments
1222 and ended by a 16-byte aligned argument. This is because, from the point of view of
1223 the callee, argument alignment is computed from the bottom up. */
1224 /* for struct arguments, we need to call memcpy and the function
1225 call breaks register passing arguments we are preparing.
1226 So, we process arguments which will be passed by stack first. */
1227 gen_reg = nb_reg_args;
1228 sse_reg = nb_sse_args;
1229 run_start = 0;
1230 args_size = 0;
1231 while (run_start != nb_args) {
1232 int run_gen_reg = gen_reg, run_sse_reg = sse_reg;
1234 run_end = nb_args;
1235 stack_adjust = 0;
1236 for(i = run_start; (i < nb_args) && (run_end == nb_args); i++) {
1237 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1238 switch (mode) {
1239 case x86_64_mode_memory:
1240 case x86_64_mode_x87:
1241 stack_arg:
1242 if (align == 16)
1243 run_end = i;
1244 else
1245 stack_adjust += size;
1246 break;
1248 case x86_64_mode_sse:
1249 sse_reg -= reg_count;
1250 if (sse_reg + reg_count > 8) goto stack_arg;
1251 break;
1253 case x86_64_mode_integer:
1254 gen_reg -= reg_count;
1255 if (gen_reg + reg_count > REGN) goto stack_arg;
1256 break;
1257 default: break; /* nothing to be done for x86_64_mode_none */
1261 gen_reg = run_gen_reg;
1262 sse_reg = run_sse_reg;
1264 /* adjust stack to align SSE boundary */
1265 if (stack_adjust &= 15) {
1266 /* fetch cpu flag before the following sub will change the value */
1267 if (vtop >= vstack && (vtop->r & VT_VALMASK) == VT_CMP)
1268 gv(RC_INT);
1270 stack_adjust = 16 - stack_adjust;
1271 o(0x48);
1272 oad(0xec81, stack_adjust); /* sub $xxx, %rsp */
1273 args_size += stack_adjust;
1276 for(i = run_start; i < run_end;) {
1277 /* Swap argument to top, it will possibly be changed here,
1278 and might use more temps. At the end of the loop we keep
1279 in on the stack and swap it back to its original position
1280 if it is a register. */
1281 SValue tmp = vtop[0];
1282 int arg_stored = 1;
1284 vtop[0] = vtop[-i];
1285 vtop[-i] = tmp;
1286 mode = classify_x86_64_arg(&vtop->type, NULL, &size, &align, &reg_count);
1288 switch (vtop->type.t & VT_BTYPE) {
1289 case VT_STRUCT:
1290 if (mode == x86_64_mode_sse) {
1291 if (sse_reg > 8)
1292 sse_reg -= reg_count;
1293 else
1294 arg_stored = 0;
1295 } else if (mode == x86_64_mode_integer) {
1296 if (gen_reg > REGN)
1297 gen_reg -= reg_count;
1298 else
1299 arg_stored = 0;
1302 if (arg_stored) {
1303 /* allocate the necessary size on stack */
1304 o(0x48);
1305 oad(0xec81, size); /* sub $xxx, %rsp */
1306 /* generate structure store */
1307 r = get_reg(RC_INT);
1308 orex(1, r, 0, 0x89); /* mov %rsp, r */
1309 o(0xe0 + REG_VALUE(r));
1310 vset(&vtop->type, r | VT_LVAL, 0);
1311 vswap();
1312 vstore();
1313 args_size += size;
1315 break;
1317 case VT_LDOUBLE:
1318 assert(0);
1319 break;
1321 case VT_FLOAT:
1322 case VT_DOUBLE:
1323 assert(mode == x86_64_mode_sse);
1324 if (sse_reg > 8) {
1325 --sse_reg;
1326 r = gv(RC_FLOAT);
1327 o(0x50); /* push $rax */
1328 /* movq %xmmN, (%rsp) */
1329 o(0xd60f66);
1330 o(0x04 + REG_VALUE(r)*8);
1331 o(0x24);
1332 args_size += size;
1333 } else {
1334 arg_stored = 0;
1336 break;
1338 default:
1339 assert(mode == x86_64_mode_integer);
1340 /* simple type */
1341 /* XXX: implicit cast ? */
1342 if (gen_reg > REGN) {
1343 --gen_reg;
1344 r = gv(RC_INT);
1345 orex(0,r,0,0x50 + REG_VALUE(r)); /* push r */
1346 args_size += size;
1347 } else {
1348 arg_stored = 0;
1350 break;
1353 /* And swap the argument back to it's original position. */
1354 tmp = vtop[0];
1355 vtop[0] = vtop[-i];
1356 vtop[-i] = tmp;
1358 if (arg_stored) {
1359 vrotb(i+1);
1360 assert((vtop->type.t == tmp.type.t) && (vtop->r == tmp.r));
1361 vpop();
1362 --nb_args;
1363 --run_end;
1364 } else {
1365 ++i;
1369 /* handle 16 byte aligned arguments at end of run */
1370 run_start = i = run_end;
1371 while (i < nb_args) {
1372 /* Rotate argument to top since it will always be popped */
1373 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1374 if (align != 16)
1375 break;
1377 vrotb(i+1);
1379 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1380 gv(RC_ST0);
1381 oad(0xec8148, size); /* sub $xxx, %rsp */
1382 o(0x7cdb); /* fstpt 0(%rsp) */
1383 g(0x24);
1384 g(0x00);
1385 args_size += size;
1386 } else {
1387 assert(mode == x86_64_mode_memory);
1389 /* allocate the necessary size on stack */
1390 o(0x48);
1391 oad(0xec81, size); /* sub $xxx, %rsp */
1392 /* generate structure store */
1393 r = get_reg(RC_INT);
1394 orex(1, r, 0, 0x89); /* mov %rsp, r */
1395 o(0xe0 + REG_VALUE(r));
1396 vset(&vtop->type, r | VT_LVAL, 0);
1397 vswap();
1398 vstore();
1399 args_size += size;
1402 vpop();
1403 --nb_args;
1407 /* XXX This should be superfluous. */
1408 save_regs(0); /* save used temporary registers */
1410 /* then, we prepare register passing arguments.
1411 Note that we cannot set RDX and RCX in this loop because gv()
1412 may break these temporary registers. Let's use R10 and R11
1413 instead of them */
1414 assert(gen_reg <= REGN);
1415 assert(sse_reg <= 8);
1416 for(i = 0; i < nb_args; i++) {
1417 mode = classify_x86_64_arg(&vtop->type, &type, &size, &align, &reg_count);
1418 /* Alter stack entry type so that gv() knows how to treat it */
1419 vtop->type = type;
1420 if (mode == x86_64_mode_sse) {
1421 if (reg_count == 2) {
1422 sse_reg -= 2;
1423 gv(RC_FRET); /* Use pair load into xmm0 & xmm1 */
1424 if (sse_reg) { /* avoid redundant movaps %xmm0, %xmm0 */
1425 /* movaps %xmm0, %xmmN */
1426 o(0x280f);
1427 o(0xc0 + (sse_reg << 3));
1428 /* movaps %xmm1, %xmmN */
1429 o(0x280f);
1430 o(0xc1 + ((sse_reg+1) << 3));
1432 } else {
1433 assert(reg_count == 1);
1434 --sse_reg;
1435 /* Load directly to register */
1436 gv(RC_XMM0 << sse_reg);
1438 } else if (mode == x86_64_mode_integer) {
1439 /* simple type */
1440 /* XXX: implicit cast ? */
1441 int d;
1442 gen_reg -= reg_count;
1443 r = gv(RC_INT);
1444 d = arg_prepare_reg(gen_reg);
1445 orex(1,d,r,0x89); /* mov */
1446 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
1447 if (reg_count == 2) {
1448 d = arg_prepare_reg(gen_reg+1);
1449 orex(1,d,vtop->r2,0x89); /* mov */
1450 o(0xc0 + REG_VALUE(vtop->r2) * 8 + REG_VALUE(d));
1453 vtop--;
1455 assert(gen_reg == 0);
1456 assert(sse_reg == 0);
1458 /* We shouldn't have many operands on the stack anymore, but the
1459 call address itself is still there, and it might be in %eax
1460 (or edx/ecx) currently, which the below writes would clobber.
1461 So evict all remaining operands here. */
1462 save_regs(0);
1464 /* Copy R10 and R11 into RDX and RCX, respectively */
1465 if (nb_reg_args > 2) {
1466 o(0xd2894c); /* mov %r10, %rdx */
1467 if (nb_reg_args > 3) {
1468 o(0xd9894c); /* mov %r11, %rcx */
1472 if (vtop->type.ref->c != FUNC_NEW) /* implies FUNC_OLD or FUNC_ELLIPSIS */
1473 oad(0xb8, nb_sse_args < 8 ? nb_sse_args : 8); /* mov nb_sse_args, %eax */
1474 gcall_or_jmp(0);
1475 if (args_size)
1476 gadd_sp(args_size);
1477 vtop--;
1481 #define FUNC_PROLOG_SIZE 11
1483 static void push_arg_reg(int i) {
1484 loc -= 8;
1485 gen_modrm64(0x89, arg_regs[i], VT_LOCAL, NULL, loc);
1488 /* generate function prolog of type 't' */
1489 void gfunc_prolog(CType *func_type)
1491 X86_64_Mode mode;
1492 int i, addr, align, size, reg_count;
1493 int param_addr = 0, reg_param_index, sse_param_index;
1494 Sym *sym;
1495 CType *type;
1497 sym = func_type->ref;
1498 addr = PTR_SIZE * 2;
1499 loc = 0;
1500 ind += FUNC_PROLOG_SIZE;
1501 func_sub_sp_offset = ind;
1502 func_ret_sub = 0;
1504 if (func_type->ref->c == FUNC_ELLIPSIS) {
1505 int seen_reg_num, seen_sse_num, seen_stack_size;
1506 seen_reg_num = seen_sse_num = 0;
1507 /* frame pointer and return address */
1508 seen_stack_size = PTR_SIZE * 2;
1509 /* count the number of seen parameters */
1510 sym = func_type->ref;
1511 while ((sym = sym->next) != NULL) {
1512 type = &sym->type;
1513 mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
1514 switch (mode) {
1515 default:
1516 stack_arg:
1517 seen_stack_size = ((seen_stack_size + align - 1) & -align) + size;
1518 break;
1520 case x86_64_mode_integer:
1521 if (seen_reg_num + reg_count <= 8) {
1522 seen_reg_num += reg_count;
1523 } else {
1524 seen_reg_num = 8;
1525 goto stack_arg;
1527 break;
1529 case x86_64_mode_sse:
1530 if (seen_sse_num + reg_count <= 8) {
1531 seen_sse_num += reg_count;
1532 } else {
1533 seen_sse_num = 8;
1534 goto stack_arg;
1536 break;
1540 loc -= 16;
1541 /* movl $0x????????, -0x10(%rbp) */
1542 o(0xf045c7);
1543 gen_le32(seen_reg_num * 8);
1544 /* movl $0x????????, -0xc(%rbp) */
1545 o(0xf445c7);
1546 gen_le32(seen_sse_num * 16 + 48);
1547 /* movl $0x????????, -0x8(%rbp) */
1548 o(0xf845c7);
1549 gen_le32(seen_stack_size);
1551 /* save all register passing arguments */
1552 for (i = 0; i < 8; i++) {
1553 loc -= 16;
1554 if (!tcc_state->nosse) {
1555 o(0xd60f66); /* movq */
1556 gen_modrm(7 - i, VT_LOCAL, NULL, loc);
1558 /* movq $0, loc+8(%rbp) */
1559 o(0x85c748);
1560 gen_le32(loc + 8);
1561 gen_le32(0);
1563 for (i = 0; i < REGN; i++) {
1564 push_arg_reg(REGN-1-i);
1568 sym = func_type->ref;
1569 reg_param_index = 0;
1570 sse_param_index = 0;
1572 /* if the function returns a structure, then add an
1573 implicit pointer parameter */
1574 func_vt = sym->type;
1575 mode = classify_x86_64_arg(&func_vt, NULL, &size, &align, &reg_count);
1576 if (mode == x86_64_mode_memory) {
1577 push_arg_reg(reg_param_index);
1578 func_vc = loc;
1579 reg_param_index++;
1581 /* define parameters */
1582 while ((sym = sym->next) != NULL) {
1583 type = &sym->type;
1584 mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
1585 switch (mode) {
1586 case x86_64_mode_sse:
1587 if (tcc_state->nosse)
1588 tcc_error("SSE disabled but floating point arguments used");
1589 if (sse_param_index + reg_count <= 8) {
1590 /* save arguments passed by register */
1591 loc -= reg_count * 8;
1592 param_addr = loc;
1593 for (i = 0; i < reg_count; ++i) {
1594 o(0xd60f66); /* movq */
1595 gen_modrm(sse_param_index, VT_LOCAL, NULL, param_addr + i*8);
1596 ++sse_param_index;
1598 } else {
1599 addr = (addr + align - 1) & -align;
1600 param_addr = addr;
1601 addr += size;
1603 break;
1605 case x86_64_mode_memory:
1606 case x86_64_mode_x87:
1607 addr = (addr + align - 1) & -align;
1608 param_addr = addr;
1609 addr += size;
1610 break;
1612 case x86_64_mode_integer: {
1613 if (reg_param_index + reg_count <= REGN) {
1614 /* save arguments passed by register */
1615 loc -= reg_count * 8;
1616 param_addr = loc;
1617 for (i = 0; i < reg_count; ++i) {
1618 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, param_addr + i*8);
1619 ++reg_param_index;
1621 } else {
1622 addr = (addr + align - 1) & -align;
1623 param_addr = addr;
1624 addr += size;
1626 break;
1628 default: break; /* nothing to be done for x86_64_mode_none */
1630 sym_push(sym->v & ~SYM_FIELD, type,
1631 VT_LOCAL | VT_LVAL, param_addr);
1634 #ifdef CONFIG_TCC_BCHECK
1635 /* leave some room for bound checking code */
1636 if (tcc_state->do_bounds_check) {
1637 func_bound_offset = lbounds_section->data_offset;
1638 func_bound_ind = ind;
1639 oad(0xb8, 0); /* lbound section pointer */
1640 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1641 oad(0xb8, 0); /* call to function */
1643 #endif
1646 /* generate function epilog */
1647 void gfunc_epilog(void)
1649 int v, saved_ind;
1651 #ifdef CONFIG_TCC_BCHECK
1652 if (tcc_state->do_bounds_check
1653 && func_bound_offset != lbounds_section->data_offset)
1655 addr_t saved_ind;
1656 addr_t *bounds_ptr;
1657 Sym *sym_data;
1659 /* add end of table info */
1660 bounds_ptr = section_ptr_add(lbounds_section, sizeof(addr_t));
1661 *bounds_ptr = 0;
1663 /* generate bound local allocation */
1664 sym_data = get_sym_ref(&char_pointer_type, lbounds_section,
1665 func_bound_offset, lbounds_section->data_offset);
1666 saved_ind = ind;
1667 ind = func_bound_ind;
1668 greloc(cur_text_section, sym_data, ind + 1, R_386_32);
1669 ind = ind + 5 + 3;
1670 gen_static_call(TOK___bound_local_new);
1671 ind = saved_ind;
1673 /* generate bound check local freeing */
1674 o(0x5250); /* save returned value, if any */
1675 greloc(cur_text_section, sym_data, ind + 1, R_386_32);
1676 oad(0xb8, 0); /* mov xxx, %rax */
1677 o(0xc78948); /* mov %rax,%rdi # first arg in %rdi, this must be ptr */
1678 gen_static_call(TOK___bound_local_delete);
1679 o(0x585a); /* restore returned value, if any */
1681 #endif
1682 o(0xc9); /* leave */
1683 if (func_ret_sub == 0) {
1684 o(0xc3); /* ret */
1685 } else {
1686 o(0xc2); /* ret n */
1687 g(func_ret_sub);
1688 g(func_ret_sub >> 8);
1690 /* align local size to word & save local variables */
1691 v = (-loc + 15) & -16;
1692 saved_ind = ind;
1693 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
1694 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1695 o(0xec8148); /* sub rsp, stacksize */
1696 gen_le32(v);
1697 ind = saved_ind;
1700 #endif /* not PE */
1702 /* generate a jump to a label */
1703 int gjmp(int t)
1705 return gjmp2(0xe9, t);
1708 /* generate a jump to a fixed address */
1709 void gjmp_addr(int a)
1711 int r;
1712 r = a - ind - 2;
1713 if (r == (char)r) {
1714 g(0xeb);
1715 g(r);
1716 } else {
1717 oad(0xe9, a - ind - 5);
1721 ST_FUNC void gtst_addr(int inv, int a)
1723 int v = vtop->r & VT_VALMASK;
1724 if (v == VT_CMP) {
1725 inv ^= (vtop--)->c.i;
1726 a -= ind + 2;
1727 if (a == (char)a) {
1728 g(inv - 32);
1729 g(a);
1730 } else {
1731 g(0x0f);
1732 oad(inv - 16, a - 4);
1734 } else if ((v & ~1) == VT_JMP) {
1735 if ((v & 1) != inv) {
1736 gjmp_addr(a);
1737 gsym(vtop->c.i);
1738 } else {
1739 gsym(vtop->c.i);
1740 o(0x05eb);
1741 gjmp_addr(a);
1743 vtop--;
1747 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1748 ST_FUNC int gtst(int inv, int t)
1750 int v = vtop->r & VT_VALMASK;
1752 if (nocode_wanted) {
1754 } else if (v == VT_CMP) {
1755 /* fast case : can jump directly since flags are set */
1756 if (vtop->c.i & 0x100)
1758 /* This was a float compare. If the parity flag is set
1759 the result was unordered. For anything except != this
1760 means false and we don't jump (anding both conditions).
1761 For != this means true (oring both).
1762 Take care about inverting the test. We need to jump
1763 to our target if the result was unordered and test wasn't NE,
1764 otherwise if unordered we don't want to jump. */
1765 vtop->c.i &= ~0x100;
1766 if (inv == (vtop->c.i == TOK_NE))
1767 o(0x067a); /* jp +6 */
1768 else
1770 g(0x0f);
1771 t = gjmp2(0x8a, t); /* jp t */
1774 g(0x0f);
1775 t = gjmp2((vtop->c.i - 16) ^ inv, t);
1776 } else if (v == VT_JMP || v == VT_JMPI) {
1777 /* && or || optimization */
1778 if ((v & 1) == inv) {
1779 /* insert vtop->c jump list in t */
1780 uint32_t n1, n = vtop->c.i;
1781 if (n) {
1782 while ((n1 = read32le(cur_text_section->data + n)))
1783 n = n1;
1784 write32le(cur_text_section->data + n, t);
1785 t = vtop->c.i;
1787 } else {
1788 t = gjmp(t);
1789 gsym(vtop->c.i);
1792 vtop--;
1793 return t;
1796 /* generate an integer binary operation */
1797 void gen_opi(int op)
1799 int r, fr, opc, c;
1800 int ll, uu, cc;
1802 ll = is64_type(vtop[-1].type.t);
1803 uu = (vtop[-1].type.t & VT_UNSIGNED) != 0;
1804 cc = (vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST;
1806 switch(op) {
1807 case '+':
1808 case TOK_ADDC1: /* add with carry generation */
1809 opc = 0;
1810 gen_op8:
1811 if (cc && (!ll || (int)vtop->c.i == vtop->c.i)) {
1812 /* constant case */
1813 vswap();
1814 r = gv(RC_INT);
1815 vswap();
1816 c = vtop->c.i;
1817 if (c == (char)c) {
1818 /* XXX: generate inc and dec for smaller code ? */
1819 orex(ll, r, 0, 0x83);
1820 o(0xc0 | (opc << 3) | REG_VALUE(r));
1821 g(c);
1822 } else {
1823 orex(ll, r, 0, 0x81);
1824 oad(0xc0 | (opc << 3) | REG_VALUE(r), c);
1826 } else {
1827 gv2(RC_INT, RC_INT);
1828 r = vtop[-1].r;
1829 fr = vtop[0].r;
1830 orex(ll, r, fr, (opc << 3) | 0x01);
1831 o(0xc0 + REG_VALUE(r) + REG_VALUE(fr) * 8);
1833 vtop--;
1834 if (op >= TOK_ULT && op <= TOK_GT) {
1835 vtop->r = VT_CMP;
1836 vtop->c.i = op;
1838 break;
1839 case '-':
1840 case TOK_SUBC1: /* sub with carry generation */
1841 opc = 5;
1842 goto gen_op8;
1843 case TOK_ADDC2: /* add with carry use */
1844 opc = 2;
1845 goto gen_op8;
1846 case TOK_SUBC2: /* sub with carry use */
1847 opc = 3;
1848 goto gen_op8;
1849 case '&':
1850 opc = 4;
1851 goto gen_op8;
1852 case '^':
1853 opc = 6;
1854 goto gen_op8;
1855 case '|':
1856 opc = 1;
1857 goto gen_op8;
1858 case '*':
1859 gv2(RC_INT, RC_INT);
1860 r = vtop[-1].r;
1861 fr = vtop[0].r;
1862 orex(ll, fr, r, 0xaf0f); /* imul fr, r */
1863 o(0xc0 + REG_VALUE(fr) + REG_VALUE(r) * 8);
1864 vtop--;
1865 break;
1866 case TOK_SHL:
1867 opc = 4;
1868 goto gen_shift;
1869 case TOK_SHR:
1870 opc = 5;
1871 goto gen_shift;
1872 case TOK_SAR:
1873 opc = 7;
1874 gen_shift:
1875 opc = 0xc0 | (opc << 3);
1876 if (cc) {
1877 /* constant case */
1878 vswap();
1879 r = gv(RC_INT);
1880 vswap();
1881 orex(ll, r, 0, 0xc1); /* shl/shr/sar $xxx, r */
1882 o(opc | REG_VALUE(r));
1883 g(vtop->c.i & (ll ? 63 : 31));
1884 } else {
1885 /* we generate the shift in ecx */
1886 gv2(RC_INT, RC_RCX);
1887 r = vtop[-1].r;
1888 orex(ll, r, 0, 0xd3); /* shl/shr/sar %cl, r */
1889 o(opc | REG_VALUE(r));
1891 vtop--;
1892 break;
1893 case TOK_UDIV:
1894 case TOK_UMOD:
1895 uu = 1;
1896 goto divmod;
1897 case '/':
1898 case '%':
1899 case TOK_PDIV:
1900 uu = 0;
1901 divmod:
1902 /* first operand must be in eax */
1903 /* XXX: need better constraint for second operand */
1904 gv2(RC_RAX, RC_RCX);
1905 r = vtop[-1].r;
1906 fr = vtop[0].r;
1907 vtop--;
1908 save_reg(TREG_RDX);
1909 orex(ll, 0, 0, uu ? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1910 orex(ll, fr, 0, 0xf7); /* div fr, %eax */
1911 o((uu ? 0xf0 : 0xf8) + REG_VALUE(fr));
1912 if (op == '%' || op == TOK_UMOD)
1913 r = TREG_RDX;
1914 else
1915 r = TREG_RAX;
1916 vtop->r = r;
1917 break;
1918 default:
1919 opc = 7;
1920 goto gen_op8;
1924 void gen_opl(int op)
1926 gen_opi(op);
1929 /* generate a floating point operation 'v = t1 op t2' instruction. The
1930 two operands are guaranted to have the same floating point type */
1931 /* XXX: need to use ST1 too */
1932 void gen_opf(int op)
1934 int a, ft, fc, swapped, r;
1935 int float_type =
1936 (vtop->type.t & VT_BTYPE) == VT_LDOUBLE ? RC_ST0 : RC_FLOAT;
1938 /* convert constants to memory references */
1939 if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
1940 vswap();
1941 gv(float_type);
1942 vswap();
1944 if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
1945 gv(float_type);
1947 /* must put at least one value in the floating point register */
1948 if ((vtop[-1].r & VT_LVAL) &&
1949 (vtop[0].r & VT_LVAL)) {
1950 vswap();
1951 gv(float_type);
1952 vswap();
1954 swapped = 0;
1955 /* swap the stack if needed so that t1 is the register and t2 is
1956 the memory reference */
1957 if (vtop[-1].r & VT_LVAL) {
1958 vswap();
1959 swapped = 1;
1961 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1962 if (op >= TOK_ULT && op <= TOK_GT) {
1963 /* load on stack second operand */
1964 load(TREG_ST0, vtop);
1965 save_reg(TREG_RAX); /* eax is used by FP comparison code */
1966 if (op == TOK_GE || op == TOK_GT)
1967 swapped = !swapped;
1968 else if (op == TOK_EQ || op == TOK_NE)
1969 swapped = 0;
1970 if (swapped)
1971 o(0xc9d9); /* fxch %st(1) */
1972 if (op == TOK_EQ || op == TOK_NE)
1973 o(0xe9da); /* fucompp */
1974 else
1975 o(0xd9de); /* fcompp */
1976 o(0xe0df); /* fnstsw %ax */
1977 if (op == TOK_EQ) {
1978 o(0x45e480); /* and $0x45, %ah */
1979 o(0x40fC80); /* cmp $0x40, %ah */
1980 } else if (op == TOK_NE) {
1981 o(0x45e480); /* and $0x45, %ah */
1982 o(0x40f480); /* xor $0x40, %ah */
1983 op = TOK_NE;
1984 } else if (op == TOK_GE || op == TOK_LE) {
1985 o(0x05c4f6); /* test $0x05, %ah */
1986 op = TOK_EQ;
1987 } else {
1988 o(0x45c4f6); /* test $0x45, %ah */
1989 op = TOK_EQ;
1991 vtop--;
1992 vtop->r = VT_CMP;
1993 vtop->c.i = op;
1994 } else {
1995 /* no memory reference possible for long double operations */
1996 load(TREG_ST0, vtop);
1997 swapped = !swapped;
1999 switch(op) {
2000 default:
2001 case '+':
2002 a = 0;
2003 break;
2004 case '-':
2005 a = 4;
2006 if (swapped)
2007 a++;
2008 break;
2009 case '*':
2010 a = 1;
2011 break;
2012 case '/':
2013 a = 6;
2014 if (swapped)
2015 a++;
2016 break;
2018 ft = vtop->type.t;
2019 fc = vtop->c.i;
2020 o(0xde); /* fxxxp %st, %st(1) */
2021 o(0xc1 + (a << 3));
2022 vtop--;
2024 } else {
2025 if (op >= TOK_ULT && op <= TOK_GT) {
2026 /* if saved lvalue, then we must reload it */
2027 r = vtop->r;
2028 fc = vtop->c.i;
2029 if ((r & VT_VALMASK) == VT_LLOCAL) {
2030 SValue v1;
2031 r = get_reg(RC_INT);
2032 v1.type.t = VT_PTR;
2033 v1.r = VT_LOCAL | VT_LVAL;
2034 v1.c.i = fc;
2035 load(r, &v1);
2036 fc = 0;
2039 if (op == TOK_EQ || op == TOK_NE) {
2040 swapped = 0;
2041 } else {
2042 if (op == TOK_LE || op == TOK_LT)
2043 swapped = !swapped;
2044 if (op == TOK_LE || op == TOK_GE) {
2045 op = 0x93; /* setae */
2046 } else {
2047 op = 0x97; /* seta */
2051 if (swapped) {
2052 gv(RC_FLOAT);
2053 vswap();
2055 assert(!(vtop[-1].r & VT_LVAL));
2057 if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
2058 o(0x66);
2059 if (op == TOK_EQ || op == TOK_NE)
2060 o(0x2e0f); /* ucomisd */
2061 else
2062 o(0x2f0f); /* comisd */
2064 if (vtop->r & VT_LVAL) {
2065 gen_modrm(vtop[-1].r, r, vtop->sym, fc);
2066 } else {
2067 o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
2070 vtop--;
2071 vtop->r = VT_CMP;
2072 vtop->c.i = op | 0x100;
2073 } else {
2074 assert((vtop->type.t & VT_BTYPE) != VT_LDOUBLE);
2075 switch(op) {
2076 default:
2077 case '+':
2078 a = 0;
2079 break;
2080 case '-':
2081 a = 4;
2082 break;
2083 case '*':
2084 a = 1;
2085 break;
2086 case '/':
2087 a = 6;
2088 break;
2090 ft = vtop->type.t;
2091 fc = vtop->c.i;
2092 assert((ft & VT_BTYPE) != VT_LDOUBLE);
2094 r = vtop->r;
2095 /* if saved lvalue, then we must reload it */
2096 if ((vtop->r & VT_VALMASK) == VT_LLOCAL) {
2097 SValue v1;
2098 r = get_reg(RC_INT);
2099 v1.type.t = VT_PTR;
2100 v1.r = VT_LOCAL | VT_LVAL;
2101 v1.c.i = fc;
2102 load(r, &v1);
2103 fc = 0;
2106 assert(!(vtop[-1].r & VT_LVAL));
2107 if (swapped) {
2108 assert(vtop->r & VT_LVAL);
2109 gv(RC_FLOAT);
2110 vswap();
2113 if ((ft & VT_BTYPE) == VT_DOUBLE) {
2114 o(0xf2);
2115 } else {
2116 o(0xf3);
2118 o(0x0f);
2119 o(0x58 + a);
2121 if (vtop->r & VT_LVAL) {
2122 gen_modrm(vtop[-1].r, r, vtop->sym, fc);
2123 } else {
2124 o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
2127 vtop--;
2132 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
2133 and 'long long' cases. */
2134 void gen_cvt_itof(int t)
2136 if ((t & VT_BTYPE) == VT_LDOUBLE) {
2137 save_reg(TREG_ST0);
2138 gv(RC_INT);
2139 if ((vtop->type.t & VT_BTYPE) == VT_LLONG) {
2140 /* signed long long to float/double/long double (unsigned case
2141 is handled generically) */
2142 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2143 o(0x242cdf); /* fildll (%rsp) */
2144 o(0x08c48348); /* add $8, %rsp */
2145 } else if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
2146 (VT_INT | VT_UNSIGNED)) {
2147 /* unsigned int to float/double/long double */
2148 o(0x6a); /* push $0 */
2149 g(0x00);
2150 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2151 o(0x242cdf); /* fildll (%rsp) */
2152 o(0x10c48348); /* add $16, %rsp */
2153 } else {
2154 /* int to float/double/long double */
2155 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2156 o(0x2404db); /* fildl (%rsp) */
2157 o(0x08c48348); /* add $8, %rsp */
2159 vtop->r = TREG_ST0;
2160 } else {
2161 int r = get_reg(RC_FLOAT);
2162 gv(RC_INT);
2163 o(0xf2 + ((t & VT_BTYPE) == VT_FLOAT?1:0));
2164 if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
2165 (VT_INT | VT_UNSIGNED) ||
2166 (vtop->type.t & VT_BTYPE) == VT_LLONG) {
2167 o(0x48); /* REX */
2169 o(0x2a0f);
2170 o(0xc0 + (vtop->r & VT_VALMASK) + REG_VALUE(r)*8); /* cvtsi2sd */
2171 vtop->r = r;
2175 /* convert from one floating point type to another */
2176 void gen_cvt_ftof(int t)
2178 int ft, bt, tbt;
2180 ft = vtop->type.t;
2181 bt = ft & VT_BTYPE;
2182 tbt = t & VT_BTYPE;
2184 if (bt == VT_FLOAT) {
2185 gv(RC_FLOAT);
2186 if (tbt == VT_DOUBLE) {
2187 o(0x140f); /* unpcklps */
2188 o(0xc0 + REG_VALUE(vtop->r)*9);
2189 o(0x5a0f); /* cvtps2pd */
2190 o(0xc0 + REG_VALUE(vtop->r)*9);
2191 } else if (tbt == VT_LDOUBLE) {
2192 save_reg(RC_ST0);
2193 /* movss %xmm0,-0x10(%rsp) */
2194 o(0x110ff3);
2195 o(0x44 + REG_VALUE(vtop->r)*8);
2196 o(0xf024);
2197 o(0xf02444d9); /* flds -0x10(%rsp) */
2198 vtop->r = TREG_ST0;
2200 } else if (bt == VT_DOUBLE) {
2201 gv(RC_FLOAT);
2202 if (tbt == VT_FLOAT) {
2203 o(0x140f66); /* unpcklpd */
2204 o(0xc0 + REG_VALUE(vtop->r)*9);
2205 o(0x5a0f66); /* cvtpd2ps */
2206 o(0xc0 + REG_VALUE(vtop->r)*9);
2207 } else if (tbt == VT_LDOUBLE) {
2208 save_reg(RC_ST0);
2209 /* movsd %xmm0,-0x10(%rsp) */
2210 o(0x110ff2);
2211 o(0x44 + REG_VALUE(vtop->r)*8);
2212 o(0xf024);
2213 o(0xf02444dd); /* fldl -0x10(%rsp) */
2214 vtop->r = TREG_ST0;
2216 } else {
2217 int r;
2218 gv(RC_ST0);
2219 r = get_reg(RC_FLOAT);
2220 if (tbt == VT_DOUBLE) {
2221 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2222 /* movsd -0x10(%rsp),%xmm0 */
2223 o(0x100ff2);
2224 o(0x44 + REG_VALUE(r)*8);
2225 o(0xf024);
2226 vtop->r = r;
2227 } else if (tbt == VT_FLOAT) {
2228 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2229 /* movss -0x10(%rsp),%xmm0 */
2230 o(0x100ff3);
2231 o(0x44 + REG_VALUE(r)*8);
2232 o(0xf024);
2233 vtop->r = r;
2238 /* convert fp to int 't' type */
2239 void gen_cvt_ftoi(int t)
2241 int ft, bt, size, r;
2242 ft = vtop->type.t;
2243 bt = ft & VT_BTYPE;
2244 if (bt == VT_LDOUBLE) {
2245 gen_cvt_ftof(VT_DOUBLE);
2246 bt = VT_DOUBLE;
2249 gv(RC_FLOAT);
2250 if (t != VT_INT)
2251 size = 8;
2252 else
2253 size = 4;
2255 r = get_reg(RC_INT);
2256 if (bt == VT_FLOAT) {
2257 o(0xf3);
2258 } else if (bt == VT_DOUBLE) {
2259 o(0xf2);
2260 } else {
2261 assert(0);
2263 orex(size == 8, r, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2264 o(0xc0 + REG_VALUE(vtop->r) + REG_VALUE(r)*8);
2265 vtop->r = r;
2268 /* computed goto support */
2269 void ggoto(void)
2271 gcall_or_jmp(1);
2272 vtop--;
2275 /* Save the stack pointer onto the stack and return the location of its address */
2276 ST_FUNC void gen_vla_sp_save(int addr) {
2277 /* mov %rsp,addr(%rbp)*/
2278 gen_modrm64(0x89, TREG_RSP, VT_LOCAL, NULL, addr);
2281 /* Restore the SP from a location on the stack */
2282 ST_FUNC void gen_vla_sp_restore(int addr) {
2283 gen_modrm64(0x8b, TREG_RSP, VT_LOCAL, NULL, addr);
2286 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2287 ST_FUNC void gen_vla_alloc(CType *type, int align) {
2288 #ifdef TCC_TARGET_PE
2289 /* alloca does more than just adjust %rsp on Windows */
2290 vpush_global_sym(&func_old_type, TOK_alloca);
2291 vswap(); /* Move alloca ref past allocation size */
2292 gfunc_call(1);
2293 #else
2294 int r;
2295 r = gv(RC_INT); /* allocation size */
2296 /* sub r,%rsp */
2297 o(0x2b48);
2298 o(0xe0 | REG_VALUE(r));
2299 /* We align to 16 bytes rather than align */
2300 /* and ~15, %rsp */
2301 o(0xf0e48348);
2302 vpop();
2303 #endif
2307 /* end of x86-64 code generator */
2308 /*************************************************************/
2309 #endif /* ! TARGET_DEFS_ONLY */
2310 /******************************************************/