| commit | d7aff3ba7ea6741a33cefd492923b418a09a5540 | |
| author | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Tue, 27 Feb 2007 21:27:27 +0000 (27 21:27 +0000) | ||
| committer | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Tue, 27 Feb 2007 21:27:27 +0000 (27 21:27 +0000) | ||
| tree | 4fad45ba36b586ccf01b80fa0d7a6e5aa52ae755 | treesnapshot (tar.gz zip) |
| parent | e9b20616a057e5c3d49a70308066bfc39876810c | commitdiff |
PR target/30970
* config/i386/sse.md (*mov<mode>_internal, *movv4sf_internal,
*movv2df_internal): Enable pattern only for valid operand
combinations.
* config/i386/i386.c (ix86_modes_tieable_p): For SSE registers,
tie only 128bit modes. For MMX registers, tie only 64bit modes.
testsuite/ChangeLog:
PR target/30970
* gcc.target/i386/gfortran.dg/pr30970.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122387 138bc75d-0d04-0410-961f-82ee72b054a4
* config/i386/sse.md (*mov<mode>_internal, *movv4sf_internal,
*movv2df_internal): Enable pattern only for valid operand
combinations.
* config/i386/i386.c (ix86_modes_tieable_p): For SSE registers,
tie only 128bit modes. For MMX registers, tie only 64bit modes.
testsuite/ChangeLog:
PR target/30970
* gcc.target/i386/gfortran.dg/pr30970.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122387 138bc75d-0d04-0410-961f-82ee72b054a4