[AArch64 2/3] Add SIMD-reg variants of logical operators and/ior/xor/not
commit172881b016150e383411bfbbe8bf757bff62f22b
authoralalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4>
Fri, 19 Dec 2014 17:48:15 +0000 (19 17:48 +0000)
committeralalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4>
Fri, 19 Dec 2014 17:48:15 +0000 (19 17:48 +0000)
tree8d7747ebe7777be2fb70a60a341a6863a4ff06a5
parent936b0eabcb1fd99406ad19fa0c42fe0637d311bc
[AArch64 2/3] Add SIMD-reg variants of logical operators and/ior/xor/not

* config/aarch64/aarch64.md (<optab><mode>3, one_cmpl<mode>2):
Add SIMD-register variant.
* config/aarch64/iterators.md (Vbtype): Add value for SI.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218960 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/aarch64/aarch64.md
gcc/config/aarch64/iterators.md