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[official-gcc.git] / gcc / config / arm / arm-protos.h
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1 /* Prototypes for exported functions defined in arm.cc and pe.c
2 Copyright (C) 1999-2024 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rearnsha@arm.com)
4 Minor hacks by Nick Clifton (nickc@cygnus.com)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #ifndef GCC_ARM_PROTOS_H
23 #define GCC_ARM_PROTOS_H
25 #include "sbitmap.h"
26 #include "tree.h" /* For ERROR_MARK. */
28 rtl_opt_pass *make_pass_insert_bti (gcc::context *ctxt);
30 extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *);
31 extern int use_return_insn (int, rtx);
32 extern bool use_simple_return_p (void);
33 extern enum reg_class arm_regno_class (int);
34 extern bool arm_check_builtin_call (location_t , vec<location_t> , tree,
35 tree, unsigned int, tree *);
36 extern void arm_load_pic_register (unsigned long, rtx);
37 extern int arm_volatile_func (void);
38 extern void arm_expand_prologue (void);
39 extern void arm_expand_epilogue (bool);
40 extern void arm_declare_function_name (FILE *, const char *, tree);
41 extern void arm_asm_declare_function_name (FILE *, const char *, tree);
42 extern void thumb2_expand_return (bool);
43 extern const char *arm_strip_name_encoding (const char *);
44 extern void arm_asm_output_labelref (FILE *, const char *);
45 extern void thumb2_asm_output_opcode (FILE *);
46 extern unsigned long arm_current_func_type (void);
47 extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
48 unsigned int);
49 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
50 unsigned int);
51 extern unsigned int arm_debugger_regno (unsigned int);
52 extern void arm_output_fn_unwind (FILE *, bool);
54 extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget
55 ATTRIBUTE_UNUSED, machine_mode mode
56 ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED);
57 extern tree arm_builtin_decl (unsigned code, bool initialize_p
58 ATTRIBUTE_UNUSED);
59 extern void arm_init_builtins (void);
60 extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update);
61 extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
62 extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
63 bool high);
64 extern void arm_emit_speculation_barrier_function (void);
65 extern void arm_decompose_di_binop (rtx, rtx, rtx *, rtx *, rtx *, rtx *);
66 extern bool arm_q_bit_access (void);
67 extern bool arm_ge_bits_access (void);
68 extern bool arm_target_insn_ok_for_lob (rtx);
70 #ifdef RTX_CODE
71 enum reg_class
72 arm_mode_base_reg_class (machine_mode);
73 extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
74 rtx label_ref);
75 extern bool arm_vector_mode_supported_p (machine_mode);
76 extern bool arm_small_register_classes_for_mode_p (machine_mode);
77 extern int const_ok_for_arm (HOST_WIDE_INT);
78 extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
79 extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
80 extern void thumb1_gen_const_int_rtl (rtx, HOST_WIDE_INT);
81 extern void thumb1_gen_const_int_print (rtx, HOST_WIDE_INT);
82 extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
83 HOST_WIDE_INT, rtx, rtx, int);
84 extern int legitimate_pic_operand_p (rtx);
85 extern rtx legitimize_pic_address (rtx, machine_mode, rtx, rtx, bool);
86 extern rtx legitimize_tls_address (rtx, rtx);
87 extern bool arm_legitimate_address_p (machine_mode, rtx, bool,
88 code_helper = ERROR_MARK);
89 extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
90 extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
91 extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
92 extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
93 bool, bool);
94 extern bool clear_operation_p (rtx, bool);
95 extern int arm_const_double_rtx (rtx);
96 extern int vfp3_const_double_rtx (rtx);
97 extern int simd_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
98 extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
99 int *);
100 extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
101 int *, bool);
102 extern char *neon_output_logic_immediate (const char *, rtx *,
103 machine_mode, int, int);
104 extern char *neon_output_shift_immediate (const char *, char, rtx *,
105 machine_mode, int, bool);
106 extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
107 rtx (*) (rtx, rtx, rtx));
108 extern rtx mve_bool_vec_to_const (rtx const_vec);
109 extern rtx neon_make_constant (rtx, bool generate = true);
110 extern void neon_expand_vector_init (rtx, rtx);
111 extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
112 extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
113 extern HOST_WIDE_INT neon_element_bits (machine_mode);
114 extern void neon_emit_pair_result_insn (machine_mode,
115 rtx (*) (rtx, rtx, rtx, rtx),
116 rtx, rtx, rtx);
117 extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
118 extern void neon_split_vcombine (rtx op[3]);
119 extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx,
120 bool);
121 extern bool arm_tls_referenced_p (rtx);
123 extern int arm_coproc_mem_operand (rtx, bool);
124 extern int arm_coproc_mem_operand_no_writeback (rtx);
125 extern int arm_coproc_mem_operand_wb (rtx, int);
126 extern int neon_vector_mem_operand (rtx, int, bool);
127 extern int mve_vector_mem_operand (machine_mode, rtx, bool);
128 extern int neon_struct_mem_operand (rtx);
129 extern int mve_struct_mem_operand (rtx);
131 extern rtx *neon_vcmla_lane_prepare_operands (rtx *);
133 extern int tls_mentioned_p (rtx);
134 extern int symbol_mentioned_p (rtx);
135 extern int label_mentioned_p (rtx);
136 extern RTX_CODE minmax_code (rtx);
137 extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
138 extern int adjacent_mem_locations (rtx, rtx);
139 extern bool gen_ldm_seq (rtx *, int, bool);
140 extern bool gen_stm_seq (rtx *, int);
141 extern bool gen_const_stm_seq (rtx *, int);
142 extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
143 extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
144 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
145 extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
146 extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
147 extern bool valid_operands_ldrd_strd (rtx *, bool);
148 extern int arm_gen_cpymemqi (rtx *);
149 extern bool gen_cpymem_ldrd_strd (rtx *);
150 extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
151 extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
152 HOST_WIDE_INT);
153 extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
154 extern rtx arm_gen_return_addr_mask (void);
155 extern void arm_reload_in_hi (rtx *);
156 extern void arm_reload_out_hi (rtx *);
157 extern int arm_max_const_double_inline_cost (void);
158 extern int arm_const_double_inline_cost (rtx);
159 extern bool arm_const_double_by_parts (rtx);
160 extern bool arm_const_double_by_immediates (rtx);
161 extern rtx arm_load_function_descriptor (rtx funcdesc);
162 extern void arm_emit_call_insn (rtx, rtx, bool);
163 bool detect_cmse_nonsecure_call (tree);
164 extern const char *output_call (rtx *);
165 void arm_emit_movpair (rtx, rtx);
166 extern const char *output_mov_long_double_arm_from_arm (rtx *);
167 extern const char *output_move_double (rtx *, bool, int *count);
168 extern const char *output_move_quad (rtx *);
169 extern int arm_count_output_move_double_insns (rtx *);
170 extern int arm_count_ldrdstrd_insns (rtx *, bool);
171 extern const char *output_move_vfp (rtx *operands);
172 extern const char *output_move_neon (rtx *operands);
173 extern int arm_attr_length_move_neon (rtx_insn *);
174 extern int arm_address_offset_is_imm (rtx_insn *);
175 extern const char *output_add_immediate (rtx *);
176 extern const char *arithmetic_instr (rtx, int);
177 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
178 extern const char *output_return_instruction (rtx, bool, bool, bool);
179 extern const char *output_probe_stack_range (rtx, rtx);
180 extern void arm_poke_function_name (FILE *, const char *);
181 extern void arm_final_prescan_insn (rtx_insn *);
182 extern int arm_debugger_arg_offset (int, rtx);
183 extern bool arm_is_long_call_p (tree);
184 extern int arm_emit_vector_const (FILE *, rtx);
185 extern void arm_emit_fp16_const (rtx c);
186 extern const char * arm_output_load_gr (rtx *);
187 extern const char * arm_output_load_tpidr (rtx, bool);
188 extern const char *vfp_output_vstmd (rtx *);
189 extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
190 extern void arm_set_return_address (rtx, rtx);
191 extern int arm_eliminable_register (rtx);
192 extern const char *arm_output_shift(rtx *, int);
193 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool);
194 extern const char *arm_output_iwmmxt_tinsr (rtx *);
195 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
196 extern int arm_attr_length_push_multi(rtx, rtx);
197 extern int arm_attr_length_pop_multi(rtx *, bool, bool);
198 extern void arm_expand_compare_and_swap (rtx op[]);
199 extern void arm_split_compare_and_swap (rtx op[]);
200 extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
201 extern rtx arm_load_tp (rtx);
202 extern bool arm_coproc_builtin_available (enum unspecv);
203 extern bool arm_coproc_ldc_stc_legitimate_address (rtx);
204 extern rtx arm_stack_protect_tls_canary_mem (bool);
207 #if defined TREE_CODE
208 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
209 extern bool arm_pad_reg_upward (machine_mode, tree, int);
210 #endif
211 extern int arm_apply_result_size (void);
212 extern opt_machine_mode arm_get_mask_mode (machine_mode mode);
214 #endif /* RTX_CODE */
216 /* It's convenient to divide the built-in function codes into groups,
217 rather than having everything in a single enum. This type enumerates
218 those groups. */
219 enum arm_builtin_class
221 ARM_BUILTIN_GENERAL,
222 ARM_BUILTIN_MVE
225 /* Built-in function codes are structured so that the low
226 ARM_BUILTIN_SHIFT bits contain the arm_builtin_class
227 and the upper bits contain a group-specific subcode. */
228 const unsigned int ARM_BUILTIN_SHIFT = 1;
230 /* Mask that selects the arm part of a function code. */
231 const unsigned int ARM_BUILTIN_CLASS = (1 << ARM_BUILTIN_SHIFT) - 1;
233 /* MVE functions. */
234 namespace arm_mve {
235 void handle_arm_mve_types_h ();
236 void handle_arm_mve_h (bool);
237 tree builtin_decl (unsigned);
238 tree resolve_overloaded_builtin (location_t, unsigned int,
239 vec<tree, va_gc> *);
240 bool check_builtin_call (location_t, vec<location_t>, unsigned int,
241 tree, unsigned int, tree *);
242 gimple *gimple_fold_builtin (unsigned int code, gcall *stmt);
243 rtx expand_builtin (unsigned int, tree, rtx);
246 /* Thumb functions. */
247 extern void arm_init_expanders (void);
248 extern const char *thumb1_unexpanded_epilogue (void);
249 extern void thumb1_expand_prologue (void);
250 extern void thumb1_expand_epilogue (void);
251 extern const char *thumb1_output_interwork (void);
252 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
253 #ifdef RTX_CODE
254 extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
255 extern void thumb1_final_prescan_insn (rtx_insn *);
256 extern void thumb2_final_prescan_insn (rtx_insn *);
257 extern const char *thumb_load_double_from_address (rtx *);
258 extern const char *thumb_output_move_mem_multiple (int, rtx *);
259 extern const char *thumb_call_via_reg (rtx);
260 extern void thumb_expand_cpymemqi (rtx *);
261 extern rtx arm_return_addr (int, rtx);
262 extern void thumb_reload_out_hi (rtx *);
263 extern void thumb_set_return_address (rtx, rtx);
264 extern const char *arm_output_casesi (rtx *);
265 extern const char *thumb1_output_casesi (rtx *);
266 extern const char *thumb2_output_casesi (rtx *);
267 #endif
269 /* Defined in pe.c. */
270 extern int arm_dllexport_name_p (const char *);
271 extern int arm_dllimport_name_p (const char *);
273 #ifdef TREE_CODE
274 extern void arm_pe_unique_section (tree, int);
275 extern void arm_pe_encode_section_info (tree, rtx, int);
276 extern int arm_dllexport_p (tree);
277 extern int arm_dllimport_p (tree);
278 extern void arm_mark_dllexport (tree);
279 extern void arm_mark_dllimport (tree);
280 extern bool arm_change_mode_p (tree);
281 #endif
283 extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
284 struct gcc_options *);
285 extern void arm_configure_build_target (struct arm_build_target *,
286 struct cl_target_option *, bool);
287 extern void arm_option_reconfigure_globals (void);
288 extern void arm_options_perform_arch_sanity_checks (void);
289 extern void arm_pr_long_calls (struct cpp_reader *);
290 extern void arm_pr_no_long_calls (struct cpp_reader *);
291 extern void arm_pr_long_calls_off (struct cpp_reader *);
293 extern const char *arm_mangle_type (const_tree);
294 extern const char *arm_mangle_builtin_type (const_tree);
296 extern void arm_order_regs_for_local_alloc (void);
298 extern int arm_max_conditional_execute ();
300 /* Vectorizer cost model implementation. */
301 struct cpu_vec_costs {
302 const int scalar_stmt_cost; /* Cost of any scalar operation, excluding
303 load and store. */
304 const int scalar_load_cost; /* Cost of scalar load. */
305 const int scalar_store_cost; /* Cost of scalar store. */
306 const int vec_stmt_cost; /* Cost of any vector operation, excluding
307 load, store, vector-to-scalar and
308 scalar-to-vector operation. */
309 const int vec_to_scalar_cost; /* Cost of vect-to-scalar operation. */
310 const int scalar_to_vec_cost; /* Cost of scalar-to-vector operation. */
311 const int vec_align_load_cost; /* Cost of aligned vector load. */
312 const int vec_unalign_load_cost; /* Cost of unaligned vector load. */
313 const int vec_unalign_store_cost; /* Cost of unaligned vector load. */
314 const int vec_store_cost; /* Cost of vector store. */
315 const int cond_taken_branch_cost; /* Cost of taken branch for vectorizer
316 cost model. */
317 const int cond_not_taken_branch_cost;/* Cost of not taken branch for
318 vectorizer cost model. */
321 #ifdef RTX_CODE
322 /* This needs to be here because we need RTX_CODE and similar. */
324 struct cpu_cost_table;
326 /* Addressing mode operations. Used to index tables in struct
327 addr_mode_cost_table. */
328 enum arm_addr_mode_op
330 AMO_DEFAULT,
331 AMO_NO_WB, /* Offset with no writeback. */
332 AMO_WB, /* Offset with writeback. */
333 AMO_MAX /* For array size. */
336 /* Table of additional costs in units of COSTS_N_INSNS() when using
337 addressing modes for each access type. */
338 struct addr_mode_cost_table
340 const int integer[AMO_MAX];
341 const int fp[AMO_MAX];
342 const int vector[AMO_MAX];
345 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
346 structure is modified. */
348 struct tune_params
350 const struct cpu_cost_table *insn_extra_cost;
351 const struct addr_mode_cost_table *addr_mode_costs;
352 bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
353 int (*branch_cost) (bool, bool);
354 /* Vectorizer costs. */
355 const struct cpu_vec_costs* vec_costs;
356 int constant_limit;
357 /* Maximum number of instructions to conditionalise. */
358 int max_insns_skipped;
359 /* Maximum number of instructions to inline calls to memset. */
360 int max_insns_inline_memset;
361 /* Issue rate of the processor. */
362 unsigned int issue_rate;
363 /* Explicit prefetch data. */
364 struct
366 int num_slots;
367 int l1_cache_size;
368 int l1_cache_line_size;
369 } prefetch;
370 enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
371 prefer_constant_pool: 1;
372 /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM. */
373 enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
374 /* The preference for non short cirtcuit operation when optimizing for
375 performance. The first element covers Thumb state and the second one
376 is for ARM state. */
377 enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
378 LOG_OP_NON_SHORT_CIRCUIT_TRUE};
379 log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
380 log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
381 /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding. */
382 enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
383 disparage_flag_setting_t16_encodings: 2;
384 /* Prefer to inline string operations like memset by using Neon. */
385 enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
386 string_ops_prefer_neon: 1;
387 /* Bitfield encoding the fusible pairs of instructions. Use FUSE_OPS
388 in an initializer if multiple fusion operations are supported on a
389 target. */
390 enum fuse_ops
392 FUSE_NOTHING = 0,
393 FUSE_MOVW_MOVT = 1 << 0,
394 FUSE_AES_AESMC = 1 << 1
395 } fusible_ops: 2;
396 /* Depth of scheduling queue to check for L2 autoprefetcher. */
397 enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
398 sched_autopref: 2;
401 /* Smash multiple fusion operations into a type that can be used for an
402 initializer. */
403 #define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
405 extern const struct tune_params *current_tune;
406 extern int vfp3_const_double_for_fract_bits (rtx);
407 /* return power of two from operand, otherwise 0. */
408 extern int vfp3_const_double_for_bits (rtx);
410 extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
411 rtx);
412 extern bool arm_fusion_enabled_p (tune_params::fuse_ops);
413 extern bool arm_current_function_pac_enabled_p (void);
414 extern bool arm_valid_symbolic_address_p (rtx);
415 extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
416 extern bool arm_expand_vector_compare (rtx, rtx_code, rtx, rtx, bool);
417 #endif /* RTX_CODE */
419 extern bool arm_gen_setmem (rtx *);
420 extern void arm_expand_vcond (rtx *, machine_mode);
421 extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
423 extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
425 extern void arm_emit_eabi_attribute (const char *, int, int);
427 extern void arm_reset_previous_fndecl (void);
428 extern void save_restore_target_globals (tree);
430 /* Defined in gcc/common/config/arm-common.cc. */
431 extern const char *arm_rewrite_selected_cpu (const char *name);
433 /* Defined in gcc/common/config/arm-c.cc. */
434 extern void arm_lang_object_attributes_init (void);
435 extern void arm_register_target_pragmas (void);
436 extern void arm_cpu_cpp_builtins (struct cpp_reader *);
438 extern bool arm_is_constant_pool_ref (rtx);
440 /* The bits in this mask specify which instruction scheduling options should
441 be used. */
442 extern unsigned int tune_flags;
444 /* Nonzero if this chip supports the ARM Architecture 4 extensions. */
445 extern int arm_arch4;
447 /* Nonzero if this chip supports the ARM Architecture 4t extensions. */
448 extern int arm_arch4t;
450 /* Nonzero if this chip supports the ARM Architecture 5t extensions. */
451 extern int arm_arch5t;
453 /* Nonzero if this chip supports the ARM Architecture 5te extensions. */
454 extern int arm_arch5te;
456 /* Nonzero if this chip supports the ARM Architecture 6 extensions. */
457 extern int arm_arch6;
459 /* Nonzero if this chip supports the ARM 6K extensions. */
460 extern int arm_arch6k;
462 /* Nonzero if this chip supports the ARM 6KZ extensions. */
463 extern int arm_arch6kz;
465 /* Nonzero if instructions present in ARMv6-M can be used. */
466 extern int arm_arch6m;
468 /* Nonzero if this chip supports the ARM 7 extensions. */
469 extern int arm_arch7;
471 /* Nonzero if this chip supports the Large Physical Address Extension. */
472 extern int arm_arch_lpae;
474 /* Nonzero if instructions not present in the 'M' profile can be used. */
475 extern int arm_arch_notm;
477 /* Nonzero if instructions present in ARMv7E-M can be used. */
478 extern int arm_arch7em;
480 /* Nonzero if instructions present in ARMv8 can be used. */
481 extern int arm_arch8;
483 /* Nonzero if this chip can benefit from load scheduling. */
484 extern int arm_ld_sched;
486 /* Nonzero if this chip is a StrongARM. */
487 extern int arm_tune_strongarm;
489 /* Nonzero if this chip supports Intel Wireless MMX technology. */
490 extern int arm_arch_iwmmxt;
492 /* Nonzero if this chip supports Intel Wireless MMX2 technology. */
493 extern int arm_arch_iwmmxt2;
495 /* Nonzero if this chip is an XScale. */
496 extern int arm_arch_xscale;
498 /* Nonzero if tuning for XScale */
499 extern int arm_tune_xscale;
501 /* Nonzero if we want to tune for stores that access the write-buffer.
502 This typically means an ARM6 or ARM7 with MMU or MPU. */
503 extern int arm_tune_wbuf;
505 /* Nonzero if tuning for Cortex-A9. */
506 extern int arm_tune_cortex_a9;
508 /* Nonzero if we should define __THUMB_INTERWORK__ in the
509 preprocessor.
510 XXX This is a bit of a hack, it's intended to help work around
511 problems in GLD which doesn't understand that armv5t code is
512 interworking clean. */
513 extern int arm_cpp_interwork;
515 /* Nonzero if chip supports Thumb 1. */
516 extern int arm_arch_thumb1;
518 /* Nonzero if chip supports Thumb 2. */
519 extern int arm_arch_thumb2;
521 /* Nonzero if chip supports integer division instruction. */
522 extern int arm_arch_arm_hwdiv;
523 extern int arm_arch_thumb_hwdiv;
525 /* Nonzero if chip disallows volatile memory access in IT block. */
526 extern int arm_arch_no_volatile_ce;
528 /* Structure defining the current overall architectural target and tuning. */
529 struct arm_build_target
531 /* Name of the target CPU, if known, or NULL if the target CPU was not
532 specified by the user (and inferred from the -march option). */
533 const char *core_name;
534 /* Name of the target ARCH. NULL if there is a selected CPU. */
535 const char *arch_name;
536 /* Preprocessor substring (never NULL). */
537 const char *arch_pp_name;
538 /* The base architecture value. */
539 enum base_architecture base_arch;
540 /* The profile letter for the architecture, upper case by convention. */
541 char profile;
542 /* Bitmap encapsulating the isa_bits for the target environment. */
543 sbitmap isa;
544 /* Flags used for tuning. Long term, these move into tune_params. */
545 unsigned int tune_flags;
546 /* Tables with more detailed tuning information. */
547 const struct tune_params *tune;
548 /* CPU identifier for the tuning target. */
549 enum processor_type tune_core;
552 extern struct arm_build_target arm_active_target;
554 /* Table entry for a CPU alias. */
555 struct cpu_alias
557 /* The alias name. */
558 const char *const name;
559 /* True if the name should be displayed in help text listing cpu names. */
560 bool visible;
563 /* Table entry for an architectural feature extension. */
564 struct cpu_arch_extension
566 /* Feature name. */
567 const char *const name;
568 /* True if the option is negative (removes extensions). */
569 bool remove;
570 /* True if the option is an alias for another option with identical effect;
571 the option will be ignored for canonicalization. */
572 bool alias;
573 /* The modifier bits. */
574 const enum isa_feature isa_bits[isa_num_bits];
577 /* Common elements of both CPU and architectural options. */
578 struct cpu_arch_option
580 /* Name for this option. */
581 const char *name;
582 /* List of feature extensions permitted. */
583 const struct cpu_arch_extension *extensions;
584 /* Standard feature bits. */
585 enum isa_feature isa_bits[isa_num_bits];
588 /* Table entry for an architecture entry. */
589 struct arch_option
591 /* Common option fields. */
592 cpu_arch_option common;
593 /* Short string for this architecture. */
594 const char *arch;
595 /* Base architecture, from which this specific architecture is derived. */
596 enum base_architecture base_arch;
597 /* The profile letter for the architecture, upper case by convention. */
598 const char profile;
599 /* Default tune target (in the absence of any more specific data). */
600 enum processor_type tune_id;
603 /* Table entry for a CPU entry. */
604 struct cpu_option
606 /* Common option fields. */
607 cpu_arch_option common;
608 /* List of aliases for this CPU. */
609 const struct cpu_alias *aliases;
610 /* Architecture upon which this CPU is based. */
611 enum arch_type arch;
614 extern const arch_option all_architectures[];
615 extern const cpu_option all_cores[];
618 const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *,
619 const char *, bool = true);
620 const arch_option *arm_parse_arch_option_name (const arch_option *,
621 const char *, const char *, bool = true);
622 void arm_parse_option_features (sbitmap, const cpu_arch_option *,
623 const char *);
625 void arm_initialize_isa (sbitmap, const enum isa_feature *);
627 const char * arm_gen_far_branch (rtx *, int, const char * , const char *);
629 bool arm_mve_immediate_check(rtx, machine_mode, bool);
630 #endif /* ! GCC_ARM_PROTOS_H */