| commit | 2ef88a30f49f7f80444f48134091d7e658ce0056 | |
| author | jethead71 <jethead71@a1c6a512-1295-4272-9138-f99709370657> | |
| Tue, 4 May 2010 10:07:53 +0000 (4 10:07 +0000) | ||
| committer | jethead71 <jethead71@a1c6a512-1295-4272-9138-f99709370657> | |
| Tue, 4 May 2010 10:07:53 +0000 (4 10:07 +0000) | ||
| tree | 72a073d7ec3ede9554b394887d43d19fda6e8177 | treesnapshot (tar.gz zip) |
| parent | 2918cf1d235940710ab290d06d689f2cd6a69b11 | commitdiff |
i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25800 a1c6a512-1295-4272-9138-f99709370657
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25800 a1c6a512-1295-4272-9138-f99709370657