more improvements.
commit47a1a1c2cd5b238e2aecbccfdbdd4ad8365be46d
authorRodrigo Peixoto <rodrigopex@urano.(none)>
Sun, 20 Apr 2008 11:48:36 +0000 (20 08:48 -0300)
committerRodrigo Peixoto <rodrigopex@urano.(none)>
Sun, 20 Apr 2008 11:48:36 +0000 (20 08:48 -0300)
treee80435ff35bbaae4309b5e10c51527e1845bf20e
parent1a84fe6928d29dd9e12783004341c434604a92f6
more improvements.
26 files changed:
src/example5.vut
src/example6.vut [copied from src/example5.vut with 84% similarity]
src/examples/register/.register8b.vut.swp [moved from src/.utils.py.swp with 50% similarity]
src/examples/register/register8b.vut [new file with mode: 0644]
src/gen/b.mem [deleted file]
src/gen/fulladder.v [deleted file]
src/gen/makefile
src/gen/overflow.mem [deleted file]
src/gen/result.mem [deleted file]
src/gen/verilog.log
src/gen/vut_fulladder.v [deleted file]
src/gen/waveform.vcd [deleted file]
src/overflow.py
src/overflow.pyc
src/tags
src/utils.py
src/utils.pyc
src/vut_checker.py
src/vut_checker.pyc
src/vut_front_end.py
src/vut_front_end.pyc
src/vut_generator.py
src/vut_generator.pyc
src/vut_parser.py
src/vut_parser.pyc
src/vutg