bitops.vhd

   1 library ieee;
   2     use ieee.std_logic_1164.all;
   3     use ieee.std_logic_arith.all;
   4     use ieee.std_logic_unsigned.all;
   5
   6 entity bitops is
   7     port(
   8         a :  in std_logic_vector(3 downto 0);
   9         b :  in std_logic_vector(3 downto 0);
  10         c : out std_logic_vector(3 downto 0);
  11         d : out std_logic_vector(3 downto 0);
  12         e : out std_logic_vector(3 downto 0);
  13         f : out std_logic_vector(3 downto 0);
  14         g : out std_logic_vector(3 downto 0);
  15         h : out std_logic_vector(3 downto 0);
  16         i : out std_logic_vector(3 downto 0);
  17         j : out std_logic_vector(3 downto 0);
  18         k : out std_logic_vector(3 downto 0)
  19         );
  20 end bitops;
  21
  22 architecture behav of bitops is
  23 begin
  24     c <= a and b;
  25     d <= a xor b;
  26     e <= not a;
  27     f <= a or b;
  28     g <= a nor b;
  29     h <= a nand b;
  30     i <= a xnor b;
  31     j <= b(3) & a(1 downto 0) & '1';    -- concatentation
  32     k <= b(2 downto 1) & b(2 downto 1);    -- replication
  33 end behav;