usr/src/uts/common/io/ixgbe/ixgbe_osdep.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21
  22 /*
  23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
  24  */
  25
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  */
  29 /*
  30  * Copyright (c) 2017, Joyent, Inc.
  31  * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
  32  */
  33
  34 #ifndef _IXGBE_OSDEP_H
  35 #define _IXGBE_OSDEP_H
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39 #endif
  40
  41 #include <sys/types.h>
  42 #include <sys/byteorder.h>
  43 #include <sys/conf.h>
  44 #include <sys/debug.h>
  45 #include <sys/stropts.h>
  46 #include <sys/stream.h>
  47 #include <sys/strlog.h>
  48 #include <sys/kmem.h>
  49 #include <sys/stat.h>
  50 #include <sys/kstat.h>
  51 #include <sys/modctl.h>
  52 #include <sys/errno.h>
  53 #include <sys/ddi.h>
  54 #include <sys/dditypes.h>
  55 #include <sys/sunddi.h>
  56 #include <sys/pci.h>
  57 #include <sys/atomic.h>
  58 #include <sys/note.h>
  59 #include "ixgbe_debug.h"
  60
  61 /* Cheesy hack for EWARN() */
  62 #define EWARN(H, W, S) cmn_err(CE_NOTE, W)
  63
  64 /* function declarations */
  65 struct ixgbe_hw;
  66 uint16_t ixgbe_read_pci_cfg(struct ixgbe_hw *, uint32_t);
  67 void ixgbe_write_pci_cfg(struct ixgbe_hw *, uint32_t, uint32_t);
  68 boolean_t ixgbe_removed(struct ixgbe_hw *);
  69
  70 #define usec_delay(x)           drv_usecwait(x)
  71 #define msec_delay(x)           drv_usecwait(x * 1000)
  72
  73 #define OS_DEP(hw)              ((struct ixgbe_osdep *)((hw)->back))
  74
  75 #define false           B_FALSE
  76 #define true            B_TRUE
  77 #define FALSE           B_FALSE
  78 #define TRUE            B_TRUE
  79
  80 #define IXGBE_READ_PCIE_WORD    ixgbe_read_pci_cfg
  81 #define IXGBE_WRITE_PCIE_WORD   ixgbe_write_pci_cfg
  82 #define CMD_MEM_WRT_INVALIDATE  0x0010  /* BIT_4 */
  83 #define PCI_COMMAND_REGISTER    0x04
  84 #define PCI_EX_CONF_CAP         0xE0
  85 #define SPEED_10GB              10000
  86 #define SPEED_5GB               5000
  87 #define SPEED_2_5GB             2500
  88 #define SPEED_1GB               1000
  89 #define SPEED_100               100
  90 #define FULL_DUPLEX             2
  91
  92 #define IXGBE_WRITE_FLUSH(a)    (void) IXGBE_READ_REG(a, IXGBE_STATUS)
  93
  94 #define IXGBE_WRITE_REG(a, reg, value)  \
  95         ddi_put32((OS_DEP(a))->reg_handle, \
  96             (uint32_t *)((uintptr_t)(a)->hw_addr + reg), (value))
  97
  98 #define IXGBE_WRITE_REG_ARRAY(a, reg, index, value)     \
  99         IXGBE_WRITE_REG(a, ((reg) + ((index) << 2)), (value))
 100
 101 #define IXGBE_READ_REG(a, reg)  \
 102         ddi_get32((OS_DEP(a))->reg_handle, \
 103             (uint32_t *)((uintptr_t)(a)->hw_addr + reg))
 104
 105 #define IXGBE_READ_REG_ARRAY(a, reg, index)     \
 106         IXGBE_READ_REG(a, ((reg) + ((index) << 2)))
 107
 108 #define msec_delay_irq  msec_delay
 109 #define IXGBE_HTONL     htonl
 110 #define IXGBE_NTOHL     ntohl
 111 #define IXGBE_NTOHS     ntohs
 112
 113 #ifdef _BIG_ENDIAN
 114 #define IXGBE_CPU_TO_LE32       BSWAP_32
 115 #define IXGBE_LE32_TO_CPUS      BSWAP_32
 116 #define IXGBE_CPU_TO_BE16(x)    (x)
 117 #define IXGBE_CPU_TO_BE32(x)    (x)
 118 #else
 119 #define IXGBE_CPU_TO_LE32(x)    (x)
 120 #define IXGBE_LE32_TO_CPUS(x)   (x)
 121 #define IXGBE_CPU_TO_BE16       BSWAP_16
 122 #define IXGBE_CPU_TO_BE32       BSWAP_32
 123 #endif /* _BIG_ENDIAN */
 124
 125 #define UNREFERENCED_PARAMETER(x)               _NOTE(ARGUNUSED(x))
 126 #define UNREFERENCED_1PARAMETER(_p)             UNREFERENCED_PARAMETER(_p)
 127 #define UNREFERENCED_2PARAMETER(_p, _q)         _NOTE(ARGUNUSED(_p, _q))
 128 #define UNREFERENCED_3PARAMETER(_p, _q, _r)     _NOTE(ARGUNUSED(_p, _q, _r))
 129 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) _NOTE(ARGUNUSED(_p, _q,_r, _s))
 130
 131
 132 #define IXGBE_REMOVED(hw) ixgbe_removed(hw)
 133
 134 typedef int8_t          s8;
 135 typedef int16_t         s16;
 136 typedef int32_t         s32;
 137 typedef int64_t         s64;
 138 typedef uint8_t         u8;
 139 typedef uint16_t        u16;
 140 typedef uint32_t        u32;
 141 typedef uint64_t        u64;
 142 typedef boolean_t       bool;
 143
 144 /* shared code requires this */
 145 #define __le16  u16
 146 #define __le32  u32
 147 #define __le64  u64
 148 #define __be16  u16
 149 #define __be32  u32
 150 #define __be64  u64
 151
 152 struct ixgbe_osdep {
 153         ddi_acc_handle_t reg_handle;
 154         ddi_acc_handle_t cfg_handle;
 155         struct ixgbe *ixgbe;
 156 };
 157
 158 #ifdef __cplusplus
 159 }
 160 #endif
 161
 162 #endif  /* _IXGBE_OSDEP_H */