4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
29 * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
30 * Copyright (c) 2017, Joyent, Inc.
36 * Bring the device out of the reset/quiesced state that it
37 * was in when the interface was registered.
40 ixgbe_m_start(void *arg
)
42 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
44 mutex_enter(&ixgbe
->gen_lock
);
46 if (ixgbe
->ixgbe_state
& IXGBE_SUSPENDED
) {
47 mutex_exit(&ixgbe
->gen_lock
);
51 if (ixgbe_start(ixgbe
, B_TRUE
) != IXGBE_SUCCESS
) {
52 mutex_exit(&ixgbe
->gen_lock
);
56 atomic_or_32(&ixgbe
->ixgbe_state
, IXGBE_STARTED
);
58 mutex_exit(&ixgbe
->gen_lock
);
61 * Enable and start the watchdog timer
63 ixgbe_enable_watchdog_timer(ixgbe
);
69 * Stop the device and put it in a reset/quiesced state such
70 * that the interface can be unregistered.
73 ixgbe_m_stop(void *arg
)
75 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
77 mutex_enter(&ixgbe
->gen_lock
);
79 if (ixgbe
->ixgbe_state
& IXGBE_SUSPENDED
) {
80 mutex_exit(&ixgbe
->gen_lock
);
84 atomic_and_32(&ixgbe
->ixgbe_state
, ~IXGBE_STARTED
);
86 ixgbe_stop(ixgbe
, B_TRUE
);
88 mutex_exit(&ixgbe
->gen_lock
);
91 * Disable and stop the watchdog timer
93 ixgbe_disable_watchdog_timer(ixgbe
);
97 * Set the promiscuity of the device.
100 ixgbe_m_promisc(void *arg
, boolean_t on
)
102 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
104 struct ixgbe_hw
*hw
= &ixgbe
->hw
;
106 mutex_enter(&ixgbe
->gen_lock
);
108 if (ixgbe
->ixgbe_state
& IXGBE_SUSPENDED
) {
109 mutex_exit(&ixgbe
->gen_lock
);
112 reg_val
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
115 reg_val
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
117 reg_val
&= (~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
));
119 IXGBE_WRITE_REG(&ixgbe
->hw
, IXGBE_FCTRL
, reg_val
);
121 mutex_exit(&ixgbe
->gen_lock
);
127 * Add/remove the addresses to/from the set of multicast
128 * addresses for which the device will receive packets.
131 ixgbe_m_multicst(void *arg
, boolean_t add
, const uint8_t *mcst_addr
)
133 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
136 mutex_enter(&ixgbe
->gen_lock
);
138 if (ixgbe
->ixgbe_state
& IXGBE_SUSPENDED
) {
139 mutex_exit(&ixgbe
->gen_lock
);
143 result
= (add
) ? ixgbe_multicst_add(ixgbe
, mcst_addr
)
144 : ixgbe_multicst_remove(ixgbe
, mcst_addr
);
146 mutex_exit(&ixgbe
->gen_lock
);
152 * Pass on M_IOCTL messages passed to the DLD, and support
153 * private IOCTLs for debugging and ndd.
156 ixgbe_m_ioctl(void *arg
, queue_t
*q
, mblk_t
*mp
)
158 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
160 enum ioc_reply status
;
162 iocp
= (struct iocblk
*)(uintptr_t)mp
->b_rptr
;
165 mutex_enter(&ixgbe
->gen_lock
);
166 if (ixgbe
->ixgbe_state
& IXGBE_SUSPENDED
) {
167 mutex_exit(&ixgbe
->gen_lock
);
168 miocnak(q
, mp
, 0, EINVAL
);
171 mutex_exit(&ixgbe
->gen_lock
);
173 switch (iocp
->ioc_cmd
) {
174 case LB_GET_INFO_SIZE
:
178 status
= ixgbe_loopback_ioctl(ixgbe
, iocp
, mp
);
187 * Decide how to reply
193 * Error, reply with a NAK and EINVAL or the specified error
195 miocnak(q
, mp
, 0, iocp
->ioc_error
== 0 ?
196 EINVAL
: iocp
->ioc_error
);
201 * OK, reply already sent
207 * OK, reply with an ACK
209 miocack(q
, mp
, 0, 0);
214 * OK, send prepared reply as ACK or NAK
216 mp
->b_datap
->db_type
= iocp
->ioc_error
== 0 ?
224 ixgbe_led_set(void *arg
, mac_led_mode_t mode
, uint_t flags
)
226 ixgbe_t
*ixgbe
= arg
;
227 struct ixgbe_hw
*hw
= &ixgbe
->hw
;
228 uint32_t lidx
= ixgbe
->ixgbe_led_index
;
233 if (mode
!= MAC_LED_DEFAULT
&&
234 mode
!= MAC_LED_IDENT
&&
235 mode
!= MAC_LED_OFF
&&
239 if (ixgbe
->ixgbe_led_blink
&& mode
!= MAC_LED_IDENT
) {
240 if (ixgbe_blink_led_stop(hw
, lidx
) != IXGBE_SUCCESS
) {
243 ixgbe
->ixgbe_led_blink
= B_FALSE
;
246 if (mode
!= MAC_LED_DEFAULT
&& !ixgbe
->ixgbe_led_active
) {
247 ixgbe
->ixgbe_led_reg
= IXGBE_READ_REG(hw
, IXGBE_LEDCTL
);
248 ixgbe
->ixgbe_led_active
= B_TRUE
;
252 case MAC_LED_DEFAULT
:
253 if (ixgbe
->ixgbe_led_active
) {
254 IXGBE_WRITE_REG(hw
, IXGBE_LEDCTL
, ixgbe
->ixgbe_led_reg
);
255 ixgbe
->ixgbe_led_active
= B_FALSE
;
259 if (ixgbe_blink_led_start(hw
, lidx
) != IXGBE_SUCCESS
)
261 ixgbe
->ixgbe_led_blink
= B_TRUE
;
264 if (ixgbe_led_off(hw
, lidx
) != IXGBE_SUCCESS
)
268 if (ixgbe_led_on(hw
, lidx
) != IXGBE_SUCCESS
)
279 * Obtain the MAC's capabilities and associated data from
283 ixgbe_m_getcapab(void *arg
, mac_capab_t cap
, void *cap_data
)
285 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
288 case MAC_CAPAB_HCKSUM
: {
289 uint32_t *tx_hcksum_flags
= cap_data
;
292 * We advertise our capabilities only if tx hcksum offload is
293 * enabled. On receive, the stack will accept checksummed
294 * packets anyway, even if we haven't said we can deliver
297 if (!ixgbe
->tx_hcksum_enable
)
300 *tx_hcksum_flags
= HCKSUM_INET_PARTIAL
| HCKSUM_IPHDRCKSUM
;
303 case MAC_CAPAB_LSO
: {
304 mac_capab_lso_t
*cap_lso
= cap_data
;
306 if (ixgbe
->lso_enable
) {
307 cap_lso
->lso_flags
= LSO_TX_BASIC_TCP_IPV4
;
308 cap_lso
->lso_basic_tcp_ipv4
.lso_max
= IXGBE_LSO_MAXLEN
;
314 case MAC_CAPAB_RINGS
: {
315 mac_capab_rings_t
*cap_rings
= cap_data
;
317 switch (cap_rings
->mr_type
) {
318 case MAC_RING_TYPE_RX
:
319 cap_rings
->mr_group_type
= MAC_GROUP_TYPE_STATIC
;
320 cap_rings
->mr_rnum
= ixgbe
->num_rx_rings
;
321 cap_rings
->mr_gnum
= ixgbe
->num_rx_groups
;
322 cap_rings
->mr_rget
= ixgbe_fill_ring
;
323 cap_rings
->mr_gget
= ixgbe_fill_group
;
324 cap_rings
->mr_gaddring
= NULL
;
325 cap_rings
->mr_gremring
= NULL
;
327 case MAC_RING_TYPE_TX
:
328 cap_rings
->mr_group_type
= MAC_GROUP_TYPE_STATIC
;
329 cap_rings
->mr_rnum
= ixgbe
->num_tx_rings
;
330 cap_rings
->mr_gnum
= 0;
331 cap_rings
->mr_rget
= ixgbe_fill_ring
;
332 cap_rings
->mr_gget
= NULL
;
339 case MAC_CAPAB_TRANSCEIVER
: {
340 mac_capab_transceiver_t
*mct
= cap_data
;
343 * Rather than try and guess based on the media type whether or
344 * not we have a transceiver we can read, we instead will let
345 * the actual function calls figure that out for us.
348 mct
->mct_ntransceivers
= 1;
349 mct
->mct_info
= ixgbe_transceiver_info
;
350 mct
->mct_read
= ixgbe_transceiver_read
;
353 case MAC_CAPAB_LED
: {
354 mac_capab_led_t
*mcl
= cap_data
;
357 mcl
->mcl_modes
= MAC_LED_DEFAULT
| MAC_LED_ON
| MAC_LED_OFF
|
359 mcl
->mcl_set
= ixgbe_led_set
;
370 ixgbe_m_setprop(void *arg
, const char *pr_name
, mac_prop_id_t pr_num
,
371 uint_t pr_valsize
, const void *pr_val
)
373 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
374 struct ixgbe_hw
*hw
= &ixgbe
->hw
;
376 uint32_t flow_control
;
377 uint32_t cur_mtu
, new_mtu
;
380 ixgbe_link_speed speeds
= 0;
382 mutex_enter(&ixgbe
->gen_lock
);
383 if (ixgbe
->ixgbe_state
& IXGBE_SUSPENDED
) {
384 mutex_exit(&ixgbe
->gen_lock
);
389 * We cannot always rely on the common code maintaining
390 * hw->phy.speeds_supported, therefore we fall back to use the recorded
391 * supported speeds which were obtained during instance init in
392 * ixgbe_init_params().
394 speeds
= hw
->phy
.speeds_supported
;
396 speeds
= ixgbe
->speeds_supported
;
398 if (ixgbe
->loopback_mode
!= IXGBE_LB_NONE
&&
399 ixgbe_param_locked(pr_num
)) {
401 * All en_* parameters are locked (read-only)
402 * while the device is in any sort of loopback mode.
404 mutex_exit(&ixgbe
->gen_lock
);
409 * We allow speed changes only on baseT PHYs. MAC_PROP_EN_* are marked
410 * read-only on non-baseT PHYs.
413 case MAC_PROP_EN_10GFDX_CAP
:
414 if (hw
->phy
.media_type
== ixgbe_media_type_copper
&&
415 speeds
& IXGBE_LINK_SPEED_10GB_FULL
) {
416 ixgbe
->param_en_10000fdx_cap
= *(uint8_t *)pr_val
;
422 case MAC_PROP_EN_5000FDX_CAP
:
423 if (hw
->phy
.media_type
== ixgbe_media_type_copper
&&
424 speeds
& IXGBE_LINK_SPEED_5GB_FULL
) {
425 ixgbe
->param_en_5000fdx_cap
= *(uint8_t *)pr_val
;
431 case MAC_PROP_EN_2500FDX_CAP
:
432 if (hw
->phy
.media_type
== ixgbe_media_type_copper
&&
433 speeds
& IXGBE_LINK_SPEED_2_5GB_FULL
) {
434 ixgbe
->param_en_2500fdx_cap
= *(uint8_t *)pr_val
;
440 case MAC_PROP_EN_1000FDX_CAP
:
441 if (hw
->phy
.media_type
== ixgbe_media_type_copper
&&
442 speeds
& IXGBE_LINK_SPEED_1GB_FULL
) {
443 ixgbe
->param_en_1000fdx_cap
= *(uint8_t *)pr_val
;
449 case MAC_PROP_EN_100FDX_CAP
:
450 if (hw
->phy
.media_type
== ixgbe_media_type_copper
&&
451 speeds
& IXGBE_LINK_SPEED_100_FULL
) {
452 ixgbe
->param_en_100fdx_cap
= *(uint8_t *)pr_val
;
458 case MAC_PROP_AUTONEG
:
459 if (ixgbe
->hw
.phy
.media_type
!= ixgbe_media_type_copper
) {
463 ixgbe
->param_adv_autoneg_cap
= *(uint8_t *)pr_val
;
466 case MAC_PROP_FLOWCTRL
:
467 bcopy(pr_val
, &flow_control
, sizeof (flow_control
));
469 switch (flow_control
) {
473 case LINK_FLOWCTRL_NONE
:
474 hw
->fc
.requested_mode
= ixgbe_fc_none
;
476 case LINK_FLOWCTRL_RX
:
477 hw
->fc
.requested_mode
= ixgbe_fc_rx_pause
;
479 case LINK_FLOWCTRL_TX
:
480 hw
->fc
.requested_mode
= ixgbe_fc_tx_pause
;
482 case LINK_FLOWCTRL_BI
:
483 hw
->fc
.requested_mode
= ixgbe_fc_full
;
488 if (ixgbe_driver_setup_link(ixgbe
, B_TRUE
) !=
493 case MAC_PROP_ADV_10GFDX_CAP
:
494 case MAC_PROP_ADV_5000FDX_CAP
:
495 case MAC_PROP_ADV_2500FDX_CAP
:
496 case MAC_PROP_ADV_1000FDX_CAP
:
497 case MAC_PROP_ADV_100FDX_CAP
:
498 case MAC_PROP_STATUS
:
500 case MAC_PROP_DUPLEX
:
501 err
= ENOTSUP
; /* read-only prop. Can't set this. */
504 cur_mtu
= ixgbe
->default_mtu
;
505 bcopy(pr_val
, &new_mtu
, sizeof (new_mtu
));
506 if (new_mtu
== cur_mtu
) {
511 if (new_mtu
< DEFAULT_MTU
|| new_mtu
> ixgbe
->capab
->max_mtu
) {
516 if (ixgbe
->ixgbe_state
& IXGBE_STARTED
) {
521 err
= mac_maxsdu_update(ixgbe
->mac_hdl
, new_mtu
);
523 ixgbe
->default_mtu
= new_mtu
;
524 ixgbe
->max_frame_size
= ixgbe
->default_mtu
+
525 sizeof (struct ether_vlan_header
) + ETHERFCSL
;
530 rx_size
= ixgbe
->max_frame_size
+ IPHDR_ALIGN_ROOM
;
531 ixgbe
->rx_buf_size
= ((rx_size
>> 10) + ((rx_size
&
532 (((uint32_t)1 << 10) - 1)) > 0 ? 1 : 0)) << 10;
537 tx_size
= ixgbe
->max_frame_size
;
538 ixgbe
->tx_buf_size
= ((tx_size
>> 10) + ((tx_size
&
539 (((uint32_t)1 << 10) - 1)) > 0 ? 1 : 0)) << 10;
542 case MAC_PROP_PRIVATE
:
543 err
= ixgbe_set_priv_prop(ixgbe
, pr_name
, pr_valsize
, pr_val
);
549 mutex_exit(&ixgbe
->gen_lock
);
554 ixgbe_m_getprop(void *arg
, const char *pr_name
, mac_prop_id_t pr_num
,
555 uint_t pr_valsize
, void *pr_val
)
557 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
558 struct ixgbe_hw
*hw
= &ixgbe
->hw
;
560 uint32_t flow_control
;
562 ixgbe_link_speed speeds
= 0;
565 * We cannot always rely on the common code maintaining
566 * hw->phy.speeds_supported, therefore we fall back to use the recorded
567 * supported speeds which were obtained during instance init in
568 * ixgbe_init_params().
570 speeds
= hw
->phy
.speeds_supported
;
572 speeds
= ixgbe
->speeds_supported
;
575 case MAC_PROP_DUPLEX
:
576 ASSERT(pr_valsize
>= sizeof (link_duplex_t
));
577 bcopy(&ixgbe
->link_duplex
, pr_val
,
578 sizeof (link_duplex_t
));
581 ASSERT(pr_valsize
>= sizeof (uint64_t));
582 tmp
= ixgbe
->link_speed
* 1000000ull;
583 bcopy(&tmp
, pr_val
, sizeof (tmp
));
585 case MAC_PROP_AUTONEG
:
586 *(uint8_t *)pr_val
= ixgbe
->param_adv_autoneg_cap
;
588 case MAC_PROP_FLOWCTRL
:
589 ASSERT(pr_valsize
>= sizeof (uint32_t));
591 switch (hw
->fc
.requested_mode
) {
593 flow_control
= LINK_FLOWCTRL_NONE
;
595 case ixgbe_fc_rx_pause
:
596 flow_control
= LINK_FLOWCTRL_RX
;
598 case ixgbe_fc_tx_pause
:
599 flow_control
= LINK_FLOWCTRL_TX
;
602 flow_control
= LINK_FLOWCTRL_BI
;
605 bcopy(&flow_control
, pr_val
, sizeof (flow_control
));
607 case MAC_PROP_ADV_10GFDX_CAP
:
608 if (speeds
& IXGBE_LINK_SPEED_10GB_FULL
)
609 *(uint8_t *)pr_val
= ixgbe
->param_adv_10000fdx_cap
;
613 case MAC_PROP_EN_10GFDX_CAP
:
614 if (speeds
& IXGBE_LINK_SPEED_10GB_FULL
)
615 *(uint8_t *)pr_val
= ixgbe
->param_en_10000fdx_cap
;
619 case MAC_PROP_ADV_5000FDX_CAP
:
620 if (speeds
& IXGBE_LINK_SPEED_5GB_FULL
)
621 *(uint8_t *)pr_val
= ixgbe
->param_adv_5000fdx_cap
;
625 case MAC_PROP_EN_5000FDX_CAP
:
626 if (speeds
& IXGBE_LINK_SPEED_5GB_FULL
)
627 *(uint8_t *)pr_val
= ixgbe
->param_en_5000fdx_cap
;
631 case MAC_PROP_ADV_2500FDX_CAP
:
632 if (speeds
& IXGBE_LINK_SPEED_2_5GB_FULL
)
633 *(uint8_t *)pr_val
= ixgbe
->param_adv_2500fdx_cap
;
637 case MAC_PROP_EN_2500FDX_CAP
:
638 if (speeds
& IXGBE_LINK_SPEED_2_5GB_FULL
)
639 *(uint8_t *)pr_val
= ixgbe
->param_en_2500fdx_cap
;
643 case MAC_PROP_ADV_1000FDX_CAP
:
644 if (speeds
& IXGBE_LINK_SPEED_1GB_FULL
)
645 *(uint8_t *)pr_val
= ixgbe
->param_adv_1000fdx_cap
;
649 case MAC_PROP_EN_1000FDX_CAP
:
650 if (speeds
& IXGBE_LINK_SPEED_1GB_FULL
)
651 *(uint8_t *)pr_val
= ixgbe
->param_en_1000fdx_cap
;
655 case MAC_PROP_ADV_100FDX_CAP
:
656 if (speeds
& IXGBE_LINK_SPEED_100_FULL
)
657 *(uint8_t *)pr_val
= ixgbe
->param_adv_100fdx_cap
;
661 case MAC_PROP_EN_100FDX_CAP
:
662 if (speeds
& IXGBE_LINK_SPEED_100_FULL
)
663 *(uint8_t *)pr_val
= ixgbe
->param_en_100fdx_cap
;
667 case MAC_PROP_PRIVATE
:
668 err
= ixgbe_get_priv_prop(ixgbe
, pr_name
,
679 ixgbe_m_propinfo(void *arg
, const char *pr_name
, mac_prop_id_t pr_num
,
680 mac_prop_info_handle_t prh
)
682 ixgbe_t
*ixgbe
= (ixgbe_t
*)arg
;
683 struct ixgbe_hw
*hw
= &ixgbe
->hw
;
686 ixgbe_link_speed speeds
= 0;
689 * We cannot always rely on the common code maintaining
690 * hw->phy.speeds_supported, therefore we fall back to use the
691 * recorded supported speeds which were obtained during instance init in
692 * ixgbe_init_params().
694 speeds
= hw
->phy
.speeds_supported
;
696 speeds
= ixgbe
->speeds_supported
;
699 case MAC_PROP_DUPLEX
:
701 mac_prop_info_set_perm(prh
, MAC_PROP_PERM_READ
);
704 case MAC_PROP_ADV_100FDX_CAP
:
705 mac_prop_info_set_perm(prh
, MAC_PROP_PERM_READ
);
706 value
= (speeds
& IXGBE_LINK_SPEED_100_FULL
) ? 1 : 0;
707 mac_prop_info_set_default_uint8(prh
, value
);
710 case MAC_PROP_ADV_1000FDX_CAP
:
711 mac_prop_info_set_perm(prh
, MAC_PROP_PERM_READ
);
712 value
= (speeds
& IXGBE_LINK_SPEED_1GB_FULL
) ? 1 : 0;
713 mac_prop_info_set_default_uint8(prh
, value
);
716 case MAC_PROP_ADV_2500FDX_CAP
:
717 mac_prop_info_set_perm(prh
, MAC_PROP_PERM_READ
);
718 value
= (speeds
& IXGBE_LINK_SPEED_2_5GB_FULL
) ? 1 : 0;
719 mac_prop_info_set_default_uint8(prh
, value
);
722 case MAC_PROP_ADV_5000FDX_CAP
:
723 mac_prop_info_set_perm(prh
, MAC_PROP_PERM_READ
);
724 value
= (speeds
& IXGBE_LINK_SPEED_5GB_FULL
) ? 1 : 0;
725 mac_prop_info_set_default_uint8(prh
, value
);
728 case MAC_PROP_ADV_10GFDX_CAP
:
729 mac_prop_info_set_perm(prh
, MAC_PROP_PERM_READ
);
730 value
= (speeds
& IXGBE_LINK_SPEED_10GB_FULL
) ? 1 : 0;
731 mac_prop_info_set_default_uint8(prh
, value
);
735 * We allow speed changes only on baseT PHYs. MAC_PROP_EN_* are marked
736 * read-only on non-baseT (SFP) PHYs.
738 case MAC_PROP_AUTONEG
:
739 perm
= (hw
->phy
.media_type
== ixgbe_media_type_copper
) ?
740 MAC_PROP_PERM_RW
: MAC_PROP_PERM_READ
;
741 mac_prop_info_set_perm(prh
, perm
);
742 mac_prop_info_set_default_uint8(prh
, 1);
745 case MAC_PROP_EN_10GFDX_CAP
:
746 if (speeds
& IXGBE_LINK_SPEED_10GB_FULL
) {
747 perm
= (hw
->phy
.media_type
== ixgbe_media_type_copper
) ?
748 MAC_PROP_PERM_RW
: MAC_PROP_PERM_READ
;
749 mac_prop_info_set_perm(prh
, perm
);
750 mac_prop_info_set_default_uint8(prh
, 1);
754 case MAC_PROP_EN_5000FDX_CAP
:
755 if (speeds
& IXGBE_LINK_SPEED_5GB_FULL
) {
756 perm
= (hw
->phy
.media_type
== ixgbe_media_type_copper
) ?
757 MAC_PROP_PERM_RW
: MAC_PROP_PERM_READ
;
758 mac_prop_info_set_perm(prh
, perm
);
759 mac_prop_info_set_default_uint8(prh
, 1);
763 case MAC_PROP_EN_2500FDX_CAP
:
764 if (speeds
& IXGBE_LINK_SPEED_2_5GB_FULL
) {
765 perm
= (hw
->phy
.media_type
== ixgbe_media_type_copper
) ?
766 MAC_PROP_PERM_RW
: MAC_PROP_PERM_READ
;
767 mac_prop_info_set_perm(prh
, perm
);
768 mac_prop_info_set_default_uint8(prh
, 1);
772 case MAC_PROP_EN_1000FDX_CAP
:
773 if (speeds
& IXGBE_LINK_SPEED_1GB_FULL
) {
774 perm
= (hw
->phy
.media_type
== ixgbe_media_type_copper
) ?
775 MAC_PROP_PERM_RW
: MAC_PROP_PERM_READ
;
776 mac_prop_info_set_perm(prh
, perm
);
777 mac_prop_info_set_default_uint8(prh
, 1);
781 case MAC_PROP_EN_100FDX_CAP
:
782 if (speeds
& IXGBE_LINK_SPEED_100_FULL
) {
783 perm
= (hw
->phy
.media_type
== ixgbe_media_type_copper
) ?
784 MAC_PROP_PERM_RW
: MAC_PROP_PERM_READ
;
785 mac_prop_info_set_perm(prh
, perm
);
786 mac_prop_info_set_default_uint8(prh
, 1);
790 case MAC_PROP_FLOWCTRL
:
791 mac_prop_info_set_default_link_flowctrl(prh
,
796 mac_prop_info_set_range_uint32(prh
,
797 DEFAULT_MTU
, ixgbe
->capab
->max_mtu
);
800 case MAC_PROP_PRIVATE
: {
804 bzero(valstr
, sizeof (valstr
));
806 if (strcmp(pr_name
, "_adv_pause_cap") == 0 ||
807 strcmp(pr_name
, "_adv_asym_pause_cap") == 0) {
808 mac_prop_info_set_perm(prh
, MAC_PROP_PERM_READ
);
812 if (strcmp(pr_name
, "_tx_copy_thresh") == 0) {
813 value
= DEFAULT_TX_COPY_THRESHOLD
;
814 } else if (strcmp(pr_name
, "_tx_recycle_thresh") == 0) {
815 value
= DEFAULT_TX_RECYCLE_THRESHOLD
;
816 } else if (strcmp(pr_name
, "_tx_overload_thresh") == 0) {
817 value
= DEFAULT_TX_OVERLOAD_THRESHOLD
;
818 } else if (strcmp(pr_name
, "_tx_resched_thresh") == 0) {
819 value
= DEFAULT_TX_RESCHED_THRESHOLD
;
820 } else if (strcmp(pr_name
, "_rx_copy_thresh") == 0) {
821 value
= DEFAULT_RX_COPY_THRESHOLD
;
822 } else if (strcmp(pr_name
, "_rx_limit_per_intr") == 0) {
823 value
= DEFAULT_RX_LIMIT_PER_INTR
;
824 } if (strcmp(pr_name
, "_intr_throttling") == 0) {
825 value
= ixgbe
->capab
->def_intr_throttle
;
830 (void) snprintf(valstr
, sizeof (valstr
), "%x", value
);
836 ixgbe_param_locked(mac_prop_id_t pr_num
)
839 * All en_* parameters are locked (read-only) while
840 * the device is in any sort of loopback mode ...
843 case MAC_PROP_EN_10GFDX_CAP
:
844 case MAC_PROP_EN_5000FDX_CAP
:
845 case MAC_PROP_EN_2500FDX_CAP
:
846 case MAC_PROP_EN_1000FDX_CAP
:
847 case MAC_PROP_EN_100FDX_CAP
:
848 case MAC_PROP_AUTONEG
:
849 case MAC_PROP_FLOWCTRL
:
857 ixgbe_set_priv_prop(ixgbe_t
*ixgbe
, const char *pr_name
,
858 uint_t pr_valsize
, const void *pr_val
)
862 struct ixgbe_hw
*hw
= &ixgbe
->hw
;
865 if (strcmp(pr_name
, "_tx_copy_thresh") == 0) {
866 if (pr_val
== NULL
) {
870 (void) ddi_strtol(pr_val
, (char **)NULL
, 0, &result
);
871 if (result
< MIN_TX_COPY_THRESHOLD
||
872 result
> MAX_TX_COPY_THRESHOLD
)
875 ixgbe
->tx_copy_thresh
= (uint32_t)result
;
879 if (strcmp(pr_name
, "_tx_recycle_thresh") == 0) {
880 if (pr_val
== NULL
) {
884 (void) ddi_strtol(pr_val
, (char **)NULL
, 0, &result
);
885 if (result
< MIN_TX_RECYCLE_THRESHOLD
||
886 result
> MAX_TX_RECYCLE_THRESHOLD
)
889 ixgbe
->tx_recycle_thresh
= (uint32_t)result
;
893 if (strcmp(pr_name
, "_tx_overload_thresh") == 0) {
894 if (pr_val
== NULL
) {
898 (void) ddi_strtol(pr_val
, (char **)NULL
, 0, &result
);
899 if (result
< MIN_TX_OVERLOAD_THRESHOLD
||
900 result
> MAX_TX_OVERLOAD_THRESHOLD
)
903 ixgbe
->tx_overload_thresh
= (uint32_t)result
;
907 if (strcmp(pr_name
, "_tx_resched_thresh") == 0) {
908 if (pr_val
== NULL
) {
912 (void) ddi_strtol(pr_val
, (char **)NULL
, 0, &result
);
913 if (result
< MIN_TX_RESCHED_THRESHOLD
||
914 result
> MAX_TX_RESCHED_THRESHOLD
)
917 ixgbe
->tx_resched_thresh
= (uint32_t)result
;
921 if (strcmp(pr_name
, "_rx_copy_thresh") == 0) {
922 if (pr_val
== NULL
) {
926 (void) ddi_strtol(pr_val
, (char **)NULL
, 0, &result
);
927 if (result
< MIN_RX_COPY_THRESHOLD
||
928 result
> MAX_RX_COPY_THRESHOLD
)
931 ixgbe
->rx_copy_thresh
= (uint32_t)result
;
935 if (strcmp(pr_name
, "_rx_limit_per_intr") == 0) {
936 if (pr_val
== NULL
) {
940 (void) ddi_strtol(pr_val
, (char **)NULL
, 0, &result
);
941 if (result
< MIN_RX_LIMIT_PER_INTR
||
942 result
> MAX_RX_LIMIT_PER_INTR
)
945 ixgbe
->rx_limit_per_intr
= (uint32_t)result
;
949 if (strcmp(pr_name
, "_intr_throttling") == 0) {
950 if (pr_val
== NULL
) {
954 (void) ddi_strtol(pr_val
, (char **)NULL
, 0, &result
);
956 if (result
< ixgbe
->capab
->min_intr_throttle
||
957 result
> ixgbe
->capab
->max_intr_throttle
)
960 ixgbe
->intr_throttling
[0] = (uint32_t)result
;
963 * 82599, X540 and X550 require the interrupt throttling
964 * rate is a multiple of 8. This is enforced by the
965 * register definiton.
967 if (hw
->mac
.type
== ixgbe_mac_82599EB
||
968 hw
->mac
.type
== ixgbe_mac_X540
||
969 hw
->mac
.type
== ixgbe_mac_X550
||
970 hw
->mac
.type
== ixgbe_mac_X550EM_x
) {
971 ixgbe
->intr_throttling
[0] =
972 ixgbe
->intr_throttling
[0] & 0xFF8;
975 for (i
= 0; i
< MAX_INTR_VECTOR
; i
++)
976 ixgbe
->intr_throttling
[i
] =
977 ixgbe
->intr_throttling
[0];
979 /* Set interrupt throttling rate */
980 for (i
= 0; i
< ixgbe
->intr_cnt
; i
++)
981 IXGBE_WRITE_REG(hw
, IXGBE_EITR(i
),
982 ixgbe
->intr_throttling
[i
]);
990 ixgbe_get_priv_prop(ixgbe_t
*ixgbe
, const char *pr_name
,
991 uint_t pr_valsize
, void *pr_val
)
996 if (strcmp(pr_name
, "_adv_pause_cap") == 0) {
997 value
= ixgbe
->param_adv_pause_cap
;
1001 if (strcmp(pr_name
, "_adv_asym_pause_cap") == 0) {
1002 value
= ixgbe
->param_adv_asym_pause_cap
;
1006 if (strcmp(pr_name
, "_tx_copy_thresh") == 0) {
1007 value
= ixgbe
->tx_copy_thresh
;
1011 if (strcmp(pr_name
, "_tx_recycle_thresh") == 0) {
1012 value
= ixgbe
->tx_recycle_thresh
;
1016 if (strcmp(pr_name
, "_tx_overload_thresh") == 0) {
1017 value
= ixgbe
->tx_overload_thresh
;
1021 if (strcmp(pr_name
, "_tx_resched_thresh") == 0) {
1022 value
= ixgbe
->tx_resched_thresh
;
1026 if (strcmp(pr_name
, "_rx_copy_thresh") == 0) {
1027 value
= ixgbe
->rx_copy_thresh
;
1031 if (strcmp(pr_name
, "_rx_limit_per_intr") == 0) {
1032 value
= ixgbe
->rx_limit_per_intr
;
1036 if (strcmp(pr_name
, "_intr_throttling") == 0) {
1037 value
= ixgbe
->intr_throttling
[0];
1043 (void) snprintf(pr_val
, pr_valsize
, "%d", value
);