include/configs/M5275EVB.h

   1 /*
   2  * Configuation settings for the Motorola MC5275EVB board.
   3  *
   4  * By Arthur Shipkowski <art@videon-central.com>
   5  * Copyright (C) 2005 Videon Central, Inc.
   6  *
   7  * Based off of M5272C3 board code by Josef Baumgartner
   8  * <josef.baumgartner@telex.de>
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 /*
  30  * board/config.h - configuration options, board specific
  31  */
  32
  33 #ifndef _M5275EVB_H
  34 #define _M5275EVB_H
  35
  36 /*
  37  * High Level Configuration Options
  38  * (easy to change)
  39  */
  40 #define CONFIG_MCF52x2                  /* define processor family */
  41 #define CONFIG_M5275                    /* define processor type */
  42 #define CONFIG_M5275EVB                 /* define board type */
  43
  44 #define CONFIG_MCFTMR
  45
  46 #define CONFIG_MCFUART
  47 #define CFG_UART_PORT           (0)
  48 #define CONFIG_BAUDRATE         19200
  49 #define CFG_BAUDRATE_TABLE      { 9600 , 19200 , 38400 , 57600, 115200 }
  50
  51 /* Configuration for environment
  52  * Environment is embedded in u-boot in the second sector of the flash
  53  */
  54 #ifndef CONFIG_MONITOR_IS_IN_RAM
  55 #define CFG_ENV_OFFSET          0x4000
  56 #define CFG_ENV_SECT_SIZE       0x2000
  57 #define CFG_ENV_IS_IN_FLASH     1
  58 #define CFG_ENV_IS_EMBEDDED     1
  59 #else
  60 #define CFG_ENV_ADDR            0xffe04000
  61 #define CFG_ENV_SECT_SIZE       0x2000
  62 #define CFG_ENV_IS_IN_FLASH     1
  63 #endif
  64
  65 /*
  66  * BOOTP options
  67  */
  68 #define CONFIG_BOOTP_BOOTFILESIZE
  69 #define CONFIG_BOOTP_BOOTPATH
  70 #define CONFIG_BOOTP_GATEWAY
  71 #define CONFIG_BOOTP_HOSTNAME
  72
  73 /* Available command configuration */
  74 #include <config_cmd_default.h>
  75
  76 #define CONFIG_CMD_PING
  77 #define CONFIG_CMD_MII
  78 #define CONFIG_CMD_NET
  79 #define CONFIG_CMD_ELF
  80 #define CONFIG_CMD_FLASH
  81 #define CONFIG_CMD_I2C
  82 #define CONFIG_CMD_MEMORY
  83 #define CONFIG_CMD_DHCP
  84
  85 #undef CONFIG_CMD_LOADS
  86 #undef CONFIG_CMD_LOADB
  87
  88 #define CONFIG_MCFFEC
  89 #ifdef CONFIG_MCFFEC
  90 #define CONFIG_NET_MULTI        1
  91 #define CONFIG_MII              1
  92 #define CFG_DISCOVER_PHY
  93 #define CFG_RX_ETH_BUFFER       8
  94 #define CFG_FAULT_ECHO_LINK_DOWN
  95 #define CFG_FEC0_PINMUX         0
  96 #define CFG_FEC0_MIIBASE        CFG_FEC0_IOBASE
  97 #define CFG_FEC1_PINMUX         0
  98 #define CFG_FEC1_MIIBASE        CFG_FEC1_IOBASE
  99 #define MCFFEC_TOUT_LOOP        50000
 100 #define CONFIG_HAS_ETH1
 101 /* If CFG_DISCOVER_PHY is not defined - hardcoded */
 102 #ifndef CFG_DISCOVER_PHY
 103 #define FECDUPLEX               FULL
 104 #define FECSPEED                _100BASET
 105 #else
 106 #ifndef CFG_FAULT_ECHO_LINK_DOWN
 107 #define CFG_FAULT_ECHO_LINK_DOWN
 108 #endif
 109 #endif
 110 #endif
 111
 112 /* I2C */
 113 #define CONFIG_FSL_I2C
 114 #define CONFIG_HARD_I2C         /* I2C with hw support */
 115 #undef CONFIG_SOFT_I2C
 116 #define CFG_I2C_SPEED           80000
 117 #define CFG_I2C_SLAVE           0x7F
 118 #define CFG_I2C_OFFSET          0x00000300
 119 #define CFG_IMMR                CFG_MBAR
 120
 121 #ifdef CONFIG_MCFFEC
 122 #define CONFIG_ETHADDR          00:06:3b:01:41:55
 123 #define CONFIG_ETH1ADDR         00:0e:0c:bc:e5:60
 124 #endif
 125
 126 #define CFG_PROMPT              "-> "
 127 #define CFG_LONGHELP            /* undef to save memory */
 128
 129 #if (CONFIG_CMD_KGDB)
 130 #       define CFG_CBSIZE       1024
 131 #else
 132 #       define CFG_CBSIZE       256
 133 #endif
 134 #define CFG_PBSIZE              (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 135 #define CFG_MAXARGS             16
 136 #define CFG_BARGSIZE            CFG_CBSIZE
 137
 138 #define CFG_LOAD_ADDR           0x800000
 139
 140 #define CONFIG_BOOTDELAY        5
 141 #define CONFIG_BOOTCOMMAND      "bootm ffe40000"
 142 #define CFG_MEMTEST_START       0x400
 143 #define CFG_MEMTEST_END         0x380000
 144
 145 #define CFG_HZ                  1000
 146 #define CFG_CLK                 150000000
 147
 148 /*
 149  * Low Level Configuration Settings
 150  * (address mappings, register initial values, etc.)
 151  * You should know what you are doing if you make changes here.
 152  */
 153
 154 #define CFG_MBAR                0x40000000
 155
 156 /*-----------------------------------------------------------------------
 157  * Definitions for initial stack pointer and data area (in DPRAM)
 158  */
 159 #define CFG_INIT_RAM_ADDR       0x20000000
 160 #define CFG_INIT_RAM_END        0x10000 /* End of used area in internal SRAM */
 161 #define CFG_GBL_DATA_SIZE       1000    /* bytes reserved for initial data */
 162 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 163 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 164
 165 /*-----------------------------------------------------------------------
 166  * Start addresses for the final memory configuration
 167  * (Set up by the startup code)
 168  * Please note that CFG_SDRAM_BASE _must_ start at 0
 169  */
 170 #define CFG_SDRAM_BASE          0x00000000
 171 #define CFG_SDRAM_SIZE          16      /* SDRAM size in MB */
 172 #define CFG_FLASH_BASE          0xffe00000
 173
 174 #ifdef CONFIG_MONITOR_IS_IN_RAM
 175 #define CFG_MONITOR_BASE        0x20000
 176 #else
 177 #define CFG_MONITOR_BASE        (CFG_FLASH_BASE + 0x400)
 178 #endif
 179
 180 #define CFG_MONITOR_LEN         0x20000
 181 #define CFG_MALLOC_LEN          (256 << 10)
 182 #define CFG_BOOTPARAMS_LEN      64*1024
 183
 184 /*
 185  * For booting Linux, the board info and command line data
 186  * have to be in the first 8 MB of memory, since this is
 187  * the maximum mapped by the Linux kernel during initialization ??
 188  */
 189 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial mmap for Linux */
 190
 191 /*-----------------------------------------------------------------------
 192  * FLASH organization
 193  */
 194 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks */
 195 #define CFG_MAX_FLASH_SECT      11      /* max number of sectors on one chip */
 196 #define CFG_FLASH_ERASE_TOUT    1000
 197
 198 #define CFG_FLASH_CFI           1
 199 #define CFG_FLASH_CFI_DRIVER    1
 200 #define CFG_FLASH_SIZE          0x200000
 201
 202 /*-----------------------------------------------------------------------
 203  * Cache Configuration
 204  */
 205 #define CFG_CACHELINE_SIZE      16
 206
 207 /*-----------------------------------------------------------------------
 208  * Memory bank definitions
 209  */
 210 #define CFG_AR0_PRELIM          (CFG_FLASH_BASE >> 16)
 211 #define CFG_CR0_PRELIM          0x1980
 212 #define CFG_MR0_PRELIM          0x001F0001
 213
 214 #define CFG_AR1_PRELIM          0x3000
 215 #define CFG_CR1_PRELIM          0x1900
 216 #define CFG_MR1_PRELIM          0x00070001
 217
 218 /*-----------------------------------------------------------------------
 219  * Port configuration
 220  */
 221 #define CFG_FECI2C              0x0FA0
 222
 223 #endif  /* _M5275EVB_H */