cpu/mpc5xx/serial.c

   1 /*
   2  * (C) Copyright 2003
   3  * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation,
  21  */
  22
  23 /*
  24  * File:                serial.c
  25  *
  26  * Discription:         Serial interface driver for SCI1 and SCI2.
  27  *                      Since this code will be called from ROM use
  28  *                      only non-static local variables.
  29  *
  30  */
  31
  32 #include <common.h>
  33 #include <watchdog.h>
  34 #include <command.h>
  35 #include <mpc5xx.h>
  36
  37 DECLARE_GLOBAL_DATA_PTR;
  38
  39 /*
  40  * Local function prototypes
  41  */
  42
  43 static int ready_to_send(void);
  44
  45 /*
  46  * Minimal global serial functions needed to use one of the SCI modules.
  47  */
  48
  49 int serial_init (void)
  50 {
  51         volatile immap_t *immr = (immap_t *)CFG_IMMR;
  52
  53         serial_setbrg();
  54
  55 #if defined(CONFIG_5xx_CONS_SCI1)
  56         /* 10-Bit, 1 start bit, 8 data bit, no parity, 1 stop bit */
  57         immr->im_qsmcm.qsmcm_scc1r1 = SCI_M_10;
  58         immr->im_qsmcm.qsmcm_scc1r1 = SCI_TE | SCI_RE;
  59 #else
  60         immr->im_qsmcm.qsmcm_scc2r1 = SCI_M_10;
  61         immr->im_qsmcm.qsmcm_scc2r1 = SCI_TE | SCI_RE;
  62 #endif
  63         return 0;
  64 }
  65
  66 void serial_putc(const char c)
  67 {
  68         volatile immap_t *immr = (immap_t *)CFG_IMMR;
  69
  70         /* Test for completition */
  71         if(ready_to_send()) {
  72 #if defined(CONFIG_5xx_CONS_SCI1)
  73                 immr->im_qsmcm.qsmcm_sc1dr = (short)c;
  74 #else
  75                 immr->im_qsmcm.qsmcm_sc2dr = (short)c;
  76 #endif
  77                 if(c == '\n') {
  78                         if(ready_to_send());
  79 #if defined(CONFIG_5xx_CONS_SCI1)
  80                         immr->im_qsmcm.qsmcm_sc1dr = (short)'\r';
  81 #else
  82                         immr->im_qsmcm.qsmcm_sc2dr = (short)'\r';
  83 #endif
  84                 }
  85         }
  86 }
  87
  88 int serial_getc(void)
  89 {
  90         volatile immap_t *immr = (immap_t *)CFG_IMMR;
  91         volatile short status;
  92         unsigned char tmp;
  93
  94         /* New data ? */
  95         do {
  96 #if defined(CONFIG_5xx_CONS_SCI1)
  97                 status = immr->im_qsmcm.qsmcm_sc1sr;
  98 #else
  99                 status = immr->im_qsmcm.qsmcm_sc2sr;
 100 #endif
 101
 102 #if defined(CONFIG_WATCHDOG)
 103                 reset_5xx_watchdog (immr);
 104 #endif
 105         } while ((status & SCI_RDRF) == 0);
 106
 107         /* Read data */
 108 #if defined(CONFIG_5xx_CONS_SCI1)
 109         tmp = (unsigned char)(immr->im_qsmcm.qsmcm_sc1dr & SCI_SCXDR_MK);
 110 #else
 111         tmp = (unsigned char)( immr->im_qsmcm.qsmcm_sc2dr & SCI_SCXDR_MK);
 112 #endif
 113         return  tmp;
 114 }
 115
 116 int serial_tstc()
 117 {
 118         volatile immap_t *immr = (immap_t *)CFG_IMMR;
 119         short status;
 120
 121         /* New data character ? */
 122 #if defined(CONFIG_5xx_CONS_SCI1)
 123         status = immr->im_qsmcm.qsmcm_sc1sr;
 124 #else
 125         status = immr->im_qsmcm.qsmcm_sc2sr;
 126 #endif
 127         return (status & SCI_RDRF);
 128 }
 129
 130 void serial_setbrg (void)
 131 {
 132         volatile immap_t *immr = (immap_t *)CFG_IMMR;
 133         short scxbr;
 134
 135         /* Set baudrate */
 136         scxbr = (gd->cpu_clk / (32 * gd->baudrate));
 137 #if defined(CONFIG_5xx_CONS_SCI1)
 138         immr->im_qsmcm.qsmcm_scc1r0 = (scxbr & SCI_SCXBR_MK);
 139 #else
 140         immr->im_qsmcm.qsmcm_scc2r0 = (scxbr & SCI_SCXBR_MK);
 141 #endif
 142 }
 143
 144 void serial_puts (const char *s)
 145 {
 146         while (*s) {
 147                 serial_putc(*s);
 148                 ++s;
 149         }
 150 }
 151
 152 int ready_to_send(void)
 153 {
 154         volatile immap_t *immr = (immap_t *)CFG_IMMR;
 155         volatile short status;
 156
 157         do {
 158 #if defined(CONFIG_5xx_CONS_SCI1)
 159                 status = immr->im_qsmcm.qsmcm_sc1sr;
 160 #else
 161                 status = immr->im_qsmcm.qsmcm_sc2sr;
 162 #endif
 163
 164 #if defined(CONFIG_WATCHDOG)
 165                 reset_5xx_watchdog (immr);
 166 #endif
 167         } while ((status & SCI_TDRE) == 0);
 168         return 1;
 169
 170 }