cpu/mcf52x2/cpu.c

   1 /*
   2  * (C) Copyright 2003
   3  * Josef Baumgartner <josef.baumgartner@telex.de>
   4  *
   5  * MCF5282 additionals
   6  * (C) Copyright 2005
   7  * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
   8  *
   9  * MCF5275 additions
  10  * Copyright (C) 2008 Arthur Shipkowski (art@videon-central.com)
  11  *
  12  * See file CREDITS for list of people who contributed to this
  13  * project.
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License as
  17  * published by the Free Software Foundation; either version 2 of
  18  * the License, or (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, write to the Free Software
  27  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28  * MA 02111-1307 USA
  29  */
  30
  31 #include <common.h>
  32 #include <watchdog.h>
  33 #include <command.h>
  34 #include <asm/immap.h>
  35
  36 #ifdef  CONFIG_M5271
  37 /*
  38  * Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
  39  * determine which one we are running on, based on the Chip Identification
  40  * Register (CIR).
  41  */
  42 int checkcpu(void)
  43 {
  44         char buf[32];
  45         unsigned short cir;     /* Chip Identification Register */
  46         unsigned short pin;     /* Part identification number */
  47         unsigned char prn;      /* Part revision number */
  48         char *cpu_model;
  49
  50         cir = mbar_readShort(MCF_CCM_CIR);
  51         pin = cir >> MCF_CCM_CIR_PIN_LEN;
  52         prn = cir & MCF_CCM_CIR_PRN_MASK;
  53
  54         switch (pin) {
  55         case MCF_CCM_CIR_PIN_MCF5270:
  56                 cpu_model = "5270";
  57                 break;
  58         case MCF_CCM_CIR_PIN_MCF5271:
  59                 cpu_model = "5271";
  60                 break;
  61         default:
  62                 cpu_model = NULL;
  63                 break;
  64         }
  65
  66         if (cpu_model)
  67                 printf("CPU:   Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
  68                        cpu_model, prn, strmhz(buf, CFG_CLK));
  69         else
  70                 printf("CPU:   Unknown - Freescale ColdFire MCF5271 family"
  71                        " (PIN: 0x%x) rev. %hu, at %s MHz\n",
  72                        pin, prn, strmhz(buf, CFG_CLK));
  73
  74         return 0;
  75 }
  76
  77 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
  78 {
  79         mbar_writeByte(MCF_RCM_RCR,
  80                        MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
  81         return 0;
  82 };
  83
  84 #if defined(CONFIG_WATCHDOG)
  85 void watchdog_reset(void)
  86 {
  87         mbar_writeShort(MCF_WTM_WSR, 0x5555);
  88         mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
  89 }
  90
  91 int watchdog_disable(void)
  92 {
  93         mbar_writeShort(MCF_WTM_WCR, 0);
  94         return (0);
  95 }
  96
  97 int watchdog_init(void)
  98 {
  99         mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
 100         return (0);
 101 }
 102 #endif                          /* #ifdef CONFIG_WATCHDOG */
 103
 104 #endif
 105
 106 #ifdef  CONFIG_M5272
 107 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 108 {
 109         volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
 110
 111         wdp->wdog_wrrr = 0;
 112         udelay(1000);
 113
 114         /* enable watchdog, set timeout to 0 and wait */
 115         wdp->wdog_wrrr = 1;
 116         while (1) ;
 117
 118         /* we don't return! */
 119         return 0;
 120 };
 121
 122 int checkcpu(void)
 123 {
 124         volatile sysctrl_t *sysctrl = (sysctrl_t *) (MMAP_CFG);
 125         uchar msk;
 126         char *suf;
 127
 128         puts("CPU:   ");
 129         msk = (sysctrl->sc_dir > 28) & 0xf;
 130         switch (msk) {
 131         case 0x2:
 132                 suf = "1K75N";
 133                 break;
 134         case 0x4:
 135                 suf = "3K75N";
 136                 break;
 137         default:
 138                 suf = NULL;
 139                 printf("Freescale MCF5272 (Mask:%01x)\n", msk);
 140                 break;
 141         }
 142
 143         if (suf)
 144                 printf("Freescale MCF5272 %s\n", suf);
 145         return 0;
 146 };
 147
 148 #if defined(CONFIG_WATCHDOG)
 149 /* Called by macro WATCHDOG_RESET */
 150 void watchdog_reset(void)
 151 {
 152         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 153         wdt->wdog_wcr = 0;
 154 }
 155
 156 int watchdog_disable(void)
 157 {
 158         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 159
 160         wdt->wdog_wcr = 0;      /* reset watchdog counter */
 161         wdt->wdog_wirr = 0;     /* disable watchdog interrupt */
 162         wdt->wdog_wrrr = 0;     /* disable watchdog timer */
 163
 164         puts("WATCHDOG:disabled\n");
 165         return (0);
 166 }
 167
 168 int watchdog_init(void)
 169 {
 170         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 171
 172         wdt->wdog_wirr = 0;     /* disable watchdog interrupt */
 173
 174         /* set timeout and enable watchdog */
 175         wdt->wdog_wrrr =
 176             ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
 177         wdt->wdog_wcr = 0;      /* reset watchdog counter */
 178
 179         puts("WATCHDOG:enabled\n");
 180         return (0);
 181 }
 182 #endif                          /* #ifdef CONFIG_WATCHDOG */
 183
 184 #endif                          /* #ifdef CONFIG_M5272 */
 185
 186 #ifdef  CONFIG_M5275
 187 int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 188 {
 189         volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM);
 190
 191         udelay(1000);
 192
 193         rcm->rcr = RCM_RCR_SOFTRST;
 194
 195         /* we don't return! */
 196         return 0;
 197 };
 198
 199 int checkcpu(void)
 200 {
 201         char buf[32];
 202
 203         printf("CPU:   Freescale Coldfire MCF5275 at %s MHz\n",
 204                         strmhz(buf, CFG_CLK));
 205         return 0;
 206 };
 207
 208
 209 #if defined(CONFIG_WATCHDOG)
 210 /* Called by macro WATCHDOG_RESET */
 211 void watchdog_reset(void)
 212 {
 213         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 214         wdt->wsr = 0x5555;
 215         wdt->wsr = 0xAAAA;
 216 }
 217
 218 int watchdog_disable(void)
 219 {
 220         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 221
 222         wdt->wsr = 0x5555; /* reset watchdog counter */
 223         wdt->wsr = 0xAAAA;
 224         wdt->wcr = 0;   /* disable watchdog timer */
 225
 226         puts("WATCHDOG:disabled\n");
 227         return (0);
 228 }
 229
 230 int watchdog_init(void)
 231 {
 232         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 233
 234         wdt->wcr = 0;   /* disable watchdog */
 235
 236         /* set timeout and enable watchdog */
 237         wdt->wmr =
 238                 ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
 239         wdt->wsr = 0x5555; /* reset watchdog counter */
 240         wdt->wsr = 0xAAAA;
 241
 242         puts("WATCHDOG:enabled\n");
 243         return (0);
 244 }
 245 #endif                          /* #ifdef CONFIG_WATCHDOG */
 246
 247 #endif                          /* #ifdef CONFIG_M5275 */
 248
 249 #ifdef  CONFIG_M5282
 250 int checkcpu(void)
 251 {
 252         unsigned char resetsource = MCFRESET_RSR;
 253
 254         printf("CPU:   Freescale Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n",
 255                MCFCCM_CIR >> 8, MCFCCM_CIR & MCFCCM_CIR_PRN_MASK);
 256         printf("Reset:%s%s%s%s%s%s%s\n",
 257                (resetsource & MCFRESET_RSR_LOL) ? " Loss of Lock" : "",
 258                (resetsource & MCFRESET_RSR_LOC) ? " Loss of Clock" : "",
 259                (resetsource & MCFRESET_RSR_EXT) ? " External" : "",
 260                (resetsource & MCFRESET_RSR_POR) ? " Power On" : "",
 261                (resetsource & MCFRESET_RSR_WDR) ? " Watchdog" : "",
 262                (resetsource & MCFRESET_RSR_SOFT) ? " Software" : "",
 263                (resetsource & MCFRESET_RSR_LVD) ? " Low Voltage" : "");
 264         return 0;
 265 }
 266
 267 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 268 {
 269         MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
 270         return 0;
 271 };
 272 #endif
 273
 274 #ifdef CONFIG_M5249
 275 int checkcpu(void)
 276 {
 277         char buf[32];
 278
 279         printf("CPU:   Freescale Coldfire MCF5249 at %s MHz\n",
 280                strmhz(buf, CFG_CLK));
 281         return 0;
 282 }
 283
 284 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 285 {
 286         /* enable watchdog, set timeout to 0 and wait */
 287         mbar_writeByte(MCFSIM_SYPCR, 0xc0);
 288         while (1) ;
 289
 290         /* we don't return! */
 291         return 0;
 292 };
 293 #endif
 294
 295 #ifdef CONFIG_M5253
 296 int checkcpu(void)
 297 {
 298         char buf[32];
 299
 300         unsigned char resetsource = mbar_readLong(SIM_RSR);
 301         printf("CPU:   Freescale Coldfire MCF5253 at %s MHz\n",
 302                strmhz(buf, CFG_CLK));
 303
 304         if ((resetsource & SIM_RSR_HRST) || (resetsource & SIM_RSR_SWTR)) {
 305                 printf("Reset:%s%s\n",
 306                        (resetsource & SIM_RSR_HRST) ? " Hardware/ System Reset"
 307                        : "",
 308                        (resetsource & SIM_RSR_SWTR) ? " Software Watchdog" :
 309                        "");
 310         }
 311         return 0;
 312 }
 313
 314 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 315 {
 316         /* enable watchdog, set timeout to 0 and wait */
 317         mbar_writeByte(SIM_SYPCR, 0xc0);
 318         while (1) ;
 319
 320         /* we don't return! */
 321         return 0;
 322 };
 323 #endif