board/smdk2440/smdk2440.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #include <common.h>
  29 #include <s3c2440.h>
  30
  31 DECLARE_GLOBAL_DATA_PTR;
  32
  33 #define FCLK_SPEED 1
  34
  35 #if FCLK_SPEED==0               /* Fout = 203MHz, Fin = 12MHz for Audio */
  36 #define M_MDIV  0xC3
  37 #define M_PDIV  0x4
  38 #define M_SDIV  0x1
  39 #elif FCLK_SPEED==1             /* Fout = 399.65MHz */
  40 #define M_MDIV  0x6e
  41 #define M_PDIV  0x3
  42 #define M_SDIV  0x1
  43 #endif
  44
  45 #define USB_CLOCK 1
  46
  47 #if USB_CLOCK==0
  48 #define U_M_MDIV        0xA1
  49 #define U_M_PDIV        0x3
  50 #define U_M_SDIV        0x1
  51 #elif USB_CLOCK==1
  52 #define U_M_MDIV        0x3c
  53 #define U_M_PDIV        0x4
  54 #define U_M_SDIV        0x2
  55 #endif
  56
  57 static inline void delay (unsigned long loops)
  58 {
  59         __asm__ volatile ("1:\n"
  60           "subs %0, %1, #1\n"
  61           "bne 1b":"=r" (loops):"0" (loops));
  62 }
  63
  64 /*
  65  * Miscellaneous platform dependent initialisations
  66  */
  67
  68 int board_init (void)
  69 {
  70         S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
  71         S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
  72
  73         /* to reduce PLL lock time, adjust the LOCKTIME register */
  74         clk_power->LOCKTIME = 0xFFFFFF;
  75
  76         /* configure MPLL */
  77         clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
  78
  79         /* some delay between MPLL and UPLL */
  80         delay (4000);
  81
  82         /* configure UPLL */
  83         clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
  84
  85         /* some delay between MPLL and UPLL */
  86         delay (8000);
  87
  88         /* set up the I/O ports */
  89         gpio->GPACON = 0x007FFFFF;
  90         gpio->GPBCON = 0x002a9655;
  91         gpio->GPBUP = 0x000007FF;
  92         gpio->GPCCON = 0xAAAAAAAA;
  93         gpio->GPCUP = 0x0000FFFF;
  94         gpio->GPDCON = 0xAAAAAAAA;
  95         gpio->GPDUP = 0x0000FFFF;
  96         gpio->GPECON = 0xAAAAAAAA;
  97         gpio->GPEUP = 0x0000FFFF;
  98         gpio->GPFCON = 0x000055AA;
  99         gpio->GPFUP = 0x000000FF;
 100         gpio->GPGCON = 0xFD95FFBA;
 101         gpio->GPGUP = 0x0000FFFF;
 102 #ifdef CONFIG_SERIAL3
 103         gpio->GPHCON = 0x002AAAAA;
 104 #else
 105         gpio->GPHCON = 0x002AFAAA;
 106 #endif
 107         gpio->GPHUP = 0x000007FF;
 108
 109         gpio->GPJCON = 0x2AAAAAA;
 110
 111 #if 0
 112         /* USB Device Part */
 113         /*GPGCON is reset for USB Device */
 114         gpio->GPGCON = (gpio->GPGCON & ~(3 << 24)) | (1 << 24); /* Output Mode */
 115         gpio->GPGUP = gpio->GPGUP | ( 1 << 12);                 /* Pull up disable */
 116
 117         gpio->GPGDAT |= ( 1 << 12) ;
 118         gpio->GPGDAT &= ~( 1 << 12) ;
 119         udelay(20000);
 120         gpio->GPGDAT |= ( 1 << 12) ;
 121 #endif
 122
 123         /* arch number of SMDK2440-Board */
 124         gd->bd->bi_arch_number = MACH_TYPE_S3C2440;
 125
 126         /* adress of boot parameters */
 127         gd->bd->bi_boot_params = 0x30000100;
 128
 129         icache_enable();
 130         dcache_enable();
 131
 132         return 0;
 133 }
 134
 135 int dram_init (void)
 136 {
 137         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 138         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 139
 140         return 0;
 141 }
 142
 143 /* The sum of all part_size[]s must equal to the NAND size, i.e., 0x4000000.
 144    "initrd" is sized such that it can hold two uncompressed 16 bit 640*480
 145    images: 640*480*2*2 = 1228800 < 1245184. */
 146
 147 unsigned int dynpart_size[] = {
 148     CFG_UBOOT_SIZE, 0x20000, 0x200000, 0xa0000, 0x3d5c000-CFG_UBOOT_SIZE, 0 };
 149 char *dynpart_names[] = {
 150     "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL };
 151
 152