3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <gj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
9 * Michel Pollet <buserror@gmail.com>
11 * Configuation settings for the MINI2440 board.
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36 //#include <s3c2440.h>
39 /* If we want to start u-boot from usb bootloader in NOR flash */
40 #define CONFIG_SKIP_RELOCATE_UBOOT 1
41 #define CONFIG_SKIP_LOWLEVEL_INIT 1
43 /* If we want to start u-boot directly from within NAND flash
44 * Also use this if loading the bootloader directly via JTAG */
45 #define CONFIG_LL_INIT_NAND_ONLY
46 #define CONFIG_S3C2410_NAND_BOOT 1
47 #define CONFIG_S3C2410_NAND_SKIP_BAD 1
50 #define CFG_UBOOT_SIZE 0x40000 /* size of u-boot, for NAND loading */
53 * High Level Configuration Options
56 #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
57 #define CONFIG_S3C2440 1 /* in a SAMSUNG S3C2440 SoC */
58 #define CONFIG_MINI2440 1 /* on a MIN2440 Board */
60 /* input clock of PLL */
61 #define CONFIG_SYS_CLK_FREQ 12000000 /* MINI2440 has 12.0000MHz input clock */
64 #define USE_920T_MMU 1
65 //#define CONFIG_USE_IRQ 1
66 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
69 * Size of malloc() pool
71 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 2048*1024)
72 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
77 #define CONFIG_DRIVER_DM9000 1
78 #define CONFIG_DRIVER_DM9000_NO_EEPROM 1
79 #define CONFIG_DM9000_BASE 0x20000300
80 #define DM9000_IO CONFIG_DM9000_BASE
81 #define DM9000_DATA (CONFIG_DM9000_BASE+4)
83 #define CONFIG_DRIVER_S3C24X0_I2C 1
84 #if (CONFIG_DRIVER_S3C24X0_I2C)
85 #define CONFIG_HARD_I2C 1
86 #define CFG_I2C_SPEED 400000 /* 400kHz according to PCF50606 data sheet */
87 #define CFG_I2C_SLAVE 0x7f
91 * select serial console configuration
93 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on MINI2440 */
94 //#define CONFIG_HWFLOW 1
96 /************************************************************
98 ************************************************************/
99 #define CONFIG_RTC_S3C24X0 1
101 /* allow to overwrite serial and ethaddr */
102 #define CONFIG_ENV_OVERWRITE
104 #define CONFIG_BAUDRATE 115200
106 /***********************************************************
108 ***********************************************************/
109 #include <config_cmd_default.h>
111 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
113 #define CONFIG_CMD_CACHE
114 #define CONFIG_CMD_DATE
115 #define CONFIG_CMD_DIAG
116 #define CONFIG_CMD_ELF
117 #define CONFIG_CMD_DHCP
118 #define CONFIG_CMD_EXT2
119 #define CONFIG_CMD_FAT
120 #define CONFIG_CMD_JFFS2
121 #define CONFIG_CMD_MMC
122 #define CONFIG_CMD_NAND
123 #define CONFIG_CMD_PING
124 #define CONFIG_CMD_PORTIO
125 #define CONFIG_CMD_REGINFO
126 #define CONFIG_CMD_SAVES
128 #if defined(CONFIG_DRIVER_S3C24X0_I2C)
129 #define CONFIG_CMD_I2C /* I2C serial bus support */
132 #define CONFIG_BOOTDELAY 3
133 #define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 console=ttySAC0,115200"
134 #define CONFIG_ETHADDR 08:08:11:18:12:27
135 #define CONFIG_NETMASK 255.255.255.0
136 #define CONFIG_IPADDR 10.0.0.111
137 #define CONFIG_SERVERIP 10.0.0.4
138 /*#define CONFIG_BOOTFILE "elinos-lart" */
139 //#define CONFIG_BOOTCOMMAND "nand read 0x32000000 0x34000 0x200000; bootm"
140 #define CONFIG_BOOTCOMMAND ""
143 #define CONFIG_BOOTARGS "noinitrd root=/dev/nfs rw nfsroot=10.0.0.4:/opt/build/openwrt/root ip=10.0.0.111:10.0.0.4::255.255.255.0 console=ttySAC0,115200 init=/linuxrc"
144 #define CONFIG_BOOTCOMMAND "nfs 0x30008000 192.168.1.3:/home/tekkaman/working/nfs/zImage.img;bootm"
145 #define CONFIG_EXTRA_ENV_SETTINGS \
146 "tekkaman=bmp d 50000\0 " \
153 #define CONFIG_DOS_PARTITION 1
155 #if defined(CONFIG_CMD_KGDB)
156 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
157 /* what's this ? it's not used anywhere */
158 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
162 * Miscellaneous configurable options
164 #define CFG_LONGHELP /* undef to save memory */
165 #define CFG_PROMPT "MINI2440 # " /* Monitor Command Prompt */
166 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
167 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
168 #define CFG_MAXARGS 32 /* max number of command args */
169 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
171 #define CFG_MEMTEST_START 0x30000000 /* memtest works on */
172 #define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
174 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
176 #define CFG_LOAD_ADDR 0x32000000 /* default load address */
178 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
179 /* it to wrap 100 times (total 1562500) to get 1 sec. */
180 #define CFG_HZ 1562500
182 /* valid baudrates */
183 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
185 /*-----------------------------------------------------------------------
188 * The stack sizes are set up in start.S using the settings below
190 #define CONFIG_STACKSIZE (512*1024) /* regular stack */
191 #ifdef CONFIG_USE_IRQ
192 #define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */
193 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
197 #define CONFIG_USB_OHCI_NEW 1
198 #define CONFIG_CMD_USB
200 #define CFG_USB_OHCI_CPU_INIT 1
201 #define CFG_USB_OHCI_REGS_BASE 0x49000000 /* S3C24X0_USB_HOST_BASE */
202 #define CFG_USB_OHCI_SLOT_NAME "s3c2440"
203 #define CFG_USB_OHCI_MAX_ROOT_PORTS 2
205 #define CONFIG_USB_DEVICE 1
206 #define CONFIG_USB_TTY 1
207 #define CFG_CONSOLE_IS_IN_ENV 1
208 #define CONFIG_USBD_VENDORID 0x1457 /* FIC */
209 #define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
210 #define CONFIG_USBD_PRODUCTID_CDCACM 0x511b /* SMDK2440 CDC ACM */
211 #define CONFIG_USBD_MANUFACTURER "MINI2440"
212 #define CONFIG_USBD_PRODUCT_NAME "S3C2440 Bootloader " U_BOOT_VERSION
213 #define CONFIG_USBD_DFU 1
214 #define CONFIG_USBD_DFU_XFER_SIZE 4096
215 #define CONFIG_USBD_DFU_INTERFACE 2
216 //#define CONFIG_USB_DFU_REVISION 0x0100
219 /*-----------------------------------------------------------------------
220 * Physical Memory Map
222 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
223 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
224 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
226 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
228 #define CFG_FLASH_BASE PHYS_FLASH_1
230 /*-----------------------------------------------------------------------
231 * FLASH and environment organization
234 #define CONFIG_SST_VF1601 1 /* uncomment this if you have a Am29LV160DB flash */
236 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
238 #ifdef CONFIG_SST_VF1601
239 #define PHYS_FLASH_SIZE 0x00200000 /* 2MB */
240 #define CFG_MAX_FLASH_SECT (32) /* max number of sectors on one chip */
243 /* timeout values are in ticks */
244 #define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
245 #define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
251 #define CFG_ENV_IS_IN_NAND 1
252 #define CFG_ENV_OFFSET_OOB 1 // dont define for CFG_ENV_IS_IN_FLASH
253 #define CFG_ENV_SIZE 0x10000 /* 128k Total Size of Environment Sector */
255 #define CFG_ENV_IS_IN_FLASH 1
256 #define CFG_MY_ENV_OFFSET 0X40000
257 #define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MY_ENV_OFFSET) /* addr of environment */
258 #define CFG_ENV_SIZE 0x10000 /* 128k Total Size of Environment Sector */
260 #define CFG_PREBOOT_OVERRIDE 1
262 #define NAND_MAX_CHIPS 1
263 #define CFG_NAND_BASE 0x4E000000 /* S3C2440_NAND_BASE */
264 #define CFG_MAX_NAND_DEVICE 1
267 #define CONFIG_MMC_S3C 1 /* Enabling the MMC driver */
268 #define CFG_MMC_BASE 0xff000000
270 #define CONFIG_EXT2 1
273 #define CONFIG_SUPPORT_VFAT
277 #define CONFIG_JFFS2_CMDLINE 1
278 #define CONFIG_JFFS2_NAND 1
279 #define CONFIG_JFFS2_NAND_DEV 0
280 //#define CONFIG_JFFS2_NAND_OFF 0x634000
281 //#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
284 /* ATAG configuration */
285 #define CONFIG_INITRD_TAG 1
286 #define CONFIG_SETUP_MEMORY_TAGS 1
287 #define CONFIG_CMDLINE_TAG 1
289 #define CONFIG_REVISION_TAG 1
290 #define CONFIG_SERIAL_TAG 1
292 #define CONFIG_CMDLINE_EDITING 1
293 #define CONFIG_AUTO_COMPLETE 1
297 #define CONFIG_CMD_BMP
299 #define CONFIG_VIDEO_S3C2410
300 #define CONFIG_VIDEO_LOGO
301 #define CONFIG_CFB_CONSOLE
302 //#define CFG_CONSOLE_IS_IN_ENV
303 //#define CONFIG_CONSOLE_EXTRA_INFO
304 #define CONFIG_VGA_AS_SINGLE_DEVICE
306 #define VIDEO_FB_16BPP_PIXEL_SWAP
307 #define CONFIG_VIDEO_BMP_LOGO
308 #define CONFIG_SPLASH_SCREEN
309 #define CFG_VIDEO_LOGO_MAX_SIZE (240*320+1024+100) /* 100 = slack */
310 #define CONFIG_VIDEO_BMP_GZIP
311 #define CONFIG_CMD_UNZIP
313 #define VIDEO_KBD_INIT_FCT 0
314 #define VIDEO_TSTC_FCT serial_tstc
315 #define VIDEO_GETC_FCT serial_getc
317 #define LCD_VIDEO_ADDR 0x33d00000
320 //#define CONFIG_S3C2410_NAND_BBT 1
321 //#define CONFIG_S3C2410_NAND_HWECC 1
323 #define CFG_NAND_YAFFS_WRITE
324 #define CFG_NAND_YAFFS1_NEW_OOB_LAYOUT
326 #define MTDIDS_DEFAULT "nand0=mini2440-nand"
327 #define MTPDARTS_DEFAULT "mtdparts=mini2440-nand:256k@0(u-boot),128k(env),5m(kernel),-(root)"
328 #define CFG_NAND_DYNPART_MTD_KERNEL_NAME "mini2440-nand"
329 #define CONFIG_NAND_DYNPART 1
331 #define CONFIG_EXTRA_ENV_SETTINGS \
333 "mtdparts=mini2440-nand:256k@0(u-boot),128k(env),5m(kernel),-(root)\0" \
334 "bootargs_base=rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200\0" \
337 #endif /* __CONFIG_H */